CN107765067B - Current detection circuit and current detection method - Google Patents
Current detection circuit and current detection method Download PDFInfo
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- CN107765067B CN107765067B CN201710966758.4A CN201710966758A CN107765067B CN 107765067 B CN107765067 B CN 107765067B CN 201710966758 A CN201710966758 A CN 201710966758A CN 107765067 B CN107765067 B CN 107765067B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Abstract
The invention provides a current detection circuit and a current detection method, wherein the current detection circuit comprises: the input circuit comprises two sampling resistors, wherein the two sampling resistors are composed of a plurality of unit metal resistors with the same type and the same size, and the unit metal resistors form different resistance values according to set current attenuation multiples in a parallel connection mode and a serial connection mode, and are respectively a first sampling resistor with a smaller resistance value and a second sampling resistor with a larger resistance value; the two sampling resistors are respectively connected to two input ends of the differential current detection amplifier; the input signal end receives the detected current signal and drops on the first sampling resistor to generate a first current signal reflecting the actual current; and the voltages on the two sampling resistors are equal through a differential current detection amplifier so as to generate a decaying current signal according to the current decay multiple.
Description
Technical Field
The invention relates to a current detection circuit in a switching power supply, in particular to a current detection circuit and a current detection method based on an implementation scheme in a control chip of the switching power supply.
Background
Currently, the mainstream switching power supplies are mainly divided into voltage type switching power supplies and current type switching power supplies according to different control loops. The control loop of the voltage type only samples the output voltage, and after the sampled voltage is compared with a constant voltage reference through an error amplifier, an analog signal VEA which can reflect the output voltage is generated to adjust a pulse width modulation signal, so that the duty ratio of the power switch tube is controlled; the control loop of the current type, in addition to sampling the output voltage, detects and samples the signal on the inductor current and pulse-width modulates it together with the analog signal VEA generated previously. Compared with the prior art, the current type switching power supply has more accurate control on a loop, but has higher requirements on the design of a control chip.
The existing current detection of the switching power supply is divided into off-chip implementation and on-chip implementation. The off-chip implementation means that the control chip U1 is externally connected with a discrete power switch tube M20, and firstly, a discrete resistor Rcs (as shown in fig. 1) is connected in series with the source electrode of the power switch tube M20, and the switch current is converted into a voltage VCS on the resistor Rcs and transmitted back to the control chip U1. The mode is limited by the loss of the detection resistor Rcs, which is not beneficial to the improvement of the power efficiency, and the peak voltage cannot be selected to be too high, so that the signal-to-noise ratio of the detection voltage is low, namely the reliability is easily reduced due to external interference; the detection resistor Rcs itself is also susceptible to burnout failure due to the large power consumption. And secondly, a current transformer CT (shown in fig. 2) is connected in series with the drain end of the power tube M20, so that the current obtained by attenuating the switching current in a fixed proportion is dropped on a fixed resistor Rcs, and a detection voltage VCS is generated and transmitted back to the control chip U1. The nondestructive testing is realized by the mode, the defect of high sampling resistance loss is overcome, the detection precision is high, the anti-interference capability is strong, but the transformer is high in cost and large in volume, occupies more PCB area, and is not beneficial to the improvement of the power density of a power supply.
The on-chip implementation means that the power switch tube M20 is integrated in the control chip U2, and two modes are currently used, namely, a metal resistor Rm is designed between the source electrode of the power switch tube M20 and the ground to detect the switch current, as shown in fig. 3, the control chip U2 comprises a detection circuit 10 and a control circuit 20 of the switch tube, the detection circuit 10 samples the current of the metal resistor Rm connected in series with the source electrode of the power switch tube M20, and the switch current is converted into a voltage VCS on the resistor Rm and transmitted back to the control chip U2. Secondly, the magnitude of the current is reflected by detecting the voltage drop on the internal resistance (as shown in fig. 4) of the power tube M20 when the switch is turned on, as shown in fig. 4, the control chip U2 comprises a detection circuit 10 and a control circuit 20 of the switch tube, the detection circuit 10 samples the current of the internal resistance of the power tube M20, and the switch current is converted into the voltage VCS on the resistor and transmitted back to the control chip U2. Therefore, the metal resistor and the internal resistance of the MOS tube can be made to be very small, so that the power consumption loss is almost avoided, and the efficiency is very high. And the design is inside the control chip, so that the interference of the outside on the detection waveform is isolated, and the areas of the package pins and the PCB panel are saved. However, the maximum value of the peak current is easily deviated from the design value and the maximum peak current is not controllable outside the control chip under the influence of the layout matching degree, the process deviation and the chip working temperature of the MOS tube or the metal resistor.
Disclosure of Invention
In view of this, the invention provides a current detection circuit and a current detection method, which are used for solving the problems that nondestructive detection, smaller PCB area and adjustable peak current cannot be achieved in the prior art, and the detection precision of the current detection method is irrelevant to the process temperature characteristics of the sampling resistor, so that the current detection circuit and the current detection method can be integrated in a control chip or independently manufactured into a chip for replacing a transformer to be applied to a system.
In one aspect of the present invention, there is provided a current detection circuit for detecting a switching current flowing through a switching power supply, the current detection circuit comprising: the input circuit comprises two sampling resistors, wherein the two sampling resistors are composed of a plurality of unit metal resistors with the same type and the same size, and the unit metal resistors form different resistance values according to set current attenuation multiples in two ways of parallel connection and series connection, and are respectively a first sampling resistor with a smaller resistance value and a second sampling resistor with a larger resistance value; the two sampling resistors are respectively connected to two input ends of the differential current detection amplifier; the input signal end receives the detected current signal and drops on the first sampling resistor to generate a first current signal reflecting the actual current; the voltage on the two sampling resistors is equal through the differential current detection amplifier so as to generate an attenuation current signal according to the current attenuation multiple through the second sampling resistor, and the attenuation current signal is mirrored through the differential current detection amplifier and output to the output signal end so as to be provided for the detection resistor (Rcs), and a current detection voltage drop signal is generated at the current detection end (CS).
Preferably, the resistance of the first sampling resistor and the second sampling resistor of the input circuit is the parallel value of N unit metal resistors, and the resistance of the second sampling resistor is the serial value of M unit metal resistors; the current attenuation multiple of the input circuit is M times N times.
Preferably, the first sampling resistor and the second sampling resistor of the input circuit are connected with the input signal end at the first end of the first sampling resistor, and the first end of the first sampling resistor is led out to serve as the first output end of the input circuit; the second end of the first sampling resistor is grounded; the first end of the second sampling resistor is led out to serve as a second output end of the input circuit; the second end of the second sampling resistor is grounded.
Preferably, the differential current detection amplifier comprises a differential operational amplifier unit, an error cancellation branch, a regulation branch and an output branch which are sequentially connected, and a first input end and a second input end, wherein the differential operational amplifier unit comprises a first branch, a second branch, a third branch and a fourth branch, and a first transistor and a third transistor pair, a second transistor and a fourth transistor pair which form a differential input transistor pair; the first branch is a constant current circuit comprising a first constant current source generated by an internal reference and is connected with a first output end of the input circuit through a first transistor; the second branch is a current branch in mirror image relation with the fourth branch and is connected with a second output end of the input circuit through a second transistor; the third branch is a current branch obtained by mirroring the first constant current source and is connected with a first output end of the input circuit through a third transistor; the fourth branch is a current branch in mirror image relation with the second branch, and the mirror image is equal to the current of the third branch after being added with the error counteracting branch, and is connected with the second output end of the input circuit through a fourth transistor; the error cancellation branch is a constant current circuit comprising a second constant current source which is slightly smaller than the first constant current source and is generated by an internal reference; the adjusting branch is a current branch based on an error counteracting branch and is connected between the second input end of the differential current detection amplifier and the output of the differential operational amplifier unit, and is used for realizing the dynamic equality of the voltages of the first input end and the second input end of the differential current detection amplifier; the output branch is an image current branch and is used for outputting an attenuated current signal after proportional attenuation.
The first branch comprises a first constant current source and a first field effect transistor, the first constant current source is generated by a reference in the chip and is obtained by mirroring, the first end of the first constant current source is connected to a power supply voltage, the second end of the first constant current source is connected with the drain electrode of the first field effect transistor, the grid electrode of the first field effect transistor is connected with the drain electrode of the first field effect transistor, and the source electrode of the first field effect transistor is connected to the base electrode of the first transistor; the collector and the base of the first transistor are connected together, and the emitter of the first transistor is connected with the emitter of the third transistor and is used as a first input end of the differential current detection amplifier together;
the second branch consists of a second field effect transistor and a fifth field effect transistor, the source electrode of the fifth field effect transistor is connected to a power supply voltage, the grid electrode and the drain electrode of the fifth field effect transistor are connected together and connected to the drain electrode of the second field effect transistor in parallel, the grid electrode of the second field effect transistor is connected with the grid electrode of the first field effect transistor, and the source electrode of the second field effect transistor is connected to the collector electrode of the second field effect transistor; the base electrode of the second transistor is connected to the base electrode of the first transistor, and the emitter electrode of the second transistor is connected with the emitter electrode of the fourth transistor and is used as a second input end of the differential current detection amplifier together;
the third branch consists of a third field effect transistor and a sixth field effect transistor, the source electrode of the sixth field effect transistor is connected to a power supply voltage, the grid electrode and the drain electrode of the sixth field effect transistor are connected together and connected to the drain electrode of the third field effect transistor in parallel, the grid electrode of the third field effect transistor is connected with the grid electrode of the first field effect transistor, and the source electrode of the third field effect transistor is connected to the collector electrode of the third field effect transistor; the base electrode of the third transistor is connected to the base electrode of the first transistor, and the emitter electrode of the third transistor is connected with the emitter electrode of the first transistor and is used as a first input end of the differential current detection amplifier together;
the fourth branch consists of a fourth field effect transistor and a seventh field effect transistor, the source electrode of the seventh field effect transistor is connected to a power supply voltage, the grid electrode of the seventh field effect transistor is connected with the grid electrode of the sixth field effect transistor, the drain electrode of the seventh field effect transistor is connected to the drain electrode of the fourth field effect transistor, the grid electrode of the fourth field effect transistor is connected with the grid electrode of the first field effect transistor, and the source electrode of the fourth field effect transistor is connected to the collector electrode of the fourth field effect transistor; the base electrode of the fourth transistor is connected to the base electrode of the first transistor, and the emitter electrode of the fourth transistor is connected with the emitter electrode of the second transistor and is used as a second input end of the differential current detection amplifier together.
The error cancellation branch is a constant current branch comprising a second constant current source which is slightly smaller than the first constant current source and is generated by a reference inside the chip, a first end of the second constant current source is connected to the drain electrode of the fourth field effect transistor, and a second end of the second constant current source is grounded.
Preferably, the current magnitude of the second constant current source in the error cancellation branch is slightly smaller than that of the first constant current source for canceling the attenuation multiple calculation deviation introduced by the bias current.
The adjusting branch is connected between the second input end of the differential current detection amplifier and the output of the differential operational amplifier unit and is used for realizing the dynamic equality of the voltages of the first input end and the second input end of the differential current detection amplifier; the source electrode of the eighth field effect transistor is connected to the power supply voltage, the grid electrode of the eighth field effect transistor is connected with the drain electrode of the seventh field effect transistor, and the drain electrode of the eighth field effect transistor is connected with the drain electrode of the ninth field effect transistor; the ninth field effect transistor gate is connected to the fourth field effect transistor gate, and the ninth field effect transistor source is connected to the fourth transistor emitter, and collectively serves as a second input terminal of the differential current sense amplifier.
The output branch is a mirror current branch and is used for outputting an attenuated current signal subjected to proportional attenuation, and the output branch is composed of a tenth field effect transistor and an eleventh field effect transistor, wherein the grid electrode and the source electrode of the tenth field effect transistor are respectively connected with the grid electrode and the source electrode of the eighth field effect transistor, the drain electrode of the tenth field effect transistor is connected with the drain electrode of the eleventh field effect transistor, the grid electrode of the eleventh field effect transistor is connected with the grid electrode of the fourth field effect transistor, and the source electrode of the eleventh field effect transistor is connected with an external resistor and is used as an output end of the whole current detection circuit.
As described above, the current detection circuit provided by the invention, wherein the input circuit comprises the first sampling resistor and the second sampling resistor, is used for receiving the current signal and dropping on the sampling resistor so as to obtain the voltage signal representing the condition of the switching current, and utilizes the same type of resistor to offset the process deviation, thereby realizing the accurate proportional attenuation of the switching current. The differential current detection amplifier comprises a differential operational amplifier unit, an error counteracting branch, an adjusting branch and an output branch, wherein the voltage on two sampling resistors connected with the differential operational amplifier unit is equal through the adjusting branch, namely, the two input voltages of the differential operational amplifier unit are equal, and the image output can represent an attenuation current signal of the switching current after being attenuated in proportion. Preferably, the first and second sampling resistors should be designed based on metal type unit resistors with consistent length and width, wherein the first sampling resistor is a parallel value of a plurality of unit resistors, and the second sampling resistor is a serial value of a plurality of unit resistors. The differential operational amplifier unit is not limited to a symmetrical structure, and comprises a first input end and a second input end which are respectively coupled to a first end of a first detection resistor and a first end of a second detection resistor so as to receive a first current detection signal and a second current detection signal; a first constant current source, a second, a third and a fourth branch; and first and third, second and fourth transistor pairs constituting a differential input transistor pair.
In still another aspect of the present invention, there is provided a current detection method for detecting a switching current flowing through a switching power supply, the current detection method comprising the steps of: sampling, namely receiving a detected current signal by an input signal end, dropping the current signal on a first sampling resistor, and generating a first current signal reflecting actual current; the voltages on the two sampling resistors are equal through a differential current detection amplifier, so that an attenuation current signal is generated through a second sampling resistor according to the current attenuation multiple; an image output step of outputting an attenuated current signal image to an output signal terminal through a differential current sense amplifier for being supplied to a sense resistor (Rcs) to generate a current sense voltage drop signal at a current sense terminal (CS); the two sampling resistors are composed of a plurality of unit metal resistors with the same type and the same size, the resistance value of the first sampling resistor is the parallel value of N unit metal resistors, and the resistance value of the second sampling resistor is the serial value of M unit metal resistors; the current attenuation multiple is M times and N times.
The invention provides a current detection circuit and a current detection method, which are a current detection circuit based on metal resistance sampling of an on-chip implementation scheme and a current detection method based on metal resistance sampling, and are used for detecting switching current flowing through a switching power supply. The invention receives a switching current signal through a first sampling resistor; the second sampling resistor and the first sampling resistor form a ratio, and the voltages on the two sampling resistors are equal through a differential current detection amplifier, so that the input current is attenuated according to the ratio; the first and second sampling resistors may be designed based on metal type unit resistors having identical lengths and widths, wherein the first sampling resistor is a parallel value of a plurality of unit resistors, and the second sampling resistor is a series value of a plurality of unit resistors. A differential current sense amplifier for generating an attenuated current signal in attenuated proportion to the actual switching current by adjusting the branches to equalize the voltages across the two sampling resistors; and mirroring and outputting the attenuated current signal, namely providing an attenuated current signal which can be used for representing the magnitude of the input switch current and outputting the attenuated current signal as a detection current signal.
Drawings
For a better understanding of the present invention, the present invention will be described in detail with reference to the following drawings:
FIG. 1 is a schematic diagram of a switching power supply circuit of a current detection circuit of a first prior art off-chip implementation;
FIG. 2 is a schematic diagram of a switching power supply circuit of a current detection circuit of a second conventional off-chip implementation;
FIG. 3 is a schematic block diagram of a switching power supply circuit of a current detection circuit of a first prior art on-chip implementation;
FIG. 4 is a schematic block diagram of a switching power supply circuit of a current detection circuit of a second conventional on-chip implementation;
FIG. 5 is a schematic block diagram of a current detection circuit applied to a switching power supply according to an embodiment of the present invention;
FIG. 6 is a schematic circuit diagram of a current detection circuit according to an embodiment of the present invention;
fig. 7 is a waveform diagram illustrating the operation of the current detection circuit in the switching power supply system according to the embodiment of the invention.
Detailed Description
The present invention is described below based on examples, but the present invention is not limited to these examples. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be apparent to one having ordinary skill in the art that the present invention may be practiced without some of these specific details, and that certain methods, procedures, components, and circuits have not been described in detail so as not to obscure the present invention.
The following describes and illustrates the implementation of the preferred embodiment of the invention based on the above-described circuit.
Fig. 5 is a schematic diagram of a switching power supply application of a current detection circuit according to an embodiment of the present invention, and only a portion relevant to the innovation of the present invention is shown for convenience of explanation. As one of the embodiments of the present invention, the switching power supply includes a power switch control chip U2, and a transformer A1, a diode D1, a capacitor C1, a resistor R1, and a resistor Rcs1.
The power switch control chip U2 of the switch power supply is an integrated chip and comprises a Drain electrode pin Drain of a switch tube, a current detection pin CS and a grounding pin GND. The input end VIN of the switching power supply is connected with the homonymous end of the primary winding NP of the transformer A1, the heteronymous end of the primary winding NP of the transformer A1 is connected with a Drain pin of the power switch control chip U2, the homonymous end of the secondary winding NS of the transformer A1 is connected with the anode of the freewheel diode D1, the cathode of the diode D1 is connected with one end of the output capacitor C1 and one end of the output resistor R1 together, and the other ends of the capacitor C1 and the resistor R1 are grounded with the heteronymous end of the secondary winding NS.
The power switch control chip U2 is composed of a current detection circuit 100, a control circuit 200 and a power switch tube M20, wherein the control circuit 200 can control a current loop by using the sampled output voltage and current signals, and generate a GATE driving signal GATE of the power switch tube M20 to control the switching frequency and the on duty ratio of the power switch tube M20.
The current detection circuit 100 includes an input signal end IIN, an output signal end IOUT, a ground end GND, an input circuit and a differential current detection amplifier, where the input signal end IIN of the current detection circuit 100 is connected to a source of the power switch tube M20, receives an input inductor current to be sampled, and outputs a sampling current signal IOUT attenuated in equal proportion through the output signal end IOUT after operation processing of the internal differential current detection amplification circuit, and the ground pin GND of the current detection circuit 100 is grounded.
The output signal end IOUT of the current detection circuit 100 is connected with one end of a current detection resistor Rcs1 with adjustable size at the periphery of the chip, and the other end of the current detection resistor Rcs1 is grounded; the inside of the chip can also be designed with a current detection resistor Rcs2 with higher precision, the output signal end IOUT of the current detection circuit 100 is connected with one end of the current detection resistor Rcs2 with fixed resistance value inside the chip, and the other end of the current detection resistor Rcs2 is grounded.
Fig. 6 is a circuit diagram of a current detection circuit 100 according to an embodiment of the present invention, and as shown in fig. 6, the current detection circuit 100 according to an embodiment of the present invention includes: the input signal terminal IIN, the output signal terminal IOUT, the power supply voltage terminal VCC and the ground terminal GND further comprise an input circuit 11 and a differential current sense amplifier 12, wherein:
the input circuit 11 includes a first detection resistor Rp and a second detection resistor Rs, where the input signal end IIN is configured to be connected to a source of a power switch tube in the switching power supply, receive a current flowing through the switch tube and be connected to a first end of a first sampling resistor Rp, and the first end of the first sampling resistor Rp is further led out as a first output end of the input circuit 11, and is configured to be connected to a first input end Va of the differential current amplifier; the second end of the first sampling resistor Rp is grounded GND; the first end of the second sampling resistor Rs is led out as a second output end of the input circuit 11 and is used for being connected to the second input end Vb of the differential current amplifier, and the second end of the second sampling resistor Rs is grounded to GND.
The input circuit 11 is configured to receive a current signal Iin to be detected in the switching power supply and drop the current signal Iin onto the sampling resistor Rp to generate a first current signal reflecting an actual current, obtain a voltage signal VA representing an actual switching current condition, and offset a process deviation by using the resistors Rp of the same type compared with Rs, so as to implement accurate proportional attenuation of the switching current. The first sampling resistor Rp and the second sampling resistor Rs are designed based on a metal type unit resistor r with consistent length and width, wherein the first sampling resistor Rp is a parallel value of N unit resistors, and the resistance value can be as low as 10 milliohm; the second sampling resistor Rs is a series value of M unit resistors, and the resistance is about 10 ohms; the ratio of the detected current signal Iout obtained after passing through the differential current detection amplifier 12 to the switching current Iin is:
namely, the current attenuation multiple A of the current detection circuit is M times N times.
The differential current sense amplifier 12 includes a differential operational amplifier unit 120, an error cancellation branch 126, a regulation branch 127, and an output branch 129. Wherein:
the differential operational amplifier unit 120 includes a first input terminal Va and a second input terminal Vb coupled to the first terminal of the first sampling resistor Rp and the first terminal of the second sampling resistor Rs, respectively, to receive a first current signal (i.e. a signal reflecting the actual current) and a second current signal (i.e. an attenuated current signal); a first leg 121, a second leg 122, a third leg 123, and a fourth leg 124; and first and third transistors Q1 and Q3, second and fourth transistors Q2 and Q4 constituting a differential input transistor pair;
the first branch 121 is a constant current circuit including a first constant current source I1 generated from an internal reference, and is connected to a first output terminal of the input circuit 11 through a first transistor Q1. The first branch 121 comprises a first constant current source I1 and a first field effect transistor M1, the first constant current source I1 is generated by a reference inside a chip and is mirrored, a first end of the first constant current source I1 is connected to a power supply voltage end VCC, a second end of the first constant current source I1 is connected with a drain electrode of the first field effect transistor M1, a grid electrode of the first field effect transistor M1 is connected with the drain electrode of the first field effect transistor M1, and a source electrode of the first field effect transistor M1 is connected to a base electrode of the first transistor Q1; the collector and base of the first transistor Q1 are connected together, and the emitter of the first transistor Q1 is connected to the emitter of the third transistor Q3 and led out as a first input Va of the differential current sense amplifier 12 for connection to a first output of the input circuit 11.
The second branch 122 is a current branch in mirror image relationship with the fourth branch 124 and is connected to the second output terminal of the input circuit 11 through the second transistor Q2. The second branch 122 is composed of a second field effect transistor M2 and a fifth field effect transistor M5, wherein the source electrode of the fifth field effect transistor M5 is connected to the power supply voltage VCC, the gate electrode and the drain electrode of the fifth field effect transistor M5 are connected together and connected to the drain electrode of the second field effect transistor M2 in parallel, the gate electrode of the second field effect transistor M2 is connected to the gate electrode of the first field effect transistor M1, and the source electrode of the second field effect transistor M2 is connected to the collector electrode of the second transistor Q2; the base of the second transistor Q2 is connected to the base of the first transistor Q1, and the emitter of the second transistor Q2 is connected to the emitter of the fourth transistor Q4 and led out as a second input terminal Vb of the differential current sense amplifier 12 for connection to a second output terminal of the input circuit 11.
The third branch 123 is a current branch mirrored by the first constant current source I1 and is connected to the first output terminal of the input circuit 11 via the third transistor Q3. The third branch 123 is composed of a third field effect transistor M3 and a sixth field effect transistor M6, wherein the source electrode of the sixth field effect transistor M6 is connected to the power supply voltage VCC, the gate electrode and the drain electrode thereof are connected together and connected to the drain electrode of the third field effect transistor M3, the gate electrode of the third field effect transistor M3 is connected to the gate electrode of the first field effect transistor M1, and the source electrode of the third field effect transistor M3 is connected to the collector electrode of the third transistor Q3; the base of the third transistor Q3 is connected to the base of the first transistor Q1, and the emitter of the third transistor Q3 is connected to the emitter of the first transistor Q1, so as to be used as the first input terminal Va of the differential current detection amplifier 12 together.
The first transistor Q1 and the third transistor Q3 form a current mirror, so that the third branch current I3 and the first branch current I1 have the following relationship:
I3＝I1......(2)
the fourth branch 124 is a current branch in mirror image relationship with the second branch 122, and is added to the error cancellation branch 126 to form a mirror image equal to the third branch current I3, and is connected to the second output terminal of the input circuit 11 through the fourth transistor Q4. The fourth branch 124 is composed of a fourth field effect transistor M4 and a seventh field effect transistor M7, the source of the seventh field effect transistor M7 is connected to the power voltage VCC, the gate thereof is connected to the gate of the sixth field effect transistor M6, the drain of the seventh field effect transistor M7 is connected to the drain of the fourth field effect transistor M4, and the drain of the seventh field effect transistor M7 is also used as the output of the differential operational amplifier unit 120; the gate of the fourth field effect transistor M4 is connected to the gate of the first field effect transistor M1, and the source of the fourth field effect transistor M4 is connected to the collector of the fourth transistor Q4; the base of the fourth transistor Q4 is connected to the base of the first transistor Q1, and the emitter of the fourth transistor Q4 is connected to the emitter of the second transistor Q2, so as to be used together as the second input terminal Vb of the differential current detection amplifier 12.
The second transistor Q2 and the fourth transistor Q4 form a current mirror, so that the relationship between the fourth branch current I4 and the second branch current I2 is:
I4＝I2......(3)
the error cancellation branch 126 is a constant current branch including a second constant current source I5 slightly smaller than the first constant current source, which is generated by a reference inside the chip and mirrored, and is connected to the output of the differential operational amplifier unit 120. The first end of the second constant current source I5 is connected to the drain of the fourth field effect transistor M4, and the second end thereof is connected to the ground GND. From the mirror relationship of the sixth field effect transistor M6 and the seventh field effect transistor M7 and the node current equation of the drain of the fourth field effect transistor M4, it is possible to obtain:
I4+I5＝I3......(4)
the current of the second constant current source I5 in the error cancellation branch 126 should be close to the current value of the first constant current source I1 to cancel the error of the attenuation multiple a introduced by the bias current of the first constant current source I1; namely:
I5≈I1......(5)
note that the second constant current source I5 has to be slightly smaller than the first constant current source I1 to ensure that the second branch current I2 allows the transistors of both the second and fourth branches to operate in the saturation region.
The regulation branch 127 is connected between the second input terminal Vb of the differential current detection amplifier and the output of the differential operational amplifier unit 120, so as to be connected between the input and the output of the differential operational amplifier unit 120 in a feedback form, and is used for realizing dynamic equality of the voltages of the first input terminal Va and the second input terminal Vb of the differential operational amplifier unit 120. The regulation branch 127 is formed by eighth and ninth field effect transistors M8 and M9, and generates a regulation branch current I6, where a source of the eighth field effect transistor M8 is connected to a power supply voltage VCC, a gate of the eighth field effect transistor M8 is connected to a drain of the seventh field effect transistor M7, and a drain of the eighth field effect transistor M9 is connected to a drain of the ninth field effect transistor M9; the gate of the ninth field effect transistor M9 is connected to the gate of the fourth field effect transistor M4, and the source of the ninth field effect transistor M9 is connected to the emitter of the fourth transistor Q4, and together serve as the second input terminal of the differential current sense amplifier.
The effect of the adjusting branch 127 is to dynamically adjust in cooperation with the differential operational amplifier unit 120, so as to keep the voltages VA and VB on the two sampling resistors equal, which is known by the circuit principle:
Va＝(Iin+I1+I3)*Rp......(6)
Va＝(I2+I4+I6)*Rs......(7)
VA＝VB......(8)
the output branch 129 is an image current branch, and is connected to the output of the differential operational amplifier unit 120, and is used as a final stage circuit of the differential current detection amplifier 12, and is configured to output an attenuated current signal Iout that can represent the switching current after being attenuated proportionally. The output branch 129 is formed by tenth and eleventh field effect transistors M10 and M11, wherein the gate and source of the tenth field effect transistor M10 are respectively connected with the gate and source of the eighth field effect transistor M8, the drain of the tenth field effect transistor M10 is connected with the drain of the eleventh field effect transistor M11, the gate of the eleventh field effect transistor M11 is connected with the gate of the fourth field effect transistor M4, and the source of the eleventh field effect transistor M11 is led out as an output signal terminal IOUT of the current detection circuit, and outputs a detection current signal IOUT as an output terminal of the whole current detection circuit for connection with an external detection resistor. The gate and source voltages of the field effect transistors M10 and M8 are respectively connected to the same node, and are equal in design size, so that the branch currents where the two are located are equal, namely:
Iout＝I6......(9)
the method is characterized in that the method is obtained by finishing (2) to (9):
the input current Iin is generally an ampere-level current, and the constant current source is a microampere level current, so that 2 x I1 in the denominator of the formula can be ignored, iout obtained by attenuation in a molecule is generally a microampere level, the bias current sources I1 and I5 are both microampere levels, and the I5 is designed to be a current value slightly smaller than the I1, so that the influence of constant current bias on attenuation multiple is reduced to the greatest extent. (10) The derivation of the formula is established, and the correctness of the design principle (1) formula is verified. The two sampling resistors Rp and Rs which are composed of a plurality of unit metal resistors with the same type and the same size can offset the influence of the process deviation and the temperature drift coefficient of the sampling resistor on the detection attenuation multiple, eliminate the influence factor of the sampling current on the process temperature characteristic of the resistor, and ensure the accuracy, the high precision and the reliability of the current detection attenuation multiple. The invention solves the problem that nondestructive detection, smaller PCB area and adjustable peak current can not be achieved in the prior art, the detection precision of the current detection method is irrelevant to the process temperature characteristic of the sampling resistor, and the detection purpose of providing the detection current signal capable of representing the magnitude of the input switch current with high accuracy and reliability is realized.
Fig. 7 is a waveform diagram illustrating the operation of the current detection circuit in the switching power supply system according to the embodiment of the invention. The DCM (discontinuous) operation mode is exemplified here, but it should be noted that the present invention has the same effect on current detection in CCM (continuous) mode.
In the t1 time period, the GATE signal Is low level to control the power switch tube to turn off, during which the Drain electrode Drain of the switch tube Is connected to the input voltage VIN through the primary side inductor of the transformer, so that the Drain electrode Drain of the switch tube presents a high-voltage waveform equal to the input voltage, the secondary side inductor of the transformer starts to demagnetize, and the secondary side current Is gradually decreases from the peak current Ispk to 0; entering a t2 period, wherein the secondary side current is reduced to 0 at the stage, but the power switch tube is not opened yet, and the Drain electrode Drain terminal voltage of the switch tube presents a high-voltage ringing waveform under the charge and discharge action of leakage inductance, so that the power switch tube is also called as a ringing stage of an intermittent mode; the current Iin flowing into the current detection circuit from the primary side in the time period of t1 and t2 is 0 due to the turn-off of the power switch tube, and the voltage drop VCS on the current sense pin CS is also 0; until the power switch tube is started, a stage t3 is entered, the primary winding is excited, and the primary current Iin gradually rises to Ipk; generating a waveform of the output signal terminal IOUT in fig. 7 through attenuation of the current detection circuit 100, namely, attenuating current of M times of Iin, assuming that Rp is a parallel value of 30 unit metal resistors r and Rs is a serial value of 30 unit metal resistors r, the attenuated current IOUT obtained through the current detection circuit 100 is 1/900 of the input inductance current; finally, the output current Iout drops on a detection resistor outside the chip to generate VCS voltage for the internal current loop circuit to adopt to control a loop. The magnitude of VCS voltage is equal to rcs_ipk/(m_n), and corresponds to two external application schemes of the output signal terminal IOUT of the current detection circuit 100 and the detection resistor with adjustable magnitude of the chip periphery shown in fig. 5, two calculation modes are also corresponding to the magnitude of VCS voltage, that is, rcs 1_ipk/(m_n) and Rcs 2_ipk/(m_n).
The invention has the beneficial effects that:
in order to solve the problem that nondestructive testing, smaller PCB cost and adjustable peak current cannot be achieved in the prior art, the circuit provided by the preferred embodiment of the invention is adopted. Compared with the prior art, 1) a plurality of metal root resistors connected in parallel are used for receiving switching current on a main power loop, the resistance is as low as 10 milliohms (10 mΩ), even if the input current has ampere (A) level, the loss on the parallel metal resistors is small, which is equivalent to realizing nondestructive detection; 2) The two sampling resistors in the circuit are respectively connected in parallel and in series based on the unit resistors with the same type and the same size, and when the layout is drawn, the matching of the two sampling resistors is noted, so that the influence of the process deviation and the temperature drift coefficient of the resistors on the detection attenuation multiple can be counteracted, the detection current is not influenced by the process temperature characteristic of the resistor, and the accuracy, the high precision and the reliability of the current detection attenuation multiple are ensured; 3) The peak voltage can be adjusted only by connecting the detection resistor outside the chip with the current detection signal attenuated by the current detection circuit, and the detection resistor can be properly increased (generally k omega level) on the premise of ensuring that the MOS tube inside the chip works in a saturation region because the output current is determined, so that a larger peak voltage value can be obtained, the signal-to-noise ratio of the detection signal under light load is improved, and the anti-interference capability of the detection is enhanced; 4) The circuit provided by the preferred embodiment of the invention can be integrated in a chip of a CMOS process, can be integrated in a control chip, can also be independently made into a chip for replacing a transformer for system application, saves the PCB layout area and the packaging pins, ensures that the whole switching power supply has low cost and small volume, and is beneficial to the improvement of the power density of the switching power supply.
Claims (9)
1. A current detection circuit for detecting a current in a switching power supply, comprising:
the input signal end and the output signal end, and also comprises an input circuit and a differential current detection amplifier,
the input circuit comprises two sampling resistors, wherein the two sampling resistors are composed of a plurality of unit metal resistors with the same type and the same size, and the unit metal resistors form different resistance values according to the set current attenuation factors in a parallel connection mode and a serial connection mode, and are respectively a first sampling resistor with a smaller resistance value and a second sampling resistor with a larger resistance value; the two sampling resistors are respectively connected to two input ends of the differential current detection amplifier; wherein, the liquid crystal display device comprises a liquid crystal display device,
the input signal end receives the detected current signal and drops on the first sampling resistor to generate a first current signal reflecting the actual current; the voltage on the two sampling resistors is equal through the differential current detection amplifier, so that an attenuation current signal is generated through the second sampling resistor according to the current attenuation multiple, and then the attenuation current signal is mirrored through the differential current detection amplifier and is output to the output signal end;
the differential current detection amplifier comprises a differential operational amplifier unit, an error cancellation branch, an adjusting branch and an output branch which are sequentially connected, a first input end connected with a first output end of an input circuit and a second input end connected with a second output end of the input circuit,
the differential operational amplifier unit comprises a first branch, a second branch, a third branch and a fourth branch, a first transistor and a third transistor pair, a second transistor and a fourth transistor pair which form a differential input transistor pair;
the first branch is a constant current circuit comprising a first constant current source generated by an internal reference and is connected with a first output end of the input circuit through a first transistor;
the second branch is a current branch in mirror image relation with the fourth branch and is connected with a second output end of the input circuit through a second transistor;
the third branch is a current branch obtained by mirroring the first constant current source and is connected with a first output end of the input circuit through a third transistor;
the fourth branch is a current branch in mirror image relation with the second branch, and the mirror image is equal to the current of the third branch after being added with the error counteracting branch, and is connected with the second output end of the input circuit through a fourth transistor;
the error cancellation branch is a constant current circuit comprising a second constant current source which is slightly smaller than the first constant current source and is generated by an internal reference;
the adjusting branch is connected between the second input end of the differential current detection amplifier and the output of the differential operational amplifier unit;
the output branch is an image current branch and is used for outputting an attenuated current signal after proportional attenuation.
2. The current detection circuit of claim 1, wherein: the input circuit comprises a first sampling resistor and a second sampling resistor, wherein the resistance value of the first sampling resistor is the parallel value of N unit metal resistors, and the resistance value of the second sampling resistor is the serial value of M unit metal resistors; the current attenuation multiple of the input circuit is M times N times.
3. The current detection circuit according to claim 1 or 2, characterized in that: the first end of the first sampling resistor is also led out to serve as a first output end of the input circuit; the second end of the first sampling resistor is grounded; the first end of the second sampling resistor is led out to serve as a second output end of the input circuit; the second end of the second sampling resistor is grounded.
4. The current detection circuit of claim 1, wherein: the first branch comprises a first constant current source and a first field effect transistor, the first end of the first constant current source is connected to a power supply voltage, the second end of the first constant current source is connected with the drain electrode of the first field effect transistor, the grid electrode of the first field effect transistor is connected with the drain electrode of the first field effect transistor, and the source electrode of the first field effect transistor is connected to the base electrode of the first transistor; the collector and the base of the first transistor are connected together, the emitter of the first transistor is connected with the emitter of the third transistor, and the first input end serving as a differential current detection amplifier is led out;
the second branch consists of a second field effect transistor and a fifth field effect transistor, the source electrode of the fifth field effect transistor is connected to the power supply voltage, the grid electrode and the drain electrode of the fifth field effect transistor are connected together and connected to the drain electrode of the second field effect transistor in parallel, the grid electrode of the second field effect transistor is connected with the grid electrode of the first field effect transistor, and the source electrode of the second field effect transistor is connected to the collector electrode of the second transistor; the base electrode of the second transistor is connected to the base electrode of the first transistor, the emitter electrode of the second transistor is connected with the emitter electrode of the fourth transistor, and the second input end serving as a differential current detection amplifier is led out;
the third branch consists of a third field effect transistor and a sixth field effect transistor, the source electrode of the sixth field effect transistor is connected to the power supply voltage, the grid electrode and the drain electrode of the sixth field effect transistor are connected together and connected to the drain electrode of the third field effect transistor in parallel, the grid electrode of the third field effect transistor is connected with the grid electrode of the first field effect transistor, and the source electrode of the third field effect transistor is connected to the collector electrode of the third transistor; the base electrode of the third transistor is connected to the base electrode of the first transistor, and the emitter electrode of the third transistor is connected with the emitter electrode of the first transistor;
the fourth branch consists of a fourth field effect transistor and a seventh field effect transistor, the source electrode of the seventh field effect transistor is connected to the power supply voltage, the grid electrode of the seventh field effect transistor is connected with the grid electrode of the sixth field effect transistor, the drain electrode of the seventh field effect transistor is connected to the drain electrode of the fourth field effect transistor, the grid electrode of the fourth field effect transistor is connected with the grid electrode of the first field effect transistor, and the source electrode of the fourth field effect transistor is connected to the collector electrode of the fourth field effect transistor; the base electrode of the fourth transistor is connected to the base electrode of the first transistor, and the emitter electrode of the fourth transistor is connected with the emitter electrode of the second transistor and is used as a second input end of the differential current detection amplifier.
5. The current detection circuit of claim 1, wherein: the error cancellation branch comprises a second constant current source, a first end of the second constant current source is connected to the drain electrode of the fourth field effect transistor, and a second end of the second constant current source is grounded.
6. The current detection circuit of claim 1, wherein: the regulating branch circuit is composed of an eighth field effect transistor and a ninth field effect transistor, the source electrode of the eighth field effect transistor is connected to the power supply voltage, the grid electrode of the eighth field effect transistor is connected with the drain electrode of the seventh field effect transistor, and the drain electrode of the eighth field effect transistor is connected with the drain electrode of the ninth field effect transistor; the ninth field effect transistor gate is connected to the fourth field effect transistor gate and the ninth field effect transistor source is connected to the emitter of the fourth transistor.
7. The current detection circuit of claim 1, wherein: the output branch circuit is composed of a tenth field effect transistor and an eleventh field effect transistor, wherein the grid electrode and the source electrode of the tenth field effect transistor are respectively connected with the grid electrode and the source electrode of the eighth field effect transistor, the drain electrode of the tenth field effect transistor is connected with the drain electrode of the eleventh field effect transistor, the grid electrode of the eleventh field effect transistor is connected with the grid electrode of the fourth field effect transistor, and the source electrode of the eleventh field effect transistor is led out to serve as an output end of the current detection circuit.
8. The current detection circuit according to any one of claims 4 to 7, wherein: the circuit also comprises a first detection resistor, wherein one end of the first detection resistor is connected with the output signal end of the current detection circuit and is led out to serve as a current detection end; the other end of the first detection resistor is grounded.
9. A current detection method for detecting current in a switching power supply realized in a chip comprises the following steps:
sampling, namely receiving a detected current signal by an input signal end, dropping the current signal on a first sampling resistor, and generating a first current signal reflecting actual current; the voltages on the two sampling resistors are equal through a differential current detection amplifier, so that an attenuation current signal is generated through a second sampling resistor according to the current attenuation multiple;
an image output step of outputting an attenuated current signal image to an output signal end through a differential current detection amplifier;
wherein, the two sampling resistors are composed of a plurality of unit metal resistors with the same type and the same size, the resistance of the first sampling resistor is the parallel value of N unit metal resistors, and the resistance of the second sampling resistor is the serial value of M unit metal resistors; the current attenuation multiple is M times and N times.
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| CN201710966758.4A CN107765067B (en) | 2017-10-17 | 2017-10-17 | Current detection circuit and current detection method |
| PCT/CN2018/094970 WO2019076092A1 (en) | 2017-10-17 | 2018-07-09 | Current detection circuit and current detection method |
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| CN107765067B (en) * | 2017-10-17 | 2023-07-07 | 深圳南云微电子有限公司 | Current detection circuit and current detection method |
| CN111208337A (en) * | 2020-01-10 | 2020-05-29 | 南京能瑞自动化设备股份有限公司 | Current sampling circuit and current detection system |
| CN112710886B (en) * | 2020-12-02 | 2023-03-28 | 江苏应能微电子有限公司 | Current sampling circuit |
| CN113252949B (en) | 2021-05-13 | 2021-11-05 | 北京芯格诺微电子有限公司 | High-precision current sampling circuit with on-chip real-time calibration |
| CN113466538B (en) * | 2021-07-06 | 2022-03-22 | 上海泰矽微电子有限公司 | Small current detection circuit in load switch and detection method thereof |
| CN115236481B (en) * | 2022-05-24 | 2023-10-27 | 上海沛塬电子有限公司 | High-precision current detection method and chip module thereof |
| CN115932363B (en) * | 2022-12-16 | 2023-11-17 | 无锡中微爱芯电子有限公司 | Offset voltage adjustable high-side current detection circuit |
| CN116559522B (en) * | 2023-07-11 | 2023-09-15 | 苏州锴威特半导体股份有限公司 | Low-temperature drift low-voltage detection circuit |
| CN117110403B (en) * | 2023-08-03 | 2024-01-30 | 天津大学 | Gas-sensitive field effect transistor drain gate voltage excitation and source-drain current acquisition system and method |
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