CN107734842A - A kind of method for lifting high density hole printed circuit board (PCB) reliability - Google Patents
A kind of method for lifting high density hole printed circuit board (PCB) reliability Download PDFInfo
- Publication number
- CN107734842A CN107734842A CN201710867239.2A CN201710867239A CN107734842A CN 107734842 A CN107734842 A CN 107734842A CN 201710867239 A CN201710867239 A CN 201710867239A CN 107734842 A CN107734842 A CN 107734842A
- Authority
- CN
- China
- Prior art keywords
- circuit board
- printed circuit
- pad
- pcb
- hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10212—Programmable component
Abstract
The present invention provides a kind of method for lifting high density hole printed circuit board (PCB) reliability, including：Through hole for needing 0.5mm pitch-rows in printed circuit board, one of the hole Top layers and Bottom layers in adjacent two holes are changed to pad PAD；Pad PAD is led to lead from TOP layers region the outer side perforating of BGA area；Circuit on the outside of BGA area is then connected to the pad PAD for itself there was only 0.5mm pitch-rows after connecting the circuit of Bottom layers by side through hole outside BGA area.By the above method, for the scheme of part 0.5mm holes centre-to-centre spacing chip design in need, its printed circuit board (PCB) can ensure product reliability using common material, through hole processing procedure.
Description
Technical field
The present invention relates to board design field, and in particular to a kind of side for lifting high density hole printed circuit board (PCB) reliability
Method.
Background technology
In field of electronic design, circuit board is the physical support of all Electronic Design contents, what all Electronic Designs were intended to
Final realize will be realized by the design of circuit board.So board design is indispensable one in any electronic equipment
Individual link.
As server chips encapsulate less and less, segment chip requirement hole closeness more and more higher, segment chip requirement
Hole centre distance is 0.5mm, and the common material of similar designing printed circuit board, through hole processing procedure, and product reliability is present
Greater risk, printed circuit board (PCB) produces the safety problem such as layering, electric leakage under serious conditions, and using the process bands of laser drill come
Be the double of cost.
The content of the invention
In order to solve the above technical problems, it is a kind of side for lifting high density hole printed circuit board (PCB) reliability that the present invention, which provides,
Method, it is specific as follows：
The method for lifting high density hole printed circuit board (PCB) reliability, wherein printed circuit board (PCB) include TOP layers and Bottom layers,
Comprise the following steps：
SS1：Through hole for needing 0.5mm pitch-rows in printed circuit board, by one of hole Top in adjacent two holes
Layer and Bottom layers are changed to pad PAD；
SS2：Pad PAD is led to lead from TOP layers region the outer side perforating of BGA area；
SS3：Circuit on the outside of BGA area is then connected to after connecting the circuit of Bottom layers by side through hole outside BGA area
Itself only has the pad PAD of 0.5mm pitch-rows.
Further, the anti-welding windows of BGA use square chamfer design.
Further, the PAD chamferings near lead are adjusted to circular arc or rectilinear angle.
Further, the anti-welding windows of BGA use circular design.
By the above method, for the scheme of part 0.5mm holes centre-to-centre spacing chip design in need, its printed circuit board (PCB) makes
It can ensure product reliability with common material, through hole processing procedure.
Brief description of the drawings
Fig. 1 is printed circuit board (PCB) Top layers view and Bottom layer views.
Fig. 2 is the printed circuit board (PCB) Top layer views of the application present invention.
Embodiment
Technical scheme is further illustrated below in conjunction with Figure of description and specific embodiment.It should be appreciated that this
The specific embodiment of place description is not intended to limit the present invention only to explain the present invention.
Fig. 1 is printed circuit board (PCB) Top layers view and Bottom layer views.
Fig. 2 is the printed circuit board (PCB) Top layer views of the application present invention.
The method for lifting high density hole printed circuit board (PCB) reliability, wherein printed circuit board (PCB) include TOP layers and Bottom layers,
Method comprises the following steps：
SS1：Through hole for needing 0.5mm pitch-rows in printed circuit board, by one of hole Top in adjacent two holes
Layer and Bottom layers are changed to pad PAD；
SS2：From TOP layers region pad PAD BGA (Ball Grid Array, welded ball array encapsulation) is led to lead
The outer side perforating in region；
SS3：Circuit on the outside of BGA area is then connected to itself only after connecting the circuit of Bottom layers by through hole
The pad PAD of 0.5mm pitch-rows.
Such as：A kind of part following demand of 0.5mm holes centre-to-centre spacing chip in need from Top faces, it is necessary to get through hole so as to chain
Connect the circuit in Bottom faces, and pitch-row requirement is 0.5mm, as shown in fig. 1, between the hole that thick line portion is connected in figure between
Away from for 0.5mm.
The through hole of 0.5mm pitch-rows is needed for this part, as shown in Fig. 2 first adjacent two holes of printed circuit board its
In a hole top layer and bottom layers be changed to PAD, related PAD is drawn out to lead from TOP layers to BOTTOM subregions
Hole connection is got through on the outside of BGA (Ball Grid Array, welded ball array encapsulation) region, at this moment original two hole pitch-rows only have
0.5mm pitch-row is just changed into beside 1 hole be PAD and circuit, and the circuit on the outside of BGA area gets through hole outside by BGA area
Connection, realize that signal transmits, avoid because the relatively near caused related trusted risk of pitch-row.
According to one embodiment of the invention, the anti-welding windows of BGA use square chamfer design.
According to one embodiment of the invention, when the anti-welding windows of BGA use square chamfer design, the PAD chamferings near lead are adjusted
It is made into circular arc or rectilinear angle, an anti-leak-stopping copper phenomenon.
According to one embodiment of the invention, the anti-welding windows of BGA use circular design.
The bright spot of the present invention is：
Product reduces the rising of cost, while avoid because of pitch-row too using common material, common through hole processing procedure
Reliability risk caused by near.
Described above be only it is illustrative, and it is to be understood that it is described herein arrangement and details modification and
Change will be apparent to those skilled in the art.It is therefore intended that only by scope of the following claims rather than by
The specific detail that is presented limits by way of above description and explaining.
Claims (4)
1. a kind of method for lifting high density hole printed circuit board (PCB) reliability, wherein printed circuit board (PCB) include TOP layers and Bottom
Layer, it is characterised in that comprise the following steps：
SS1：Through hole for needing 0.5mm pitch-rows in printed circuit board, by one of hole Top layers in adjacent two holes and
Bottom layers are changed to pad PAD；
SS2：Pad PAD is led to lead from TOP layers region the outer side perforating of BGA area；
SS3：Circuit on the outside of BGA area is then connected to itself after connecting the circuit of Bottom layers by side through hole outside BGA area
The only pad PAD of 0.5mm pitch-rows.
2. the method for lifting high density hole according to claim 1 printed circuit board (PCB) reliability, the anti-welding windows of wherein BGA use
Square chamfer design.
3. the method for lifting high density hole according to claim 2 printed circuit board (PCB) reliability, the PAD wherein near lead
Chamfering is adjusted to circular arc or rectilinear angle.
4. the method for lifting high density hole according to claim 1 printed circuit board (PCB) reliability, the anti-welding windows of wherein BGA use
Circular design.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710867239.2A CN107734842A (en) | 2017-09-22 | 2017-09-22 | A kind of method for lifting high density hole printed circuit board (PCB) reliability |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710867239.2A CN107734842A (en) | 2017-09-22 | 2017-09-22 | A kind of method for lifting high density hole printed circuit board (PCB) reliability |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN107734842A true CN107734842A (en) | 2018-02-23 |
Family
ID=61207812
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710867239.2A Pending CN107734842A (en) | 2017-09-22 | 2017-09-22 | A kind of method for lifting high density hole printed circuit board (PCB) reliability |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107734842A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111988906A (en) * | 2019-05-22 | 2020-11-24 | 浙江宇视科技有限公司 | Printed circuit board and light emitting diode module board |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5784262A (en) * | 1995-11-06 | 1998-07-21 | Symbios, Inc. | Arrangement of pads and through-holes for semiconductor packages |
| CN1805664A (en) * | 2004-11-19 | 2006-07-19 | 阿尔卡特公司 | Off-width pitch for improved circuit card routing |
| CN1913747A (en) * | 2005-08-10 | 2007-02-14 | 阿尔卡特公司 | Using rows/columns of micro-vias in a BGA interconnect grid to create improved PCB routing channels |
| CN1914962A (en) * | 2004-02-04 | 2007-02-14 | 皇家飞利浦电子股份有限公司 | Method for increasing a routing density for a circuit board and such a circuit board |
| CN1942046A (en) * | 2005-08-10 | 2007-04-04 | 阿尔卡特公司 | Alternating micro-vias and through-hole in order to create improved PCB routing channels |
| CN101488460A (en) * | 2008-01-15 | 2009-07-22 | 松下电器产业株式会社 | Substrate and manufacturing method of the same |
| CN101932207A (en) * | 2010-09-06 | 2010-12-29 | 创扬通信技术（深圳）有限公司 | Multilayer PCB (Printed Circuit Board) and design method thereof |
| CN201789682U (en) * | 2010-07-23 | 2011-04-06 | 中兴通讯股份有限公司 | Four-layered through-hole printed circuit board and mobile terminal employing same |
-
2017
- 2017-09-22 CN CN201710867239.2A patent/CN107734842A/en active Pending
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5784262A (en) * | 1995-11-06 | 1998-07-21 | Symbios, Inc. | Arrangement of pads and through-holes for semiconductor packages |
| CN1914962A (en) * | 2004-02-04 | 2007-02-14 | 皇家飞利浦电子股份有限公司 | Method for increasing a routing density for a circuit board and such a circuit board |
| CN1805664A (en) * | 2004-11-19 | 2006-07-19 | 阿尔卡特公司 | Off-width pitch for improved circuit card routing |
| CN1913747A (en) * | 2005-08-10 | 2007-02-14 | 阿尔卡特公司 | Using rows/columns of micro-vias in a BGA interconnect grid to create improved PCB routing channels |
| CN1942046A (en) * | 2005-08-10 | 2007-04-04 | 阿尔卡特公司 | Alternating micro-vias and through-hole in order to create improved PCB routing channels |
| CN101488460A (en) * | 2008-01-15 | 2009-07-22 | 松下电器产业株式会社 | Substrate and manufacturing method of the same |
| CN201789682U (en) * | 2010-07-23 | 2011-04-06 | 中兴通讯股份有限公司 | Four-layered through-hole printed circuit board and mobile terminal employing same |
| CN101932207A (en) * | 2010-09-06 | 2010-12-29 | 创扬通信技术（深圳）有限公司 | Multilayer PCB (Printed Circuit Board) and design method thereof |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111988906A (en) * | 2019-05-22 | 2020-11-24 | 浙江宇视科技有限公司 | Printed circuit board and light emitting diode module board |
| CN111988906B (en) * | 2019-05-22 | 2022-04-29 | 浙江宇视科技有限公司 | Printed circuit board and light emitting diode module board |
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| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20180223 |