CN107703690B - 一种阵列基板及显示面板 - Google Patents

一种阵列基板及显示面板 Download PDF

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CN107703690B
CN107703690B CN201710887760.2A CN201710887760A CN107703690B CN 107703690 B CN107703690 B CN 107703690B CN 201710887760 A CN201710887760 A CN 201710887760A CN 107703690 B CN107703690 B CN 107703690B
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thin film
film transistor
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CN107703690A (zh
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张婷婷
王聪
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Wuhan China Star Optoelectronics Technology Co Ltd
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Wuhan China Star Optoelectronics Technology Co Ltd
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
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Abstract

本发明公开了一种阵列基板及显示面板，所述阵列基板包括多条相交设置的扫描线和数据线，以形成多个像素单元；将所述多个像素单元沿着所述扫描线划分为第一区域和第二区域，所述第一区域靠近扫描信号输入端，所述第二区域的每个像素单元包括第一薄膜晶体管和与第一薄膜晶体管连接的控制单元，控制单元用于减小第一薄膜晶体管所在像素单元的像素电压。本发明能够改善显示面板均一性的效果，提升面板的显示质量。

Description

一种阵列基板及显示面板
技术领域
本发明涉及显示技术领域，特别涉及一种阵列基板及显示面板。
背景技术
液晶显示器中使用的薄膜晶体管通常有非晶硅薄膜晶体管和多晶硅薄膜晶体管，其中，非晶硅薄膜晶体管随着使用时间的增加，其迁移率低，光敏退化性严重；而LTPS(LowTemperature Poly－silicon，低温多晶硅技术)则具有较高的迁移率和稳定性。
本申请的发明人在长期的研发中发现，目前LTPS面板进行GOA(Gate Driver onArray，阵列基板栅极驱动)设计时，通常采用单向驱动的隔行扫描模式，即左右两侧都设有GOA，按照扫描线扫描的时序进行间隔开启。由于扫描线上存在电阻－电容延迟，扫描线起始端与末端的信号就会存在差异，直接影响到扫描线起始端与末端的像素单元的像素电压。面板越大，扫描线越长，电阻－电容延迟就会越严重，扫描线两端的像素单元的像素电压差异就会越明显，导致面板两侧的亮度大于中间的亮度，出现显示不均。
发明内容
本发明主要解决的技术问题是提供一种阵列基板及显示面板，能够改善显示面板均一性的效果，提升面板的显示质量。
为解决上述技术问题，本发明采用的一个技术方案是提供一种阵列基板，包括：
多条扫描线；
多条数据线，与所述多条扫描线相交设置，以形成多个像素单元；
其中，将所述多个像素单元沿着所述扫描线划分为第一区域和第二区域，所述第一区域靠近扫描信号输入端，所述第二区域远离所述扫描信号输入端，所述第二区域的每个像素单元包括第一薄膜晶体管和与所述第一薄膜晶体管连接的控制单元，所述控制单元用于减小所述第一薄膜晶体管所在像素单元的像素电压；所述第一区域的每个像素单元包括第二薄膜晶体管。
为解决上述技术问题，本发明采用的另一个技术方案是提供一种显示面板，包括如上述的阵列基板。
本发明通过在远离扫描信号输入端的第二区域的每个像素单元设置控制单元，减小第二区域的像素单元的像素电压，以使多个像素单元的像素电压一致，解决面板左右两侧泛白的问题，使显示面板的显示效果更均匀，显示画面质量更高。
附图说明
图1是本发明阵列基板一实施例的结构示意图；
图2是本发明阵列基板一实施例中第二区域的像素单元的结构示意图；
图3是本发明阵列基板一实施例中第一区域的像素单元的驱动波形示意图；
图4是本发明阵列基板一实施例中第二区域的像素单元的驱动波形示意图；
图5是本发明阵列基板另一实施例的结构示意图；
图6是是本发明阵列基板另一实施例的第一区域的像素单元的结构示意图；
图7是本发明显示面板实施例的结构示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述。
本发明提供第一实施例的阵列基板。请参见图1，本实施例所揭示的阵列基板包括：
多条扫描线Gn，本实施例以扫描线G1至G5为例进行说明；
多条数据线Dn，本实施例以数据线D1至D10为例进行说明，与多条扫描线Gn相交设置，以形成多个像素单元10；
其中，将多个像素单元10沿着扫描线Gn的方向划分为第一区域A和第二区域B，第一区域A靠近扫描信号输入端，第二区域B远离所述扫描信号输入端。第二区域B的每个像素单元101包括第一薄膜晶体管T1和与第一薄膜晶体管T1连接的控制单元1011，控制单元1011用于减小第一薄膜晶体管所在像素单元101的像素电压；第一区域A的每个像素单元102包括第二薄膜晶体管T2。
具体的，阵列基板在两侧GOA驱动电路(图中未示出)的驱动下进行隔行扫描，即右侧的GOA驱动电路向奇数行扫描线输入扫描信号，左侧的GOA驱动电路向偶数行扫描线输入扫描信号，且奇数行和偶数行的扫描信号依次交替输入。
可选的，也可以通过右侧的GOA驱动电路向偶数行扫描线输入扫描信号，通过左侧的GOA电路向奇数行扫描线输入扫描信号。
其中，第一区域A和第二区域B可以以中间线，即每条扫描线Gn的中点连线划分，例如当前行扫描信号从右侧输入，右半侧的多个像素单元10为第一区域A，左半侧的多个像素单元10为第二区域B；也可以以当前行的泛白区域划分，例如当前行扫描信号从右侧输入，将当前行中左侧边缘泛白的区域划分为第二区域B，将当前行中右侧边缘，即当前行无泛白的区域划分为第一区域A；还可以以不同行的泛白区域划分，例如当前扫描信号从右侧输入，将当前行中左侧边缘泛白的区域划分为第二区域B，将对应下一行泛白的区域划分为第一区域A。
参见图1至图4，在第二区域B的像素单元101中，控制单元1011包括第三薄膜晶体管T3和第一电容C1，第三薄膜晶体管T1的漏极连接第三薄膜晶体管T3所在的像素单元101的像素电极，第三薄膜晶体管T3的栅极连接下一行扫描线G2，第三薄膜晶体管T3的源极通过第一电容C1接地，其中，第一电容C1由第一薄膜晶体管T1的源极与公共电极等效构成。第二区域B的像素单元101还包括第一液晶电容C2以及第一存储电容C3，第一薄膜晶体管T1的源极与数据线D1连接，第一薄膜晶体管T1的栅极与当前的扫描线G1连接，第一薄膜晶体管T1的漏极连接第一薄膜晶体管T1所在像素单元101的像素电极，其中，第一液晶电容C2由第一薄膜晶体管T1所在像素单元101的像素电极和彩膜基板(图中未示出)上的公共电极等效构成，第一存储电容C3由第一薄膜晶体管T1所在像素单元101的像素电极与阵列基板上的其他金属线等效构成。
其中，第三薄膜晶体管T3的漏极连接在第一液晶电容C2的一端和第一存储电容C3的一端之间。
在当前的扫描线G1输入扫描信号Vg1，即扫描线G1在右侧输入扫描信号，此时第二区域B的像素单元101中，当前行的第三薄膜晶体管T3断开，当前行的第一薄膜晶体管T1导通，当前行的第二薄膜晶体管T2导通；下一行扫描线G2的输入端与当前扫描线G1的输入端相反，即扫描线G2在左侧输入扫描信号，且下一行扫描线G2上的第二区域B的像素单元101与当前扫描线G1上的第二区域B的像素单元101位于不同的数据线上；在当前行的下一行扫描线G2输入扫描信号Vg2，此时第二区域B的像素单元101中，第三薄膜晶体管T3导通，当前行的第一薄膜晶体管T1断开，当前行的第二薄膜晶体管T2断开，当前行的第三薄膜晶体管T3用于将当前行的像素电压拉低。
具体的，当前的扫描线G1输入扫描信号Vg1时，第三薄膜晶体管T3断开，第一薄膜晶体管T1导通，第二薄膜晶体管T2导通，数据线D1输入电压，此时第二区域B的像素单元101中的第一薄膜晶体管T1源极电压为Vd1，栅极电压为Vg11′，像素电压(即漏极电压)为Vs11′；第一区域A中的像素单元102中的薄膜晶体管T2源极电压为Vd2，栅极电压为Vg11，像素电压(即漏极电压)为Vs11；然后当前扫描线G1上的扫描信号Vg1断开，使第一薄膜晶体管T1断开，此时第二区域B的像素单元101中的第一薄膜晶体管1源极电压为Vd1，栅极电压为Vg12′，像素电压为Vs12′；第一区域A中的像素单元102中的薄膜晶体管T2源极电压为Vd2，栅极电压为Vg12，像素电压(即漏极电压)为Vs12；由于第二区域B的像素单元101内的元件会在高频下产生电容联系，即产生寄生电容Cgs，根据电荷不减定律，馈通(feed through)电压ΔV＝(Vg11-Vg12)*Cgs/(Cgs+C2+C3)；同时馈通电压ΔV＝Vd-Vs12，所以Vs12＝Vd-(Vg11-Vg12)*Cgs/(Cgs+C2+C3)。
具体的，第一区域A中的像素单元102靠近扫描信号Vg1，当第一薄膜晶体管T1和第二薄膜晶体管T2断开，Vg在很短的时间内下降，使得Vg11与Vg12的差值较大，即馈通电压ΔV较大，对应像素电压Vs12较小，显示亮度正常；第二区域B的像素单元101远离扫描信号Vg1，当第一薄膜晶体管T1和第二薄膜晶体管T2断开，第二区域B的像素单元101产生电阻电容延迟，Vg′下降延缓，使得Vg11′与Vg12′的差值较小，即馈通电压ΔV′较小，对应像素电压Vs12′较大，显示亮度较高，在屏幕上出现亮点。当下一行扫描线G2输入扫描信号Vg2，第三薄膜晶体管T3导通，根据电荷共享原理，将第二区域B的像素单元101的像素电压Vs12′拉低，并且被拉低后的第二区域B的像素单元101的像素电压(图中未示出)与第一区域A的像素单元102的像素电压Vs12的值相等。由于当前扫描线G1上的扫描信号Vg1与下一行扫描线G2的扫描信号Vg2输入的时间间隔较短，人眼无法分辨，用户能够看到的是经过第三薄膜晶体管T3作用后第二区域B的像素单元101，因此第二区域B的像素单元101的显示亮度与第一区域A的像素单元102的显示亮度相同。类似的，多行扫描线依次扫描，在第二区域B的像素单元101中的第三薄膜晶体管T3的作用下，拉低靠近扫描信号输入端的第二区域B的像素单元101中的像素电压，使得第二区域B的像素单元101中的像素电压与第一区域A的像素单元102中的像素电压相等，两侧显示亮度相同。
本发明实施例通过在远离扫描信号输入端的第二区域的每个像素单元设置控制单元，减小第二区域的像素单元的像素电压，以使多个像素单元的像素电压一致，解决面板左右两侧泛白的问题，使显示面板的显示效果更均匀，显示画面质量更高。
本发明进一步提供第二实施例的阵列基板。请参见图5和图6，本实施例所揭示的阵列基板包括：
多条扫描线Gn，本实施例以扫描线G1至G5为例进行说明；
多条数据线Dn，本实施例以数据线D1至D10为例进行说明，与多条扫描线Gn相交设置，以形成多个像素单元10；
其中，将多个像素单元10沿着扫描线Gn的方向划分为第一区域A和第二区域B，第一区域A靠近扫描信号输入端，第二区域B远离所述扫描信号输入端。第二区域B的每个像素单元101包括第一薄膜晶体管T1和与第一薄膜晶体管T1连接的控制单元1011，控制单元1011用于减小第一薄膜晶体管T1所在像素单元101的像素电压；，第一区域A的每个像素单元包括第二薄膜晶体管T2和第四薄膜晶体管T4
具体的，第一区域A的每个像素单元还包括第二液晶电容C4、第二存储电容C5、第二电容C6和第三电容C7，第二薄膜晶体管T2的源极与数据线D6连接，第二薄膜晶体管T2的栅极与当前的扫描线G1连接，第二薄膜晶体管T2的漏极连接第二薄膜晶体管T2所在的像素单元102的像素电极，其中，第二液晶电容C4由第二薄膜晶体管T2所在像素单元102的像素电极和彩膜基板(图中未示出)上的公共电极等效构成，第二存储电容C5由第二薄膜晶体管T2所在像素单元102的像素电极与阵列基板上的其他金属线等效构成。第四薄膜晶体管T4的栅极连接下一行扫描线，第四薄膜晶体管T4的源极通过第二电容C6接地，第四薄膜晶体管T4的漏极通过第三电容C7接地，其中，第二电容C6由第四薄膜晶体管T4的源极与公共电极等效构成，第三电容C7由第四薄膜晶体管T4的漏极与公共电极等效构成。由于制备阵列基板时并不确定当前扫描线的输入方向，所以在第一区域A的像素单元102中设置第四薄膜晶体管T4，以根据扫描线的输入方向调整控制单元1011和第四薄膜晶体管T4的连接，同时保证了液晶面板的一致性。
本发明实施例通过在远离扫描信号输入端的第二区域的每个像素单元设置控制单元，在靠近扫描信号输入端的第一区域的每个像素单元设置薄膜晶体管，减小第二区域的的像素电压，以使多个像素单元的像素电压一致，保持面板的一致性，解决面板左右两侧泛白的问题，使显示面板的显示效果更均匀，显示画面质量更高。
本发明进一步提供一实施例的显示面板，请参见图7，本发明显示面板实施例包括：
第一基板701、第二基板702和位于第一基板701和第二基板702之间的液晶层703，其中第一基板701为阵列基板，该阵列基板为上述实施例所揭示的阵列基板，在此不再赘述。
本发明实施例通过在远离扫描信号输入端的第二区域的每个像素单元设置控制单元，减小第二区域的像素单元的像素电压，以使多个像素单元的像素电压一致，解决面板左右两侧泛白的问题，使显示面板的显示效果更均匀，显示画面质量更高。
以上所述仅为本发明的实施方式，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (6)

1.一种阵列基板，其特征在于，所述阵列基板包括：
多条扫描线；
多条数据线，与所述多条扫描线相交设置，以形成多个像素单元；
其中，将所述多个像素单元沿着所述扫描线划分为第一区域和第二区域，所述第一区域靠近扫描信号输入端，所述第二区域远离所述扫描信号输入端，所述第二区域的每个像素单元包括第一薄膜晶体管和与所述第一薄膜晶体管连接的控制单元，所述控制单元用于减小所述第一薄膜晶体管所在像素单元的像素电压；所述第一区域的每个像素单元包括第二薄膜晶体管；
所述控制单元包括第三薄膜晶体管和第一电容，所述第三薄膜晶体管的漏极连接所述第三薄膜晶体管所在像素单元的像素电极，所述第三薄膜晶体管的栅极连接下一行扫描线；
所述第一薄膜晶体管的源极与所述数据线连接，所述第一薄膜晶体管的栅极与当前行的扫描线连接，所述第一薄膜晶体管的漏极连接所述第一薄膜晶体管所在像素单元的的像素电极；
在所述当前行的扫描线输入扫描信号时，所述当前行的第三薄膜晶体管断开，所述当前行的第一薄膜晶体管导通，所述当前行的第二薄膜晶体管导通；在所述当前行的下一行扫描线输入扫描信号时，所述当前行的第三薄膜晶体管导通，所述当前行的第一薄膜晶体管断开，所述当前行的第二薄膜晶体管断开，所述当前行的第三薄膜晶体管用于将所述当前行的像素电压拉低；
所述位于第二区域的第三薄膜晶体管用于将所述当前行的像素电压拉低至与所述第一区域的像素单元的像素电压相同。
2.根据权利要求1所述的阵列基板，其特征在于，所述第一区域的每个像素单元还包括第四薄膜晶体管，所述第四薄膜晶体管的栅极连接下一行扫描线。
3.根据权利要求1所述的阵列基板，其特征在于，所述第一区域和所述第二区域以每条所述扫描线的中点连线划分。
4.根据权利要求1所述的阵列基板，其特征在于，所述第一区域与所述第二区域以当前行的泛白区域划分，所述第一区域为对应当前行无泛白的区域，所述第二区域为对应当前行泛白的区域。
5.根据权利要求1所述的阵列基板，其特征在于，所述第一区域与所述第二区域以不同行的泛白区域划分，所述第一区域为对应当前行的下一行泛白的区域，所述第二区域为对应当前行泛白的区域。
6.一种显示面板，其特征在于，所述显示面板包括如权利要求1至5任一项所述的阵列基板。
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