CN107681030B - Novel LED chip with P-GaN film structure and preparation method thereof - Google Patents
Novel LED chip with P-GaN film structure and preparation method thereof Download PDFInfo
- Publication number
- CN107681030B CN107681030B CN201711005630.8A CN201711005630A CN107681030B CN 107681030 B CN107681030 B CN 107681030B CN 201711005630 A CN201711005630 A CN 201711005630A CN 107681030 B CN107681030 B CN 107681030B
- Authority
- CN
- China
- Prior art keywords
- layer
- gan
- led chip
- type semiconductor
- gan layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000002360 preparation method Methods 0.000 title abstract description 8
- 239000004065 semiconductor Substances 0.000 claims abstract description 31
- 239000000758 substrate Substances 0.000 claims abstract description 28
- 239000002184 metal Substances 0.000 claims abstract description 23
- 239000002105 nanoparticle Substances 0.000 claims abstract description 17
- 239000010408 film Substances 0.000 claims description 40
- 230000012010 growth Effects 0.000 claims description 30
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 claims description 11
- 229910052594 sapphire Inorganic materials 0.000 claims description 11
- 239000010980 sapphire Substances 0.000 claims description 11
- 238000005516 engineering process Methods 0.000 claims description 10
- 238000000034 method Methods 0.000 claims description 9
- 239000000463 material Substances 0.000 claims description 8
- 229910002704 AlGaN Inorganic materials 0.000 claims description 6
- 239000010409 thin film Substances 0.000 claims description 6
- 239000007769 metal material Substances 0.000 claims description 5
- 238000000137 annealing Methods 0.000 claims description 4
- 238000004519 manufacturing process Methods 0.000 claims description 4
- 238000004806 packaging method and process Methods 0.000 claims description 3
- 238000007747 plating Methods 0.000 claims description 2
- 208000012868 Overgrowth Diseases 0.000 abstract description 3
- 230000007773 growth pattern Effects 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000000605 extraction Methods 0.000 description 3
- 239000012071 phase Substances 0.000 description 3
- 239000000370 acceptor Substances 0.000 description 2
- 230000004913 activation Effects 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 238000004020 luminiscence type Methods 0.000 description 2
- 230000006911 nucleation Effects 0.000 description 2
- 238000010899 nucleation Methods 0.000 description 2
- 238000000927 vapour-phase epitaxy Methods 0.000 description 2
- 230000031700 light absorption Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/10—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
- Physics & Mathematics (AREA)
- Composite Materials (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Materials Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Led Devices (AREA)
Abstract
The invention discloses an LED chip with a novel P-GaN film structure and a preparation method thereof, wherein the LED chip comprises a substrate, a buffer layer, an n-type semiconductor layer, a quantum well and a P-type semiconductor layer, wherein the buffer layer, the n-type semiconductor layer, the quantum well and the P-type semiconductor layer are sequentially arranged on the substrate, and the P-type semiconductor layer comprises an Ag metal film formed by Ag nano particles. By adding an Ag metal film into the P-type semiconductor layer, lateral overgrowth can be promoted, dislocation annihilation is induced, and therefore the quality of the P-GaN film is improved, and meanwhile, the light efficiency of the LED can be improved.
Description
Technical Field
The invention relates to the field of LED chips, in particular to an LED chip with a novel P-GaN film structure and a preparation method thereof.
Background
Currently, the light emitting diode of GaN-based LEDs is determined by the internal quantum efficiency and the light extraction rate of the light emitting diode. The GaN-based LED mainly adopts sapphire as a substrate, and the p-type electrode and the n-type electrode of the LED chip can only be designed and manufactured on the same epitaxial surface of the chip due to the insulativity of the sapphire. A conventional GaN-based LED structure includes a substrate, an n-type semiconductor layer, a multiple quantum well active region, a p-type semiconductor layer, and a transparent conductive layer. Meanwhile, the Ag nano particles have a local surface plasma enhancement effect, and the quality of the P-GaN film and the light efficiency of the LED can be improved by applying the Ag nano particles to the P-type semiconductor layer.
Disclosure of Invention
In order to solve the problems, the invention aims to provide an LED chip with a novel P-GaN film structure and a preparation method thereof, and the quality of the P-GaN film and the light emitting efficiency of the LED chip are improved by changing the structure of the P-GaN film.
The invention solves the problems by adopting the following technical scheme:
the utility model provides a novel LED chip of P-GaN film structure which characterized in that: the semiconductor device comprises a substrate, an n-type semiconductor layer, a quantum well and a p-type semiconductor layer, wherein the n-type semiconductor layer, the quantum well and the p-type semiconductor layer are sequentially arranged on the substrate; the P-type semiconductor layer comprises a bottom layer P-GaN layer, a top layer P-GaN layer and an Ag metal film formed by Ag nano particles, wherein the Ag metal film is positioned between the bottom layer P-GaN layer and the top layer P-GaN layer, and the bottom layer P-GaN layer is arranged on the quantum well.
Further, the contact surface of the bottom layer P-GaN layer and the Ag metal film is of a flat layered structure or a non-flat island structure.
Further, the opposite surface of the contact surface of the top P-GaN layer and the Ag metal film is of a flat layered structure.
Further, the N-type semiconductor layer is an N-GaN layer, and the quantum well is an InGaN/GaN quantum well.
Further, the substrate is made of a sapphire material.
Further, a buffer layer is further included, and the buffer layer is disposed between the substrate and the n-type semiconductor layer.
Further, the buffer layer is made of AlGaN material.
The preparation method of the LED chip applying the novel P-GaN film structure is characterized by comprising the following steps of:
s1: sequentially arranging an n-type semiconductor layer and a quantum well on a substrate by using an MOCVD technology;
s2: setting a bottom P-GaN layer on the quantum well by using MOCVD technology;
s3: plating an Ag metal material on the bottom P-GaN layer, and then carrying out rapid high-temperature annealing, wherein the Ag metal material forms the Ag metal film;
s4: a top P-GaN layer is arranged on the Ag metal film by using an MOCVD technology;
s5: and packaging by selecting a normal structure, a flip-chip structure or a vertical structure.
Further, the annealing time in the step S3 is 30-120 seconds.
The beneficial effects of the invention are as follows: the invention relates to an LED chip with a novel P-GaN film structure and a preparation method thereof, comprising a substrate, an n-type semiconductor layer, a quantum well and a P-type semiconductor layer, wherein the P-type semiconductor layer comprises an Ag metal film formed by Ag nano particles. By using Ag nano particles as a mask, lateral overgrowth can be promoted, dislocation annihilation is induced, and therefore the quality of the P-GaN film is improved; meanwhile, the Ag nano particles have a local surface plasma enhancement effect, so that the hole concentration can be improved, and meanwhile, the defect luminescence can be effectively inhibited, so that the luminous efficiency of the LED is greatly improved; in addition, the Ag nano particles have high emissivity to light, and the light extraction efficiency of the P-GaN film to light can be greatly improved, so that the light efficiency of the LED is improved. The Ag nano particles are beneficial to reducing the resistance of the P-GaN film and improving the injection efficiency of holes; meanwhile, the activation energy of the Mg acceptors can be reduced.
Drawings
The invention is further described below with reference to the drawings and examples.
FIG. 1 is a specific structural diagram of an LED chip of a novel P-GaN thin film structure of the invention;
fig. 2 is a specific flowchart of a method for manufacturing an LED chip with a novel P-GaN thin film structure according to the present invention.
Detailed Description
Referring to fig. 1, a specific structure diagram of an LED chip of a novel P-GaN thin film structure of the present invention sequentially grows an AlGaN buffer layer 20, an N-GaN layer 30, an InGaN/GaN quantum well 40, and a P-GaN layer on a sapphire substrate 10 using an MOCVD technique, wherein the P-GaN layer includes a bottom P-GaN layer 51, a top P-GaN layer 53, and an Ag metal film formed of Ag nanoparticles 52, the Ag metal film being located between the bottom P-GaN layer 51 and the top P-GaN layer 53, and the bottom P-GaN layer 51 being grown on the quantum well. The thickness of the P-GaN layer is typically 300-500nm. The novel LED chip with the P-GaN film structure can be applied to normal mounting, flip mounting and vertical structures.
The substrate is made of a sapphire material, and typically, a GaN-based material and an epitaxial layer are grown mainly on the sapphire substrate 10. The sapphire substrate 10 has mature production technology, good device quality, good chemical stability of sapphire, small light absorption, and can be applied to the high-temperature growth process.
Since GaN is lattice mismatched with the sapphire substrate 10, it is very difficult to grow a flat and crack-free high quality GaN epitaxial layer, so that a two-stage growth method of growing AlN or GaN at low temperature as a buffer and then growing GaN at high temperature can be used to obtain a high quality GaN epitaxial layer with a flat surface like a mirror, low residual carrier concentration, and high electron mobility. Therefore, by introducing the AlGaN buffer layer 20, the stress of the epitaxial GaN material on the substrate is greatly relieved, and the crystal quality is improved, thereby improving the light emitting efficiency.
The P-GaN layer includes an Ag metal film formed of Ag nanoparticles 52. The Ag nano particles 52 are used as a mask, so that lateral overgrowth can be promoted, dislocation annihilation is induced, and the quality of the P-GaN film is improved; meanwhile, the Ag nano particles 52 have a local surface plasma enhancement effect, so that the hole concentration can be improved, and meanwhile, defect luminescence can be effectively inhibited, so that the luminous efficiency of the LED is greatly improved; in addition, the Ag nano particles 52 have high emissivity to light, and can greatly improve the light extraction efficiency of the P-GaN film, thereby improving the light efficiency of the LED. The Ag nano particles 52 are beneficial to reducing the resistance of the P-GaN film and improving the injection efficiency of holes; meanwhile, the activation energy of the Mg acceptors can be reduced.
The contact surface of the underlying P-GaN layer 51 and the Ag metal film, i.e., the a surface, may be a flat layered structure or a non-flat island structure. The facing surface of the contact surface of the top P-GaN layer 53 and the Ag metal film, i.e., the B surface, is a flat layered structure.
The planar layered structure or the non-planar island structure is determined by a growth pattern, wherein the layered growth pattern results in the formation of a planar layered structure and the island growth pattern results in the formation of a non-planar island structure.
The island growth mode means that after gas phase atoms adsorbed on the surface of a substrate are condensed, crystal nuclei are formed first, the nuclei continuously adsorb the gas phase atoms to form islands, and the islands adsorb the gas phase atoms to form a film. Island-like growth patterns are only likely to occur when the binding energy between the evaporated atoms is much stronger than the binding energy between the substrate atoms and the evaporated atoms. The island-shaped growth, i.e. the formation of nucleation islands simultaneously grows in the horizontal and vertical directions, with the surface roughness gradually increasing as the isolated nucleation islands grow.
The layered growth mode is to uniformly cover a layer on the surface of a substrate in the form of a monoatomic layer, and then sequentially grow a first layer, a second layer and a higher layer in a three-dimensional direction. The layered growth mode is only easily developed when the binding energy between the atoms of the substrate and the evaporated atoms is close to the binding energy between the evaporated atoms.
Referring to fig. 2, a specific flow chart of a preparation method of an LED chip with a novel P-GaN thin film structure according to the present invention is as follows:
s1: sequentially arranging a buffer layer, an n-type semiconductor layer and a quantum well on a substrate by using an MOCVD technology; an AlGaN buffer layer 20 is grown first on a sapphire substrate 10, then an N-GaN layer 30 is grown on the AlGaN buffer layer 20, and then an InGaN/GaN quantum well 40 is grown on the N-GaN layer 30.
S2: an underlying P-GaN layer 51 is provided on the quantum well using MOCVD techniques; the underlying P-GaN layer 51 is grown on the InGaN/GaN quantum well 40 in a two-dimensional layered growth, a three-dimensional island growth, or a combination of two-dimensional layered growth and three-dimensional island growth, and the difference in the growth patterns used may cause the shape structure of the a surface of the underlying P-GaN layer 51 to exhibit a flat layered structure or a non-flat island structure.
S3: an Ag metal material is plated on the underlying P-GaN layer 51 and then rapidly annealed at a high temperature for 30-120 seconds, thereby forming an Ag metal film composed of Ag nanoparticles 52 on the underlying P-GaN layer 51.
S4: providing a top P-GaN layer 53 on the Ag metal film using MOCVD techniques; the top layer P-GaN layer 53 is grown on the Ag metal film, and the growth mode in the front and middle stage of the growth of the top layer P-GaN layer 53 may be two-dimensional layered growth, three-dimensional island growth or a combination of two-dimensional layered growth and three-dimensional island growth, and the B surface of the top layer P-GaN layer 53 is flattened by adopting the two-dimensional layered growth mode in the final stage.
S5: packaging by selecting a normal structure, a flip-chip structure or a vertical structure; the novel LED chip with the P-GaN film structure can be applied to a forward-mounted structure, a flip-chip structure or a vertical structure.
The MOCVD technology is a novel vapor phase epitaxy technology developed on the basis of vapor phase epitaxy.
Comparing the three-dimensional island growth mode with the two-dimensional lamellar growth mode, wherein the three-dimensional island growth mode has higher growth speed, but the dislocation caused by the three-dimensional island growth mode is more obvious; the two-dimensional layered growth mode is preferable for the purpose of growing the LED chip more smoothly, because the growth rate is slower but the dislocation is less.
The present invention is not limited to the above embodiments, but is merely preferred embodiments of the present invention, and the present invention should be construed as being limited to the above embodiments as long as the technical effects of the present invention are achieved by the same means.
Claims (7)
1. The utility model provides a novel LED chip of P-GaN film structure which characterized in that: the semiconductor device comprises a substrate, an n-type semiconductor layer, a quantum well and a p-type semiconductor layer, wherein the n-type semiconductor layer, the quantum well and the p-type semiconductor layer are sequentially arranged on the substrate; the P-type semiconductor layer comprises a bottom layer P-GaN layer, a top layer P-GaN layer and an Ag metal film formed by Ag nano particles, wherein the Ag metal film is positioned between the bottom layer P-GaN layer and the top layer P-GaN layer, the bottom layer P-GaN layer is arranged on the quantum well, and the N-type semiconductor layer is an N-GaN layer;
the LED chip further comprises a buffer layer, wherein the buffer layer is arranged between the substrate and the N-type semiconductor layer and is used for relieving the stress of an epitaxial GaN material on the substrate so as to grow the N-GaN layer with a flat surface, low residual carrier concentration and high electron mobility;
the growth mode of the top layer P-GaN layer in the front-middle stage period is a three-dimensional island growth mode, and the growth mode of the top layer P-GaN layer in the last stage period is a two-dimensional lamellar growth mode, so that the opposite surface of the contact surface of the top layer P-GaN layer and the Ag metal film is of a flat lamellar structure.
2. The LED chip of claim 1, wherein said LED chip comprises: the contact surface of the bottom layer P-GaN layer and the Ag metal film is of a flat layered structure or a non-flat island structure.
3. The LED chip of claim 1, wherein said LED chip comprises: the quantum well is an InGaN/GaN quantum well.
4. The LED chip of claim 1, wherein said LED chip comprises: the substrate is made of a sapphire material.
5. The LED chip of claim 1, wherein said LED chip comprises: the buffer layer is made of AlGaN material.
6. A method for manufacturing an LED chip using the novel P-GaN thin film structure of any one of claims 1 to 5, comprising the steps of:
s1: sequentially arranging a buffer layer, an n-type semiconductor layer and a quantum well on a substrate by using an MOCVD technology;
s2: setting a bottom P-GaN layer on the quantum well by using MOCVD technology;
s3: plating an Ag metal material on the bottom P-GaN layer, and then carrying out rapid high-temperature annealing, wherein the Ag metal material forms the Ag metal film;
s4: setting a top P-GaN layer on an Ag metal film by using an MOCVD technology, wherein the top P-GaN layer has a three-dimensional island growth mode in a front-middle stage period, and a two-dimensional lamellar growth mode in a final stage period;
s5: and packaging by selecting a normal structure, a flip-chip structure or a vertical structure.
7. The method for manufacturing the novel P-GaN thin film structured LED chip according to claim 6, wherein the method comprises the following steps: the annealing time in the step S3 is 30-120 seconds.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201711005630.8A CN107681030B (en) | 2017-10-24 | 2017-10-24 | Novel LED chip with P-GaN film structure and preparation method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201711005630.8A CN107681030B (en) | 2017-10-24 | 2017-10-24 | Novel LED chip with P-GaN film structure and preparation method thereof |
Publications (2)
Publication Number | Publication Date |
---|---|
CN107681030A CN107681030A (en) | 2018-02-09 |
CN107681030B true CN107681030B (en) | 2023-08-18 |
Family
ID=61141861
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201711005630.8A Active CN107681030B (en) | 2017-10-24 | 2017-10-24 | Novel LED chip with P-GaN film structure and preparation method thereof |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN107681030B (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108611609B (en) * | 2018-05-17 | 2020-03-24 | 五邑大学 | Metal nanowire network and preparation method thereof |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101950785A (en) * | 2010-07-28 | 2011-01-19 | 山东大学 | Structure of P-type GaN layer of GaN-based light-emitting diode chip |
CN102394263A (en) * | 2011-11-22 | 2012-03-28 | 中国科学院半导体研究所 | Method for enhancing electroluminescent property of n-ZnO/AlN/p-GaN light-emitting diode |
CN102723412A (en) * | 2012-01-18 | 2012-10-10 | 许并社 | White-light LED chip structure possessing embedded-type silver nanoparticle |
CN102983236A (en) * | 2012-12-11 | 2013-03-20 | 映瑞光电科技(上海)有限公司 | LED chip and manufacturing method thereof |
-
2017
- 2017-10-24 CN CN201711005630.8A patent/CN107681030B/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101950785A (en) * | 2010-07-28 | 2011-01-19 | 山东大学 | Structure of P-type GaN layer of GaN-based light-emitting diode chip |
CN102394263A (en) * | 2011-11-22 | 2012-03-28 | 中国科学院半导体研究所 | Method for enhancing electroluminescent property of n-ZnO/AlN/p-GaN light-emitting diode |
CN102723412A (en) * | 2012-01-18 | 2012-10-10 | 许并社 | White-light LED chip structure possessing embedded-type silver nanoparticle |
CN102983236A (en) * | 2012-12-11 | 2013-03-20 | 映瑞光电科技(上海)有限公司 | LED chip and manufacturing method thereof |
Also Published As
Publication number | Publication date |
---|---|
CN107681030A (en) | 2018-02-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP3219854U (en) | III-V nitride semiconductor epitaxial wafer and III-V nitride semiconductor device | |
CN101521258B (en) | Method for improving LED external quantum efficiency | |
CN104409587B (en) | A kind of InGaN base blue-green light LED epitaxial structure and growing method | |
CN103730554B (en) | A kind of growing method of GaN-based LED epitaxial wafer | |
CN103531683B (en) | A kind of gallium nitride light-emitting diode and preparation method thereof | |
CN102306691B (en) | Method for raising light emitting diode luminescence efficiency | |
CN104241468A (en) | GaN-based LED epitaxial wafer with high external quantum efficiency and manufacturing method thereof | |
CN102738328B (en) | Epitaxial wafer of light-emitting diode and manufacturing method thereof | |
CN103887392B (en) | A kind of epitaxial growth method of raising LED luminous efficiencies | |
CN102709424A (en) | Method for improving luminous efficiency of light-emitting diode | |
CN104485400A (en) | Epitaxial structure of III-V nitride and growth method thereof | |
CN104701431A (en) | Epitaxial structure of LED and manufacturing method of epitaxial structure | |
CN103227251A (en) | Growing method of GaN-based light-emitting diode extensional structure | |
CN109326692B (en) | Gallium nitride-based light emitting diode epitaxial wafer and preparation method thereof | |
CN104319317B (en) | Epitaxial production method capable of effectively improving P-GaN hole injection layer quality | |
CN103456852B (en) | A kind of LED and preparation method | |
CN104319321A (en) | Intermittent-annealing isothermal-growth multi-quantum well LED extension structure and manufacturing method thereof | |
CN106784181B (en) | Method and structure for improving luminous efficiency of green light or longer wavelength InGaN quantum well | |
CN107681030B (en) | Novel LED chip with P-GaN film structure and preparation method thereof | |
CN102779737B (en) | Epitaxial method for improving luminous efficiency of GaN-based LED (light emitting diode) | |
CN104900774B (en) | Transverse epitaxial growth method for double buffer layers for improving brightness of LED (Light Emitting Diode) | |
CN109888069B (en) | InGaN/GaN quantum well structure and LED epitaxial wafer preparation method | |
CN103137808A (en) | Gallium nitride light-emitting diode (LED) with low-temperature n-type inserted layer and preparation method thereof | |
CN106887487B (en) | A kind of light emitting semiconductor device and preparation method thereof | |
CN101777614A (en) | Method for manufacturing low-dislocation-density light-emitting diode (LED) chip |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |