CN107680950A - A kind of encapsulating structure and its method for packing of multi-chip lamination - Google Patents

A kind of encapsulating structure and its method for packing of multi-chip lamination Download PDF

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Publication number
CN107680950A
CN107680950A CN201710848054.7A CN201710848054A CN107680950A CN 107680950 A CN107680950 A CN 107680950A CN 201710848054 A CN201710848054 A CN 201710848054A CN 107680950 A CN107680950 A CN 107680950A
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China
Prior art keywords
chip
connection sheet
slide holder
chips
electrode
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Granted
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CN201710848054.7A
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Chinese (zh)
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CN107680950B (en
Inventor
张晓天
潘华
鲁明朕
鲁军
哈姆扎·依玛兹
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Alpha and Omega Semiconductor Cayman Ltd
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Alpha and Omega Semiconductor Inc
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Priority to CN201710848054.7A priority Critical patent/CN107680950B/en
Publication of CN107680950A publication Critical patent/CN107680950A/en
Application granted granted Critical
Publication of CN107680950B publication Critical patent/CN107680950B/en
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    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

The present invention relates to a kind of encapsulating structure and its method for packing of multi-chip lamination, its electric connection is realized in the drain electrode of source electrode and LS chips that HS chips are arranged at using only a connection sheet, conduction loss and switching loss reduce, and heat dissipation efficiency is then strengthened.IC chip is insulated to be connected on connection sheet, so as to be stacked to the top of HS chips and LS chips place plane, with effective device size reduced after encapsulating.Can be by the bottom surface of first, second slide holder outside plastic-sealed body in the present invention；Also a variety of methods, a part of surface of IC chip will be further not connected on connection sheet outside plastic-sealed body；Or the further connection heat sink, and make a part of surface of the heat sink outside plastic-sealed body on connection sheet；Or heat sink is inserted into the reserved breach of plastic-sealed body and helps to radiate with contact and connection piece.

Description

A kind of encapsulating structure and its method for packing of multi-chip lamination
This case is divisional application
Original bill denomination of invention：A kind of encapsulating structure and its method for packing of multi-chip lamination
Original bill application number：201310617032.1
The original bill applying date：On November 27th, 2013
Technical field
The present invention relates to semiconductor applications, the more particularly to a kind of encapsulating structure and its method for packing of multi-chip lamination.
Background technology
In DC-DC (DC-to-dc) converter, two MOSFET (metal oxide semiconductor field-effects are typically provided with Pipe) as switching switch, one is high-end MOSFET (abbreviation HS), and another is low side MOSFET (abbreviation LS).Wherein, HS Grid G 1 and LS grid G 2 be connected with a controller (abbreviation IC)；HS drain D 1 connects Vin ends, and source S 1 connects LS drain D 2, and LS source S 2 connection Gnd ends, to form described dc-dc.
For the chip-packaging structure in dc-dc, it is desirable to high-end MOSFET chips and low side MOSFET cores Piece and controller chip are encapsulated in same plastic-sealed body, to reduce peripheral components quantity, while improve the utilization of power supply etc. Efficiency.However, for specific encapsulating structure, above-mentioned high-end MOSFET chips and low side MOSFET chips and control Device chip can only be arranged in parallel in the approximately the same plane of lead frame, therefore the volume after encapsulation is big；Moreover, only by Lead come connect the respective pins of chip (be, for example, HS source S 1 and LS drain D 2 between), resistance and thermal resistance will be caused Increase, influences device end properties.
The content of the invention
It is an object of the invention to provide a variety of embodiment party of a kind of encapsulating structure of multi-chip lamination and its method for packing Case, on the plane where controller chip being overlayed to high-end and MOSFET chips of low side by setting plate, And realize that the circuit of respective chip pin connects by the plate, to realize multiple semiconductor die packages same In semiconductor packages, so as to reduce the quantity of element when DC-to-dc converter assembles, reduce the chi of whole semiconductor packages It is very little, and it is effectively improved the electric property and radiating effect of device.
In order to achieve the above object, a technical scheme of the invention is to provide a kind of encapsulating structure of multi-chip lamination, its Comprising：
Lead frame, it is provided with the first slide holder spaced apart from each other, the second slide holder and some pins, and described second carries Piece platform is further provided with Part I and Part II spaced apart from each other；
First chip, its backplate are arranged downwards and are conductively connected on the first slide holder；
Second chip, its front electrode is arranged downwards by upset and be conductively connected first in the second slide holder Point and Part II on, some of front electrodes of second chip are connected to the Part I, wherein other front Electrode is connected to the Part II；
Connection sheet, its bottom surface are conductively connected to some of front electrodes that the first chip is arranged upwards, and second simultaneously In the backplate that chip is arranged upwards；
3rd chip, its back side arrangement and insulated are connected on the top surface of the connection sheet downwards；
Plastic-sealed body, it encapsulates the 3rd chip, connection sheet, the first chip and the second core stacked successively as sandwich construction Piece, lead frame, and the lead between chip electrode and chip electrode or between chip electrode and pin is correspondingly connected to, Also, make part that pin is connected with external devices and at least a portion at the first slide holder and the second slide holder back side sudden and violent It is exposed at beyond the plastic-sealed body.
In one specific application example, first chip is a HS chip as high-end MOSFET chips, its The Drain Electrodes Conductive that the back side is set is connected on the first slide holder；
Second chip is a LS chip as low side MOSFET chips and Jing Guo wafer-level package, its front The source conductive of setting is connected on the Part I of the second slide holder, and the Gate Electrode Conductive that front is set is connected to the second slide glass On the Part II of platform；
The back side of the connection sheet is conductively connected the drain electrode in the source electrode and the LS chip backs of the HS chip front sides On, to realize the electric connection between the two electrodes；
3rd chip is an IC chip as controller, the insulated top surface for being connected to connection sheet in its bottom surface On, and in the respective electrode or lead frame that some electrodes of its top surface are correspondingly connected on other chips by lead respectively Respective pins；
Some electrodes of piece masking are not coupled in the HS chip front sides or LS chip backs, pass through lead respectively yet The respective pins in respective electrode or lead frame being correspondingly connected on other chips.
In one embodiment, the encapsulating structure is also provided with heat sink, the heat sink and institute before plastic-sealed body is formed State the 3rd chip to be connected on the top surface of connection sheet, so that the heat sink forms thermal conductive contact, Jin Ertong with connection sheet Cross surface of the heat sink outside plastic-sealed body top surface and realize radiating.
In another embodiment, the encapsulating structure is also provided with heat sink after plastic-sealed body is formed；The plastic-sealed body Breach is formed further with top surface, the bottom of the heat sink is inserted into the breach to be connected to the top surface of connection sheet, and shape Into the heat sink and the thermal conductive contact of connection sheet, and then the top stayed in by the heat sink outside plastic-sealed body top surface is realized Radiating.
The connection sheet is provided with the high-end coupling part being connected on the first chip, and is connected to low on the second chip Hold coupling part；The high-end coupling part and low side coupling part of the connection sheet have identical or different thickness；
In one embodiment, the high-end coupling part, the first chip, the first slide holder thickness and value, it is and described low Hold coupling part, the second chip, the second slide holder thickness and value it is equal so that connection after connection sheet top surface level with It is firm to place the 3rd chip.
In another embodiment, the 3rd chip is connected to the high-end coupling part or low side coupling part of connection sheet On the middle less part of thickness, in high-end coupling part or low side coupling part the top of a larger part of thickness Face, which is exposed to outside the plastic-sealed body, realizes radiating.
Preferably, the contact formed with several local directed complete set connection sheet thickness on the connection sheet, the contact is The connection sheet top surface is set to be recessed downwards to form the blind hole not penetrated and make the downward projection of structure in connection sheet bottom surface simultaneously.
The connection sheet is further provided with wire connections point, and its interconnection for being conductively connected to set by lead frame is drawn On pin；The wire connections point, high-end coupling part and low side coupling part, it is by being integrally formed or by the company of assembling Fetch to form the connection sheet；
Preferably, the wire connections point prevent assembling and encapsulation process with being correspondingly arranged on the interconnection pin The locking mechanism that middle connection sheet position changes.
Preferably, between first chip and the first slide holder, between second chip and the second slide holder, institute Being conductively connected between connection sheet and first chip and the second chip is stated, is by being set between the surface of interconnection The scolding tin or the epoxide-resin glue of conduction put are realized；
Insulated connection between 3rd chip and the connection sheet, it is by being set not in the 3rd chip back Conductive bond glue is realized.
The preferable connection sheet is copper sheet.
Another technical scheme of the present invention is to provide a kind of method for packing of multi-chip lamination, comprising：
Lead frame is set, it is provided with the first slide holder spaced apart from each other, the second slide holder and some pins, and described the Two slide holders are further provided with Part I and Part II spaced apart from each other；
The backplate of first chip is arranged downwards and is conductively connected on the first slide holder；
Second chip is overturn so that its front electrode is arranged downwards and is conductively connected the Part I in the second slide holder And on Part II, some of front electrodes of second chip are connected to the Part I, wherein other fronts are electric Pole is connected to the Part II；
Connection sheet bottom surface is conductively connected to some of front electrodes that the first chip is arranged upwards, and second simultaneously In the backplate that chip is arranged upwards；
The back side of 3rd chip arrangement and insulated is connected on the top surface of the connection sheet downwards；
Formed plastic-sealed body will stack successively the 3rd chip, connection sheet, the first chip and the second chip for sandwich construction, Lead frame, and the lead being correspondingly connected between chip electrode and chip electrode or between chip electrode and pin are carried out After encapsulation, cut the plastic-sealed body and form an independent device；Also, make part that pin is connected with external devices and At least a portion at the first slide holder and the second slide holder back side is exposed to beyond the plastic-sealed body.
In one embodiment, a heat sink of setting is also connected to described by the method for packing also before plastic packaging On the top surface of sheeting, so that the heat sink forms thermal conductive contact with connection sheet, and then plastic-sealed body is exposed to by the heat sink Realize radiating in surface outside top surface.
In another embodiment, the method for packing encapsulation formed plastic-sealed body top surface on formed it is jagged, and will The bottom of the heat sink set is inserted into the breach to be connected to the top surface of connection sheet, and forms the heat sink and connection sheet Thermal conductive contact, and then top outside plastic-sealed body top surface is stayed in by the heat sink and realizes radiating.
The connection sheet is provided with the high-end coupling part being connected on the first chip, and is connected to low on the second chip Hold coupling part；The high-end coupling part and low side coupling part of the connection sheet have identical or different thickness；
During both thickness differences, the 3rd chip is connected to the high-end coupling part or low side coupling part of connection sheet On the middle less part of thickness, in high-end coupling part or low side coupling part the top of a larger part of thickness Face, which is exposed to outside the plastic-sealed body, realizes radiating.
Preferably, between first chip and the first slide holder, between second chip and the second slide holder, institute Being conductively connected between connection sheet and first chip and the second chip is stated, is by being set between the surface of interconnection The scolding tin or the epoxide-resin glue of conduction put are realized；
Insulated connection between 3rd chip and the connection sheet, it is by being set not in the 3rd chip back Conductive bond glue is realized.
In preferred embodiment, the contact formed with several local directed complete set connection sheet thickness on the connection sheet, institute It is to make the connection sheet top surface be recessed downwards to form the blind hole not penetrated and make the connection sheet bottom simultaneously by hole knockout to state contact Prominent structure downwards.
In any one above-mentioned embodiment, first chip is formed by procedure below：To even on silicon chip The surface for connecing other devices forms coating respectively；Carry out chip testing；Chip back is ground and back face metalization is to control first The thickness of chip simultaneously forms corresponding backplate；Cutting forms each the first independent chip；And then by described first Chip back is connected to downwards the first slide holder.
Second chip is formed by procedure below：Formed on silicon chip to connect the surface of other devices Coating；Carry out chip testing and circuitous pattern mapping；Ball is planted in front side of silicon wafer correspondence position to form corresponding front electrode； Wafer-level package forms packaging body；Ground in chip front side, so as to plant the top of ball outside the top surface of packaging body；Chip Front is precut, forms scribe line；Chip back is ground and back face metalization is to control the thickness of the second chip and be formed corresponding Backplate；Cutting forms each the second independent chip；Afterwards, it is made to face down after second chip is overturn It is connected to the second slide holder.
3rd chip is formed by procedure below：Chip back is ground；The backside coating of IC chip is non-conductive Adhesive glue；Cutting forms each the 3rd independent chip；Afterwards, the 3rd chip is bonded in and is already attached to first The top surface of chip, connection sheet on the second chip；
Stacked in the 3rd chip, connection sheet, the first chip and the second chip after forming sandwich construction, also with following mistake Journey：Adhesive tape of paste, solidified；Between corresponding chip electrode and chip electrode, and between chip electrode and pin respectively Bonded formation lead；Form plastic-sealed body；Coating is formed in the position outside plastic-sealed body；It is finally cut to create each independence Packaging.
Compared with prior art, the encapsulating structure and its method for packing of multi-chip lamination of the present invention, its advantage exist In：
Compared to the knot that the drain electrode of the source electrode of HS chips and LS chips was originally connected using multiple pasters or bonded lead Structure, is used only the welding simultaneously of a connection sheet in of the invention or conduction is pasted to the drain electrode of the source electrode of HS chips and LS chips, Can is electrically connected with the two electrodes, and technique is simply easily achieved, and conduction loss and switching loss reduce, and heat dissipation is imitated Rate is then strengthened, and device end properties is more preferable.
Compared to originally by three chips and being emitted on the structure of approximately the same plane, the insulated company of IC chip in the present invention It is connected on connection sheet, so as to be stacked to the top of HS chips and LS chips place plane, with effective device reduced after encapsulating Part size, save encapsulating material.
It can be easy to connect circuit board and reality by the bottom surface of first, second slide holder outside plastic-sealed body in the present invention Now radiate.There are three kinds of methods in the present invention, the surface of heat transmission is further also formed in plastic-sealed body top surface, i.e. by connection sheet On be not connected to a part of surface of IC chip outside plastic-sealed body；Or the further connection heat sink, and making on connection sheet Some surface of the heat sink is outside plastic-sealed body；Or heat sink is inserted into the reserved breach of plastic-sealed body to connect Tactile connection sheet is radiated.
The laminated construction of the present invention can't be influenceed between IC chip and other chips, and HS chips or LS chips are with drawing The bonded lead for forming connection between pin.Can be by setting the different connection sheet of each several part thickness or by connection sheet The heat sink of upper connection adjusts the thickness of diverse location in encapsulating structure, so that the IC chip of encapsulating structure side, below Connection sheet part, HS chips, the general thickness of the first slide holder and corresponding lead, with being coupled for encapsulating structure opposite side The combination of the thicker portion or heat sink and connection sheet of piece, LS chips, the general thickness of the second slide holder match.
It can also be formed in the present invention by being punched on connection sheet in the downward projection of multiple contacts in bottom surface, this is in example In the case of after bonded lead, it can quickly and easily realize and the local thickness of connection sheet is adjusted.
Locking mechanism is correspondingly arranged on connection sheet and the lead frame pin being attached thereto in the present invention, to ensure In assembling and encapsulation process, the position of connection sheet will not change.In addition, fin can also be by setting locking mechanism To fix its position.
Brief description of the drawings
Figure 1A is the stereogram of present invention chip-packaging structure described in the first embodiment；
Figure 1B is the front perspective view of present invention chip-packaging structure described in the first embodiment；
Fig. 1 C are the side diagrammatic cross-sections of present invention chip-packaging structure described in the first embodiment；
Fig. 1 D and Fig. 1 E are a kind of structural representations of preferably plate positive and negative in chip-packaging structure of the present invention Figure；
Fig. 2A~Fig. 2 G are the present invention structures corresponding with each step of the chip packaging method in the first embodiment Schematic diagram；
Fig. 3 is the flow chart of present invention chip packaging method described in the first embodiment；
Fig. 4 A~Fig. 4 G are present invention structures corresponding with each step of the chip packaging method in a second embodiment Schematic diagram；
Fig. 5 is the flow chart of present invention chip packaging method described in a second embodiment；
Fig. 6 A~Fig. 6 H are the present invention structures corresponding with each step of the chip packaging method in the third embodiment Schematic diagram；
Fig. 7 is the flow chart of present invention chip packaging method described in the third embodiment；
Fig. 8 A~Fig. 8 F are the present invention structures corresponding with each step of the chip packaging method in the fourth embodiment Schematic diagram；
Fig. 9 is the flow chart of present invention chip packaging method described in the third embodiment.
Embodiment
Below with reference to accompanying drawing, illustrate multiple preferred embodiments of the invention.
Embodiment 1
Coordinate referring to shown in Figure 1A~Fig. 1 C, by MOSFET chips (2 N-types or 2 of 2 same types in the present invention P-type), respectively as high-end MOSFET (referred to as HS chips 20) and low side MOSFET chips (referred to as LS chips 30).Pass through One connection sheet 40 overlays a controller chip (referred to as IC chip 50) same where the two MOSFET chips In individual plane, also, IC chip 50 is connected post package with the respective electrode and pin 14 of LS chips 30 and HS chips 20 and existed In same plastic-sealed body 100, to form a DC-to-dc converter.
Described HS chips 20 and LS chips 30, each comfortable chip front side is provided with source electrode and grid, and is set in chip back There is drain electrode；Wherein, the grid G 1 of HS chips 20 and the grid G 2 of LS chips 30 are connected with the control pole in IC chip 50；HS The drain D 1 of chip 20 connects Vin ends, and source S 1 connects the drain D 2 of LS chips 30, and the source S 2 of LS chips 30 connects Gnd End, forms the DC-to-dc converter.Electricity can also be set between the Vin-Gnd both ends of DC-to-dc converter Other components such as appearance, inductance.
In the encapsulating structure that the present embodiment provides, provided with lead frame 10 (referring to shown in Fig. 2A), the lead frame 10 exists The first slide holder 11 and the second slide holder being separated from each other are provided with same plane, wherein, the second slide holder is additionally provided with phase The Part I 12 and Part II 13 mutually separated.The lead frame 10 is additionally provided with multiple pins 14 being separated from each other, its In include：Low side source lead, low side gate pin, high-end source lead, high side gate pin, and interconnection pin 15 etc..
These pins 14 in the present embodiment are distributed in the periphery of the first slide holder 11 and the second slide holder, wherein, it is high-end Drain lead is extended from the first slide holder 11, and low side source lead is the Part I 12 from the second slide holder Above it is extended, low side gate pin is extended from the Part II 13 of the second slide holder；Some other pins 14 be all then spaced apart from each other with the first slide holder 11 or the second slide holder.
The HS chips 20 are placed on the first slide holder 11, at the back side of the HS chips 20 and the first slide holder 11 The epoxy resin adhesive glue 91 of scolding tin or conduction or other conductive connecting materials are provided between top surface, so that HS chips 20 are carried on the back The drain electrode S1 in face is electrically connected with the first slide holder 11, and can be connected by high-end drain lead with external devices.
The LS chips 30 of wafer-level package, are positioned over after upset on the second slide holder, downward just in the LS chips 30 The epoxy resin adhesive glue 91 of scolding tin or conduction is provided between face and the Part I 12 and Part II 13 of the second slide holder Deng so that the Part I 12 of 30 positive source electrode of LS chips and the second slide holder is electrically connected with, and low side source electrode can be passed through Pin connects with external devices；Meanwhile the positive grid G 2 of LS chips 30 and the Part II 13 of the second slide holder electrically connect Connect, and can be connected by low side gate pin with external devices.
The connection sheet 40 especially set in the encapsulating structure that the present embodiment provides is to be made of an electrically conducting material, e.g. one Kind copper sheet.The connection sheet 40 is provided with high-end coupling part 41 and low side coupling part 42, passes through scolding tin or the epoxy of conduction respectively Resin-bonded glue 91 etc., bonding are arranged on HS chips 20 and the upward surface of LS chips 30, so that the front of HS chips 20 Source S 1 and the back side of LS chips 30 drain D 2 (both the are upward arrangement) relevant position with the bottom surface of connection sheet 40 respectively It is electrically connected with, and realizes the electric connection between the source S 1 of HS chips 20 and the drain D 2 of LS chips 30.
The thickness design of the connection sheet 40, the high-end coupling part 41 and HS below for making connection sheet 40 should be met The thickness of the grade addition of chip 20, equal to low side coupling part 42 and the thickness that the grade of LS chips 30 is added below of connection sheet 40, To ensure that the top surface of whole connection sheet 40 after being bonded is the plane parallel with HS chips 20 and the place of LS chips 30, so as to In follow-up firm placement IC chip 50.For example, it is preferable to embodiment in be the thickness for making the first slide holder 11 and the second slide holder Unanimously；HS chips 20 and the consistency of thickness of LS chips 30, it is connected to the top surface level of latter two chip of lead frame 10；Also, Make the consistency of thickness of the position of corresponding connection HS chips 20 and LS chips 30 on connection sheet 40, so as to ensure that it overlays two Top surface after on chip is also horizontal.
Coordinate referring to shown in Fig. 1 D~Fig. 1 E, for example, can be formed respectively in the bottom of connection sheet 40, can to adjust its high Hold the protruding block 411,421 of the thickness of coupling part 41 and low side coupling part 42.Also, in a preferred embodiment, Can also be each further to adjust connection sheet 40 formed with multiple downward projection of contacts 45 in the position of protruding block 411,421 Partial thickness.The formation of these contacts 45, it is by being punched on connection sheet 40, so as to which the top surface in connection sheet 40 is formed The pit not penetrated, and described contact 45 is formed in the bottom of connection sheet 40.On one connection sheet 40, diverse location contact 45 punching depth can be adjusted situation according to specific thickness and determined with identical or differ.
Meanwhile the connection sheet 40 is additionally provided with pin connection points 43, for the interconnection positioned at the periphery of lead frame 10 Pin 15 is electrically connected with, so that the source S 1 of HS chips 20 and the drain D 2 of LS chips 30 and connection sheet 40 can enter one Step is connected by the interconnection pin 15 with external devices.The pin connection of the connection sheet 40 point 43, its downward projecting portion 431 thickness add be connected with the ledge 431 interconnect pin 15 thickness, it should also meet it is above-mentioned make bonding after join The top surface of sheeting 40 purpose of design parallel with two MOSFET chips.
In a preferred embodiment, lead frame 10 interconnection pin 15 on and the connection sheet 40 pin Coupling part 43 is also correspondingly arranged on locking mechanism.In Figure 1A exemplary construction, the locking mechanism interconnected on pin 15 is out If several positioning holes 81, and the locking mechanism of connection sheet 40 is then the keeper 82 in the correspondence position of its bottom, it is illustrated that Keeper 82 equivalent to a kind of structure for extending downwardly or bending from the bottom surface of connection sheet 40, can correspond to that to be inserted into these fixed To realize the fixation of the position of connection sheet 40 in the hole 81 of position, to ensure to be moved in assembling and encapsulation process connection sheet 40. Also, when being provided with above-mentioned locking mechanism, the thickness of keeper 82 on connection sheet 40, it is greater than pin connection point 43 Thickness, it is inserted into ensuring that the keeper 82 can correspond in the positioning hole 81 of interconnection pin 15.The present invention is not limited in it The position of positioning hole 81 and keeper 82 or the locking mechanism using other structures are exchanged in his implementation structure.
In Figure 1A exemplary construction, the surface configuration and its size design of connection sheet 40 so that the height of the connection sheet 40 End coupling part 41 substantially covers the most areas at the top of LS chips 30 below, but low side coupling part 42 does not have then There is the top by HS chips 20 to be completely covered.Thus, the front of HS chips 20 is not coupled the source S 1 and grid of the masking of piece 40 Pole G1, the pin 14 or other chips of lead frame 10 respectively by several bonded leads 60, can be connected directly to On the electrode of (being, for example, IC chip 50)；Or using the pin 14 of lead frame 10 as transfer, multistage is set to distinguish bonded Lead 60, with the respective electrode being indirectly connected on other chips (being, for example, IC chip 50).The present invention is also not limited in it In his embodiment, using the connection sheet 40 of other structures, for example, being the structure of endless all standing LS chips 30；Or connection Sheeting 40 is not integrally formed, but is connected with each other by multiple small coupling components or assembling is formed etc..
IC chip 50 of the present invention, by nonconducting adhesive glue 92 or other insulation be fixedly connected with mode, glue Connect and be arranged on the top surface of the connection sheet 40, so that IC chip 50, connection sheet 40, HS chips 20 and LS chips 30 are formed as One sandwich construction stacked from top to bottom, while will not between the IC chips 50 and the electrode of HS chips 20 and LS chips 30 Realized and be electrically connected with by connection sheet 40.
In Figure 1A exemplary construction, on the high-end coupling part 41 of connection sheet 40, i.e., the IC chip 50 is The position of the corresponding top of HS chips 20；And in other examples not shown, IC chip 50 can be pushed up positioned at connection sheet 40 The other positions in face.Some electrodes in the IC chip 50, it can be electrically connected to and draw respectively by bonded lead 60 In the respective pins 14 on the periphery of wire frame 10 or in the respective electrode of other chips (being, for example, HS chips 20).
In the encapsulating structure of the present embodiment, also comprising plastic-sealed body 100, by the above-mentioned folded IC chip 50 set, connection sheet 40, The lead 60 connected on HS chips 20 and LS chips 30 and counter electrode is all encapsulated to form a device, and draws each The part that pin 14 is connected with external devices is exposed, and makes the first slide holder 11 and the second slide holder on lead frame 10 The bottom surface of (being, for example, its Part I 12) is exposed to outside plastic-sealed body 100, to connect circuit board or help to radiate.
Below please refer to Fig. 2A~Fig. 2 G shown in structure, and the flow shown in Fig. 3 introduced described in the present embodiment The method for packing of chip：
That is, see Fig. 2A, a lead frame 10 is set, comprising the first slide holder 11 spaced apart from each other, provided with Part I 12 and the second slide holder of Part II 13, and multiple pins 14.
See Fig. 2 B, it is HS chips 20 to set a MOSFET chip, is fixed and is connected on the first slide holder 11 and makes The drain D 1 at the back side of HS chips 20 is electrically connected with the first slide holder 11.
See Fig. 2 C, the MOSFET chips for setting another wafer-level package are LS chips 30, are fixedly connected after being overturn On the second slide holder and it is electrically connected the positive source S 1 of LS chips 30 and the Part I 12 of the second slide holder, And the positive grid G 2 of LS chips 30 and the Part II 13 of the second slide holder are electrically connected.
See Fig. 2 D, a connection sheet 40 is set, at its back side respectively by setting scolding tin or the epoxy resin of conduction to bond The similar fashions such as glue 91, the high-end coupling part 41 of the connection sheet 40 is connected to the top surface of HS chips 20, low side coupling part 42 The top surface of LS chips 30 is connected to, pin connection point 43 is connected on the interconnection pin 15 of lead frame 10 so that HS chips 20 Electric connection is mutually formed between the upward back-side drain D2 of positive source S 1, LS chips 30 and interconnection pin 15.
See Fig. 2 E, by IC chip 50 by nonconducting adhesive glue 92, be fixedly installed on the top surface of connection sheet 40, shape The sandwich construction stacked into IC chip 50, connection sheet 40, HS chips 20 with LS chips 30.Also, the front of HS chips 20 not by The grid G 1 and source S 1 that connection sheet 40 covers, some electrodes of IC chip 50, and between some pins 14 of lead frame 10 Connected each other by bonded lead 60 is corresponding.
As shown in Fig. 2 F and Fig. 2 G tow sides, set plastic-sealed body 100 by IC chip 50, connection sheet 40, HS chips 20 with The sandwich construction and the grade of lead 60 that LS chips 30 stack all are encapsulated, and make each pin 14 to connect external devices Position and the back side of the first slide holder 11 and the second slide holder are exposed.
Referring back to shown in Fig. 3, when setting a LS chip 30, realized by following steps：It is used on LS chips 30 The surface that follow-up manifold card is fixed is formed with coating, e.g. Ni/Au coating；Chip testing and circuitous pattern mapping；In chip Front correspondence position carries out planting ball to form corresponding electrode.Wafer-level package；Ground in chip front side, so as to plant the top of ball Portion is outside the top surface of packaging body；For example, the top surface that expose after grinding plant ball flushes with the top surface of packaging body, Etc..Chip front side is precut, and forms scribe line.Chip back is ground and back face metalization forms respective electrode；Such as one Thickness in instantiation after grinding back surface and back face metalization is 6mil, and the wherein thickness of silicon chip is 3mil, on silicon chip The encapsulation body thickness of side is 3mil.Afterwards, cutting forms each independent LS chips 30, then overturn make it with face down and The mode of the back side upward is conductively connected on the second slide holder.
And when setting a HS chip 20, realized by following steps：Fixed on HS chips 20 for follow-up manifold card Surface formed with coating, e.g. Ni/Pd/Au coating；Chip testing；Chip back is ground and back face metalization, such as Illustrated with above-mentioned instantiation, make the consistency of thickness of HS chips 20 and LS chips 30 after grinding back surface and back face metalization, be 6mil.Cutting forms each independent HS chips 20, makes it face-up, the back side is connected to the first slide holder 11 down.
And when setting an IC chip 50, realized by following steps：The grinding back surface of IC chip 50, for example, 6mil. In the nonconducting adhesive glue 92 of the backside coating of IC chip 50.Cutting forms each independent IC chip 50, after being placed in cleaning The top surface of connection sheet 40 on.
Then IC chip 50, connection sheet 40, HS chips 20 stack with LS chips 30 be connected after, specifically provided with adhesive tape of paste, Solidified；The bonded lead 60 for forming connection between the electrode and pin 14 of respective chip；Form plastic-sealed body 100；Sudden and violent The position of dew forms coating；By similar fashions such as sawing or punching presses, cutting forms some steps of each independent packaging Suddenly.
Embodiment 2
Fig. 4 A~Fig. 4 G show that the present embodiment chips encapsulate the structural representation in each step, and Fig. 5 shows this reality Apply the flow of method for packing in example.Wherein, the structure description of the present embodiment is as follows, i.e. sets a lead frame 10 (figure 4A), comprising the first slide holder 11, for being fixedly connected with HS chips 20 and being electrically connected (Fig. 4 B) with its back-side drain D1； The second slide holder is also included, provided with Part I 12 and Part II 13, for being fixedly connected with the encapsulation LS chips 30 of upset simultaneously It is electrically connected (Fig. 4 C) with its positive source S 2 and grid G 2 respectively.One connection sheet 40 is conductively connected in HS cores On piece 20 and LS chips 30, so that the high-end coupling part 41 of the connection sheet 40 is electrically connected to 20 positive source electrode of HS chips S1, and the low side coupling part 42 of the connection sheet 40 is electrically connected to the upward back-side drain D2 of LS chip 30LS chips 30, and And then divide the 43 interconnection pins 15 (Fig. 4 D) for being electrically connected to lead frame 10 by the pin connection of the connection sheet 40；
It is with the difference in embodiment 1, is on connection sheet 40 in the present embodiment while is provided with IC chip 50 With a heat sink 71, the heat sink 71 is made in the e.g. good copper coin of heat conductivility or similar material.For example, be by The heat sink 71, which is arranged on the top surface of the low side coupling part 42 of connection sheet 40, forms good thermal conductive contact (Fig. 4 E), and By the insulated high-end coupling part 41 (Fig. 4 F) for being bonded in connection sheet 40 of IC chip 50.Then, IC chip 50 and heat sink are formed 71, connection sheet 40, the sandwich construction that HS chips 20 and LS chips 30 stack, also, the thickness design of heat sink 71, should be with The thickness connected between IC chip 50 and HS chips 20 or pin 14 after some leads 60 is roughly the same.By above-mentioned sandwich construction It is encapsulated in plastic-sealed body 100, and makes the part connected outside each pin 14, the major part of the first slide holder 11 and the second slide holder Bottom surface is respectively outside the bottom surface of plastic-sealed body 100；The top surface of heat sink 71 is set to be exposed to the top surface of plastic-sealed body 100 simultaneously Outside further help radiate.
Coordinate shown in Figure 5, setting lead frame 10, HS chips 20, LS chips 30 and IC chip 50 in the present embodiment Process with basically identical in embodiment 1, difference mainly needs to set heat sink 71, and is bonded in HS in connection sheet 40 After on chip 20 and LS chips 30, heat sink 71 is connected, it is necessary to increase before IC chip 50 with setting to cleaning connection sheet 40 The step of being connected to 40 top surface of connection sheet.
Embodiment 3
Fig. 6 A~Fig. 6 G show that the present embodiment chips encapsulate the structural representation in each step, and Fig. 7 shows this reality Apply the flow of method for packing in example.Wherein, the structure description of the present embodiment is as follows, i.e. sets a lead frame 10 (figure 6A), comprising the first slide holder 11, for being fixedly connected with HS chips 20 and being electrically connected (Fig. 6 B) with its back-side drain D1； The second slide holder is also included, provided with Part I 12 and Part II 13, for being fixedly connected with the encapsulation LS chips 30 of upset simultaneously It is electrically connected (Fig. 6 C) with its positive source S 2 and grid G 2 respectively.One connection sheet 40 is conductively connected in HS cores On piece 20 and LS chips 30, so that the high-end coupling part 41 of the connection sheet 40 is electrically connected to 20 positive source electrode of HS chips S1, and the low side coupling part 42 of the connection sheet 40 is electrically connected to the upward back-side drain D2 of LS chip 30LS chips 30, and And then divide the 43 interconnection pins 15 (Fig. 6 D) for being electrically connected to lead frame 10 by the pin connection of the connection sheet 40.Will One IC chip 50 is insulated to be bonded in the high-end coupling part 41 of connection sheet 40, and formed IC chip 50, HS chips 20 and Mutual lead 60 connects (Fig. 6 E) between pin 14；
It is with the difference in embodiment 1, is to use plastic-sealed body 100 by IC chips 50, connection in the present embodiment When the sandwich construction that piece 40, HS chips 20 and LS chips 30 stack encapsulates together, the structure of the bottom surface of plastic-sealed body 100 exposure is constant, But a breach 101 is formed on the top surface of the plastic-sealed body 100 so that the low side coupling part 42 on connection sheet 40 has one Area is exposed (Fig. 6 F) from the breach 101.One heat sink 72, the e.g. good copper of heat conductivility are set Plate or similar material are made, and the bottom of the heat sink 72 is vertically provided with a protrusion (Fig. 6 G), and the protrusion can insert Enter the breach 101 of plastic-sealed body 100, and thermal conductive contact is formed so as to be connected to connection sheet 40 with enough thickness.The heat sink 72 top is stayed on the top surface of plastic-sealed body 100 (Fig. 6 H), therefore can be set in the case of no more than the area of plastic-sealed body 100 As far as possible big area of dissipation is put, with improving radiating effect.
Coordinate shown in Figure 7, setting lead frame 10, HS chips 20, LS chips 30 and IC chip 50 in the present embodiment Process with basically identical in embodiment 1, difference mainly need set heat sink 72, and encapsulation sandwich construction formed It is coupled after plastic-sealed body 100 with breach 101, it is necessary to increase the protrusion of heat sink 72 being inserted into breach 101 with therein The top surface of piece 40 realizes the step of connection and thermal conductive contact.
Embodiment 4
Fig. 8 A~Fig. 8 F show that the present embodiment chips encapsulate the structural representation in each step, and Fig. 9 shows this reality Apply the flow of method for packing in example.Wherein, the structure description of the present embodiment is as follows, i.e. sets a lead frame 10 (figure 8A), comprising the first slide holder 11, for being fixedly connected with HS chips 20 and being electrically connected (Fig. 8 B) with its back-side drain D1； The second slide holder is also included, provided with Part I 12 and Part II 13, for being fixedly connected with the encapsulation LS chips 30 of upset simultaneously It is electrically connected (Fig. 8 C) with its positive source S 2 and grid G 2 respectively.One connection sheet 40 is conductively connected in HS cores On piece 20 and LS chips 30, so that the high-end coupling part 41 of the connection sheet 40 is electrically connected to 20 positive source electrode of HS chips S1, and the low side coupling part 42 of the connection sheet 40 is electrically connected to the upward back-side drain D2 of LS chip 30LS chips 30, and And then divide the 43 interconnection pins 15 (Fig. 8 D) for being electrically connected to lead frame 10 by the pin connection of the connection sheet 40；
It is with the difference in embodiment 1, the structure of connection sheet 40 in the present embodiment is different, wherein, high-end connection The thickness of part 41 (and pin connection point 43) is less than the thickness (Fig. 8 D) of low side coupling part 42.And the low side connecting portion Points 42 thickness design, it should meet to be bonded in IC chip 50 is insulated on the high-end coupling part 41 of connection sheet 40, and It is roughly the same (Fig. 8 E) that the thickness after some leads 60 is connected between IC chip 50 and HS chips 20 or pin 14.Then, plastic-sealed body After the 100 sandwich construction encapsulation for stacking above-mentioned IC chip 50, connection sheet 40, HS chips 20 and LS chips 30, except plastic-sealed body Outside the part of 100 bottom surfaces exposure is constant, while the top surface of the low side coupling part 42 of the connection sheet 40 is also set to be exposed to plastic packaging Radiated outside the top surface of body 100 with further help.Three parts of connection sheet 40 can be integrally formed in the present embodiment Or by being formed after assembling or connection.
Coordinate shown in Figure 9, setting lead frame 10, HS chips 20, LS chips 30 and IC chip 50 in the present embodiment And the process being encapsulated, with basically identical in embodiment 1, difference mainly needs with coverings such as adhesive tapes to be coupled before packaging The top surface of the high-end coupling part 41 of piece 40, in order to which after encapsulating its exposure can be set.
The Making programme of each chip in itself can be realized according to the conventional meanses of this area in the present invention.It is and of the invention The middle encapsulating structure and method for packing that multi-chip is stacked and connected by connection sheet 40, two are used except above-described Beyond MOSFET chips and an IC chip 50, it can also apply in the encapsulation of other devices, e.g. encapsulate high pressure IGBT Chip (insulated gate bipolar transistor), dual pressure controller, or the chip for encapsulating greater number of chip or more are folded Layer, etc..
Although present disclosure is discussed in detail by above preferred embodiment, but it should be appreciated that above-mentioned Description be not considered as limitation of the present invention.After those skilled in the art have read the above, for the present invention A variety of modifications and substitutions all will be apparent.Therefore, protection scope of the present invention should be limited by appended claim It is fixed.

Claims (13)

1. a kind of encapsulating structure of multi-chip lamination, it is characterised in that include：
Lead frame, it is provided with the first slide holder spaced apart from each other, the second slide holder and some pins, and second slide holder enters One step is provided with Part I spaced apart from each other and Part II；
First chip, its backplate are arranged downwards and are conductively connected on the first slide holder；
Second chip, its front electrode is arranged downwards by upset and be conductively connected in the Part I of the second slide holder and the On two parts, some of front electrodes of second chip are connected to the Part I, and wherein other front electrodes connect It is connected to the Part II；
Connection sheet, its bottom surface are conductively connected to some of front electrodes that the first chip is arranged upwards, and the second chip simultaneously In the backplate arranged upwards；
3rd chip, its back side arrangement and insulated are connected on the top surface of the connection sheet downwards；
Plastic-sealed body, it is encapsulated stacks the 3rd chip, connection sheet, the first chip and the second chip for sandwich construction, draws successively Wire frame, and the lead between chip electrode and chip electrode or between chip electrode and pin is correspondingly connected to, also, make The part and at least a portion at the first slide holder and the second slide holder back side that pin is connected with external devices are exposed to the modeling Seal beyond body；
The connection sheet is provided with the high-end coupling part being connected on the first chip, is connected with the low side being connected on the second chip Part；The high-end coupling part and low side coupling part of the connection sheet have different thickness；
3rd chip is connected to the less part of thickness in the high-end coupling part or low side coupling part of connection sheet On, the top surface of a larger part of thickness is exposed to outside the plastic-sealed body in high-end coupling part or low side coupling part Realize radiating.
2. the encapsulating structure of multi-chip lamination as claimed in claim 1, it is characterised in that
First chip is a HS chip as high-end MOSFET chips, and the Drain Electrodes Conductive that its back side is set is connected to the On one slide holder；
Second chip is a LS chip as low side MOSFET chips and Jing Guo wafer-level package, what its front was set Source conductive is connected on the Part I of the second slide holder, and the Gate Electrode Conductive that front is set is connected to the second of the second slide holder On part；
The back side of the connection sheet is conductively connected in the drain electrode of the source electrode and the LS chip backs of the HS chip front sides, is used To realize the electric connection between the two electrodes；
3rd chip is an IC chip as controller, and its bottom surface is insulated to be connected on the top surface of connection sheet, and It is corresponding in the respective electrode or lead frame that some electrodes of its top surface are correspondingly connected on other chips by lead respectively Pin；
Some electrodes of piece masking are not coupled in the HS chip front sides or LS chip backs, are correspondingly connected by lead respectively yet The respective pins in respective electrode or lead frame being connected on other chips.
3. the encapsulating structure of multi-chip lamination as claimed in claim 1 or 2, it is characterised in that
The high-end coupling part, the first chip, the first slide holder thickness and value, with the low side coupling part, the second core Piece, the second slide holder thickness and value it is equal so that the top surface level of connection sheet places the 3rd chip with firm after connection.
4. the encapsulating structure of multi-chip lamination as claimed in claim 3, it is characterised in that
Contact formed with several local directed complete set connection sheet thickness on the connection sheet, the contact are to make the connection sheet top Depression forms the blind hole not penetrated and makes the downward projection of structure in connection sheet bottom surface simultaneously downwards.
5. the encapsulating structure of multi-chip lamination as claimed in claim 4, it is characterised in that
The connection sheet is further provided with wire connections point, and it is conductively connected on the interconnection pin set by lead frame； The wire connections point, high-end coupling part and low side coupling part, are by being integrally formed or by assembly and connection come shape Into the connection sheet；
The wire connections point prevent connection sheet position in assembling and encapsulation process with being correspondingly arranged on the interconnection pin The locking mechanism of change.
6. the encapsulating structure of multi-chip lamination as claimed in claim 1, it is characterised in that
Between first chip and the first slide holder, between second chip and the second slide holder, the connection sheet and institute Being conductively connected between the first chip and the second chip is stated, is scolding tin or conduction by being set between the surface of interconnection Epoxide-resin glue realize；
Insulated connection between 3rd chip and the connection sheet, it is non-conductive viscous by being set in the 3rd chip back Gum deposit is realized.
7. the encapsulating structure of multi-chip lamination as claimed in claim 1, it is characterised in that
The connection sheet is copper sheet.
A kind of 8. method for packing of multi-chip lamination, it is characterised in that
Lead frame is set, and it is provided with the first slide holder spaced apart from each other, the second slide holder and some pins, second slide glass Platform is further provided with Part I and Part II spaced apart from each other；
The backplate of first chip is arranged downwards and is conductively connected on the first slide holder；
Second chip is overturn so that its front electrode is arranged downwards and is conductively connected in the Part I of the second slide holder and the On two parts, some of front electrodes of second chip are connected to the Part I, and wherein other front electrodes connect It is connected to the Part II；
Connection sheet bottom surface is conductively connected to some of front electrodes that the first chip arranges upwards simultaneously, and the second chip to In the backplate of upper arrangement；
The back side of 3rd chip arrangement and insulated is connected on the top surface of the connection sheet downwards；
The 3rd chip for sandwich construction, connection sheet, the first chip and the second chip, lead frame will be stacked successively by forming plastic-sealed body Frame, and be correspondingly connected to after the lead between chip electrode and chip electrode or between chip electrode and pin is packaged, Cut the plastic-sealed body and form an independent device；Also, make the part and the first slide glass that pin is connected with external devices At least a portion at platform and the second slide holder back side is exposed to beyond the plastic-sealed body；
The connection sheet is provided with the high-end coupling part being connected on the first chip, is connected with the low side being connected on the second chip Part；The high-end coupling part and low side coupling part of the connection sheet have different thickness；3rd chip is connected to In the high-end coupling part or low side coupling part of connection sheet on the less part of thickness, high-end coupling part or low side The top surface of a larger part of thickness, which is exposed to outside the plastic-sealed body, in coupling part realizes radiating.
9. the method for packing of multi-chip lamination as claimed in claim 8, it is characterised in that
Between first chip and the first slide holder, between second chip and the second slide holder, the connection sheet and institute Being conductively connected between the first chip and the second chip is stated, is scolding tin or conduction by being set between the surface of interconnection Epoxide-resin glue realize；
Insulated connection between 3rd chip and the connection sheet, it is non-conductive viscous by being set in the 3rd chip back Gum deposit is realized.
10. the method for packing of multi-chip lamination as claimed in claim 8, it is characterised in that
Contact formed with several local directed complete set connection sheet thickness on the connection sheet, the contact is to pass through hole knockout The connection sheet top surface is set to be recessed downwards to form the blind hole not penetrated and make the downward projection of structure in connection sheet bottom surface simultaneously.
11. the method for packing of multi-chip lamination as described in any one in claim 8~10, it is characterised in that
First chip is formed by procedure below：Plating is formed respectively to connect the surface of other devices on silicon chip Layer；Carry out chip testing；Chip back is ground and back face metalization is to control the thickness of the first chip and form the corresponding back side Electrode；Cutting forms each the first independent chip；And then first chip back is connected to downwards the first slide glass Platform.
12. the method for packing of multi-chip lamination as claimed in claim 11, it is characterised in that
Second chip is formed by procedure below：On silicon chip coating is formed to connect the surface of other devices； Carry out chip testing and circuitous pattern mapping；Ball is planted in front side of silicon wafer correspondence position to form corresponding front electrode；Chip-scale Encapsulation forms packaging body；Ground in chip front side, so as to plant the top of ball outside the top surface of packaging body；Chip front side pre-cut Cut, form scribe line；Chip back is ground and back face metalization is to control the thickness of the second chip and form corresponding back side electricity Pole；Cutting forms each the second independent chip；Afterwards, it is faced down after second chip is overturn and be connected to second Slide holder.
13. the method for packing of multi-chip lamination as claimed in claim 12, it is characterised in that
3rd chip is formed by procedure below：Chip back is ground；The backside coating of IC chip is nonconducting viscous Gum deposit；Cutting forms each the 3rd independent chip；Afterwards, the 3rd chip is bonded in be already attached to the first chip, The top surface of connection sheet on second chip；
Stacked in the 3rd chip, connection sheet, the first chip and the second chip after forming sandwich construction, also with procedure below：It is glutinous Tape, solidified；Between corresponding chip electrode and chip electrode, and bonded shape is distinguished between chip electrode and pin Into lead；Form plastic-sealed body；Coating is formed in the position outside plastic-sealed body；It is finally cut to create each independent wrapper Part.
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