CN107665856B - Method for forming contact hole and plasma etching method - Google Patents
Method for forming contact hole and plasma etching method Download PDFInfo
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- CN107665856B CN107665856B CN201610614424.6A CN201610614424A CN107665856B CN 107665856 B CN107665856 B CN 107665856B CN 201610614424 A CN201610614424 A CN 201610614424A CN 107665856 B CN107665856 B CN 107665856B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
Abstract
The invention provides a method for forming a contact hole and a plasma etching method, which are used for inhibiting shoulder damage of a nitride layer above a gate. The plasma etching method comprises the following steps: providing a substrate to a reaction cavity of a plasma etching device, wherein the substrate comprises a plurality of gates, nitride layers positioned above and at two sides of the gates and oxide layers filled between adjacent gates and above the nitride layers; introducing a first gas serving as a reaction gas into the reaction cavity, and etching the oxide layer; introducing a second gas serving as a reaction gas into the reaction cavity, and repairing the appearance of the nitride layer above the gate; switching the reaction gas back to the first gas, and etching the oxide layer between the adjacent gates to form the contact hole; the etching speed of the first gas to the oxide layer is higher than that of the second gas, and the etching speed of the second gas to the nitride layer is higher than that of the first gas.
Description
Technical Field
The present invention relates to the fabrication of semiconductor devices, and more particularly, to a method of fabricating self-aligned contact (self-aligned contact) holes in semiconductor devices.
Background
The study of SAC (self-aligned contact) etching technology plays a crucial role in memory fabrication and development. The basic structure of the SAC is shown in fig. 1. The gate 12 is surrounded and surrounded by a stop layer 14, which may be typically polysilicon, and nitride, such as Si3N4. A dielectric layer 16, which may typically be an oxide such as SiO, covers the stop layer 14 and fills the gaps between adjacent gates 122. A patterned Photoresist (PR)18 is formed over the dielectric layer 16. The desired SAC structure may be formed by etching the dielectric layer along the photoresist 18.
However, it is possible to use a single-layer,the step of etching the dielectric layer 16 along the photoresist 18 to form the contact hole has many difficulties in practical implementation. First, it is necessary to ensure a sufficient amount of polymer deposition during etching to protect the nitride 14, especially the nitride sidewalls, which requires a high oxide to nitride (SiO)2/Si3N4) But this also narrows the etch stop margin (etchstop margin), the problem of premature termination of the etch (etchstop) is likely to occur, as shown in fig. 2 (a). In addition, higher SiO2/Si3N4The selectivity also tends to distort the trench profile (profile) of the dielectric layer, creating a plugging or bowing problem, as shown in fig. 2(b), especially when the nitride (Si) is etched3N4) After exposure, the chemical environment changes, with SiO2/Si3N4High selectivity etchants (reactant gases) will tend to be SiO only2The surface etching finally causes the deformation of the groove morphology (profile), which affects the subsequent process.
Furthermore, the inevitable loss of nitride 14 during etching can lead to common shoulder damage (shoulderdamage), as shown in fig. 3. This is because: even with a high SiO2/Si3N4 selectivity, it is difficult to avoid loss of Si3N4 by etching SiO2, while the loss at the top of its edge region is far beyond the loss in its middle region, which makes the nitride significantly lower at the edge than in the middle region. This "shoulder damage" defect directly affects the breakdown voltage between the word line (word line) and the storage node (storage node). Moreover, conventional etching techniques almost always suffer from this "shoulder damage" problem. Thus, there is a need to ameliorate this "shoulder damage" problem.
Disclosure of Invention
According to an aspect of the present invention, there is provided a plasma etching method for forming a contact hole, including:
providing a substrate to a reaction cavity of a plasma etching device, wherein the substrate comprises a plurality of gates, nitride layers positioned above and at two sides of the gates and oxide layers filled between adjacent gates and above the nitride layers;
introducing a first gas serving as a reaction gas into the reaction cavity, and etching the oxide layer;
introducing a second gas serving as a reaction gas into the reaction cavity, and repairing the appearance of the nitride layer above the gate;
switching the reaction gas back to the first gas, and etching the oxide layer between the adjacent gates to form the contact hole;
the etching speed of the first gas to the oxide layer is higher than that of the second gas, and the etching speed of the second gas to the nitride layer is higher than that of the first gas.
Optionally, the second gas comprises a primary gas, the primary gas consisting of one or more gases.
Optionally, the primary gas comprises (1) CH2F2、(2)CHF3、(3)CF4And H2Combination of (4) CF4And CH4Combination of (1), (5) C2H3F，(6)C2H4F2And at least one of the six groups of gases.
Optionally, the second gas further comprises auxiliary gases CO, O2Or Ar.
Optionally, the first gas comprises a main gas comprising a gas consisting of two elements, carbon and fluorine.
Optionally, the first gas further comprises auxiliary gases CO, O2Or Ar.
Optionally, before the nitride layer over the gate is exposed, the etching of the oxide layer is terminated and a step of repairing the morphology of the nitride layer is started.
Optionally, the oxide layer is made of silicon oxide, and the nitride layer is made of silicon nitride.
According to another aspect of the present invention, there is provided a method for forming a contact hole, including:
providing a substrate, wherein the substrate comprises a plurality of gates, a nitride layer positioned above the gates, and an oxide layer filled between adjacent gates;
treating the nitride layer over the gate such that an upper surface of at least a middle region of the nitride layer becomes flatter than before the treating or such that an upper surface of the middle region forms a depression;
and etching the oxide layer between the adjacent gates by using plasma to form a contact hole.
Optionally, the oxide layer is formed over the nitride layer in addition to filling between adjacent gates.
Optionally, before the step of processing the nitride layer over the gate, the method further includes the following steps:
the plasma etches the oxide layer over the nitride layer.
Optionally, the step of treating the nitride layer is initiated by ending the step of etching the oxide layer over the nitride layer before the nitride layer over the gate is exposed.
Optionally, the oxide layer over the nitride layer is etched using a gas consisting of two elements, carbon and fluorine (CxFy).
Optionally, the step of processing the nitride layer over the gate is performed by plasma etching, and the gas used comprises (1) CH2F2、(2)CHF3、(3)CF4And H2Combination of (4) CF4And CH4Combination of (1), (5) C2H3F，(6)C2H4F2And at least one of the six groups of gases.
Optionally, the step of processing the nitride layer over the gate is performed by chemical mechanical polishing.
Optionally, the oxide layer is made of silicon oxide, and the nitride layer is made of silicon nitride.
Drawings
FIG. 1 is a schematic diagram of the basic structure of a self-aligned contact hole;
FIGS. 2 and 3 are schematic diagrams of defect types that often occur during the formation of self-aligned contact holes using conventional etching methods;
FIG. 4 is an illustrative diagram of the principles of the invention;
FIG. 5 is a flow chart of one embodiment of a plasma etching method of the present invention for forming self-aligned contact holes;
fig. 6 and 7 are schematic views of the structure of the substrate before being etched.
Detailed Description
The main etchant (or main reaction gas) for etching the self-aligned contact hole is usually CxFy、O2In combination with Ar, etc., by adjusting CxFyAnd O2The highest SiO is obtained by the ratio of (A) to (B), the temperature of an electrostatic chuck (ESC) for fixing a substrate, the power ratio (powerratio), etc2/Si3N4The ratio is selected to reduce nitride loss during etching. However, the traditional method still has difficulty in avoiding serious shoulder dam defect.
In the research and exploration of the problems, the inventor finds that the generation of the minor dam defect is caused by the structural defect (or morphological defect) of the nitride material above the gate and the uneven distribution of the polymer (polymer) in the etching. As shown in fig. 4(a), due to the limitations of the cvd process itself, the upper surface of the nitride layer (black area in the figure) formed above the gate is always uneven, and usually the middle area is high and the edge area is low, and the material of the middle area is hard and the material of the edge area is soft.
Based on the above findings, in order to effectively suppress the short dam defect, the inventors propose a new self-aligned contact hole etching method: during etching of the upper oxide layer, when the upper surface of the nitride layer is about to be exposed, the oxide layer is stopped and an etchant (e.g., CH) with a high nitride/oxide selectivity is used instead2F2Or CHF3Or CF4And H2Or CF, or4And CH4A combination of (A) or (C)2H3F, or C2H4F2) The topography of the upper surface of the nitride layer is pre-treated to improve the distribution of polymer (polymer) on the nitride layer during subsequent etching. After the pretreatment is finished, an etchant with high oxide/nitride selectivity ratio (such asCxFy) to etch the oxide and form contact holes in the oxide layer between adjacent gates.
During the above pretreatment, the nitride is more lost in the middle region, and the nitride is less lost in the edge region (i.e., the shoulder region) due to the protection of the surrounding oxide, as shown in fig. 4 (b). The pretreatment step sacrifices a small amount of top nitride, modifies the original shape of a nitride layer, balances the structural defect of the material at the shoulder position and the uneven distribution of polymers during etching, obviously reduces the loss of the nitride at the shoulder position in the subsequent etching process, inhibits the shoulder dam defect, and realizes controllable appearance. Fig. 4(c) is a schematic view of the topography of the nitride layer after the formation of self-aligned contact holes, showing that the outputting dam defect has been significantly eliminated.
Moreover, the improvement of the shadow dam defect also makes the process control window (process control window) larger, and can reduce the O within a certain range by increasing the bias power (bias power)2Content, etc. to further raise the oxide/nitride selectivity and reduce the total nitride loss.
FIG. 5 is a flow chart of one embodiment of a method of plasma etching for forming self-aligned contact holes of the present invention.
First, step S1 in fig. 5 is executed: and providing a substrate to a reaction cavity of the plasma etching device, wherein the substrate comprises a plurality of gates, nitride layers positioned above and at two sides of the gates, and oxide layers filled between adjacent gates and above the nitride layers.
The plasma etching apparatus used in step S1 may be generally a capacitively-coupled (CCP) plasma processing apparatus conventionally used in the art.
The structure of the substrate used in step S1 can be as shown in fig. 6 and 7. Wherein fig. 6 is a top view and fig. 7 is a cross-sectional view taken along line 6-6 of fig. 6. As shown in fig. 7, a plurality of gates (not shown) are formed above the substrate 20, and the gate may be made of polysilicon. The upper surface and both sides of the gate (more precisely, the "periphery") are formed with a nitride layer 24 (the black region in the figure), which may beIs Si3N4. Between adjacent gates and over nitride layer 24 is deposited an oxide layer 26, which may be SiO2. As shown in fig. 6, the gate and the overlying nitride layer (shown as a dashed area) are covered by oxide layer 26 and are not visible from above the substrate. A patterned photoresist 28 is formed over oxide layer 26. The photoresist 28 is interleaved with the gates (more specifically, the "nitride layers") and together act as a mask for the self-aligned contact holes, i.e., they together define the location and size of the contact holes.
Then, step S2 in fig. 5 is executed: and introducing a first gas serving as a reaction gas into the reaction cavity, and etching the oxide layer.
The reactive gas used in step S2 may be any gas conventionally used in the art for etching oxides (SiO)2) To nitride (Si)3N4) The reaction gas (etchant) which etches slowly, for example, an oxide can be etched using a gas (CxFy) composed of two elements of carbon and fluorine as a main gas (main gas) or one of the main gases. In addition, the reaction gas may also carry auxiliary gases, such as carbon monoxide (CO) and/or oxygen (O) as polymer control gases, for optimizing the etching effect2) Argon (Ar) as a diluent gas.
Step S2 may be terminated and the next step S3 may begin generally before the nitride layer over the gate is exposed (i.e., when a small amount of oxide remains over the nitride layer). In theory, the thinner the oxide remaining above the nitride layer at the end of step S2 is, the better the processing time for the subsequent step S3 is. In practice, this residual thickness can be set simultaneously in combination with the manufacturing tolerances (in particular the difference in height of the nitride layer at different locations) of the various steps (e.g. the deposition step of the nitride layer). Typically this residual thickness can be set to less than 10 to 15 nanometers (nm). The oxide layer residual thickness can be controlled using conventional etch endpoint monitoring equipment and methods.
In other embodiments, the step S2 and the step S3 may be ended after the nitride layer is initially exposed, which may improve the "minor dam" defect of the nitride layer, but the improvement is slightly inferior, but still superior to the conventional etching method.
After that, step S3 in fig. 5 is executed: and introducing a second gas serving as a reaction gas into the reaction cavity, and repairing the appearance of the nitride layer above the gate, wherein the etching speed of the second gas on the nitride layer is higher than that of the first gas, and the etching speed of the first gas on the oxide layer is higher than that of the second gas.
The reaction gas used in step S3 may be one conventionally used in the art for etching nitride (Si)3N4) And p-oxide (SiO)2) The slower etching reactant gas (etchant) can be, for example, one or more of the following six groups of gases- (1) CH2F2，(2)CHF3，(3)CF4And H2Combination of (4) CF4And CH4Combination of (1), (5) C2H3F，(6)C2H4F2Etching the nitride as the main gas (main gas) or one of the main gases. In addition, to optimize the etching effect, the reaction gas may also carry an auxiliary gas, such as oxygen (O) as a polymer control gas2) And/or carbon monoxide (CO), argon (Ar) as a diluent gas.
In the etching of step S3, the pressure of the reaction chamber can be controlled to be 40 to 80mT (millitorr); the frequency of a Source radio frequency Power Source (Source RF Power) for controlling plasma generation and concentration can be maintained at 60MHz (megahertz), and the Power can be maintained at 400 to 800W (watts); the frequency of the Bias Power source (Bias RF Power) for controlling the plasma energy and distribution can be maintained at 2MHz (megahertz) and the Power can be maintained at 50 to 150W (watts).
The term "repairing the morphology of the nitride layer" as used herein includes at least two meanings: (i) the process of step S3 is to reach the nitride layer and improve the topography of the top surface of the nitride layer, at least to reduce the height difference between the middle region and the edge region of the nitride layer, and ideally (but not necessarily) the middle region itself becomes flatter (but not necessarily absolutely flat, the middle region is slightly recessed (i.e. the middle region is lower than the edge region) while the height difference is reduced; (2) after step S3, the nitride layer should be left with sufficient thickness in the middle area or the edge area, so that the nitride layer cannot be consumed excessively.
Then, step S4 in fig. 5 is executed: the reaction gas is switched back to the first gas, and the oxide layer between adjacent gates is etched to form contact holes.
After the intended purpose of step S3 is achieved ("repairing the topography of the nitride layer"), step S3 may be ended, and step S4 may begin.
The process parameters of step S4 may be the same as step S2, and the description thereof will not be repeated.
In other embodiments, the reaction gases used in step S2 and step S4 may be different, and the specific process parameters may be different according to the requirement.
In addition, in step S3, the means for repairing the shape of the nitride layer is not limited to plasma etching, and any means having a function of repairing the shape of the nitride layer can be theoretically used. For example, if the height of the contact hole is not particularly required, Chemical Mechanical Polishing (CMP) can be considered to repair the topography of the nitride layer. Furthermore, in other embodiments, the plasma etching in step S2 may be replaced by a CMP process.
In a more extreme case, if allowed, steps S2 and S3 may be directly replaced by a Chemical Mechanical Polishing (CMP) step, i.e., CMP not only removes the oxide layer above the nitride layer, but also repairs the topography of the middle region of the nitride layer. However, it is to be noted that in this case it must be ensured that: at the end of CMP, the nitride layer has oxide remaining at least over its edges.
While the present invention has been described in detail with reference to the preferred embodiments, it should be understood that the above description should not be taken as limiting the invention. Various modifications and alterations to this invention will become apparent to those skilled in the art upon reading the foregoing description. Accordingly, the scope of the invention should be determined from the following claims.
Claims (16)
1. A plasma etching method for forming a contact hole, comprising:
providing a substrate to a reaction cavity of a plasma etching device, wherein the substrate comprises a plurality of gates, nitride layers positioned above and at two sides of the gates and oxide layers filled between adjacent gates and above the nitride layers;
introducing a first gas serving as a reaction gas into the reaction cavity, and etching the oxide layer;
introducing a second gas serving as a reaction gas into the reaction cavity, and repairing the appearance of the nitride layer above the gate;
switching the reaction gas back to the first gas, and etching the oxide layer between the adjacent gates to form the contact hole;
the etching speed of the first gas to the oxide layer is higher than that of the second gas, and the etching speed of the second gas to the nitride layer is higher than that of the first gas.
2. A plasma etching method as recited in claim 1, wherein the second gas comprises a main gas, the main gas being composed of one or more gases.
3. The plasma etching method of claim 2, wherein the main gas comprises (1) CH2F2、（2）CHF3、（3）CF4And H2Combination of (4) CF4And CH4Combination of (1), (5) C2H3F，（6）C2H4F2And at least one of the six groups of gases.
4. A plasma etching method as claimed in claim 2, wherein the second gas further comprises auxiliary gases CO, O2Or Ar.
5. The plasma etching method of claim 1, wherein the first gas comprises a main gas comprising a gas consisting of two elements of carbon and fluorine.
6. A plasma etching method as recited in claim 5, wherein the first gas further comprises auxiliary gases CO, O2Or Ar.
7. The plasma etching method of claim 1, wherein the etching of the oxide layer is terminated to begin the step of repairing the topography of the nitride layer before the nitride layer over the gate is exposed.
8. The plasma etching method of claim 1, wherein the oxide layer is made of silicon oxide and the nitride layer is made of silicon nitride.
9. A method for forming a contact hole, comprising:
providing a substrate, wherein the substrate comprises a plurality of gates, a nitride layer positioned above the gates, and an oxide layer positioned above the nitride layer and filled between the adjacent gates;
treating the nitride layer over the gate such that an upper surface of at least a middle region of the nitride layer becomes flatter than before the treating or such that an upper surface of the middle region forms a depression;
and etching the oxide layer between the adjacent gates by using plasma to form a contact hole.
10. The method of claim 9, wherein the oxide layer is formed over a nitride layer in addition to filling between adjacent gates.
11. The method of claim 10, further comprising, prior to the step of processing the nitride layer over the gate, the steps of:
the plasma etches the oxide layer over the nitride layer.
12. The method of claim 11, wherein the step of processing the nitride layer begins by ending the step of etching the oxide layer over the nitride layer before the nitride layer over the gate is exposed.
13. The method of claim 11, wherein the oxide layer over the nitride layer is etched using a gas consisting of two elements, carbon and fluorine.
14. The method of claim 9 or 11, wherein the step of treating the nitride layer over the gate is performed by plasma etching using a gas comprising (1) CH2F2、（2）CHF3、（3）CF4And H2Combination of (4) CF4And CH4Combination of (1), (5) C2H3F，（6）C2H4F2And at least one of the six groups of gases.
15. The method of claim 9 or 10, wherein said step of treating said nitride layer over the gate is performed by chemical mechanical polishing.
16. The method of claim 9, wherein the oxide layer is silicon oxide and the nitride layer is silicon nitride.
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| CN101197319A (en) * | 2006-12-05 | 2008-06-11 | 中芯国际集成电路制造(上海)有限公司 | Production method of self-aligning contact hole |
| CN103337475A (en) * | 2013-06-27 | 2013-10-02 | 上海华力微电子有限公司 | Double-structure contact hole synchronous-etching technology |
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| KR100370242B1 (en) * | 2000-12-26 | 2003-01-30 | 삼성전자 주식회사 | Method for fabricating a non-volatile memory device |
| US6960523B2 (en) * | 2003-04-03 | 2005-11-01 | Infineon Technolgies Ag | Method of reducing erosion of a nitride gate cap layer during reactive ion etch of nitride liner layer for bit line contact of DRAM device |
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| CN101197319A (en) * | 2006-12-05 | 2008-06-11 | 中芯国际集成电路制造(上海)有限公司 | Production method of self-aligning contact hole |
| CN103337475A (en) * | 2013-06-27 | 2013-10-02 | 上海华力微电子有限公司 | Double-structure contact hole synchronous-etching technology |
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