CN107612526A - A kind of low-power consumption oscillator circuit of frequency stabilization - Google Patents
A kind of low-power consumption oscillator circuit of frequency stabilization Download PDFInfo
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- CN107612526A CN107612526A CN201610540678.8A CN201610540678A CN107612526A CN 107612526 A CN107612526 A CN 107612526A CN 201610540678 A CN201610540678 A CN 201610540678A CN 107612526 A CN107612526 A CN 107612526A
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Abstract
A kind of low-power consumption oscillator circuit of frequency stabilization, suitable for field of power supplies.Low-power consumption oscillator circuit is made up of pierce circuit, current source circuit, hysteresis comparator circuit.Pierce circuit uses the principle of relaxation discharge and recharge, constant current charge-discharge is carried out to electric capacity both ends by improved mode, and electric capacity both end voltage is compared using the mode of comparator, eliminate demand of the comparator to datum, make design more simple, and save the power consumption needed for datum generation module.Circuit structure is simple, takes small volume, working stability, adaptability is good, improves operating efficiency, reduces circuit power consumption, and have good anti-interference and reliability.
Description
Art
The present invention relates to a kind of low-power consumption oscillator circuit of frequency stabilization, suitable for field of power supplies.
Background technology
For most of SoC (System on a Chip) designs, clock generator block is essential group
Into part.There is provided timing reference input typically has two ways：One kind is to use crystal oscillator.It can provide frequency accuracy very
High clock signal, and the frequency is influenceed very little by supply voltage, temperature and technique (PVT), but need extra take
Two PAD connect the crystal outside chip, so as to adding the area of chip and cost.Meanwhile for the dry of external environment condition
Disturb, crystal oscillator has the possibility of failure of oscillation.Another is integrated with the oscillator of chip internal.For being wanted to clock frequency
It is not too high application environment to ask, and can both save area using the oscillator of inside, can ensure the reliability of its work again.
At present, multiple-working mode is often designed for the consideration of power consumption and performance, chip.When the chip free time, in order to save power consumption,
Chip can be allowed to enter people's park mode.In the hibernation mode, chip master clock can be closed.In order that chip can be from park mode
In be waken up, chip still needs the clock signal of a low frequency.Now, the power consumption of low-frequency clock circuit is finger of greatest concern
Mark, on the basis of low-power consumption, it is to need to solve the problems, such as in design to improve frequency stability.
The content of the invention
The present invention provides a kind of low-power consumption oscillator circuit of frequency stabilization, and pierce circuit uses the original of relaxation discharge and recharge
Reason, constant current charge-discharge is carried out to electric capacity both ends by improved mode, and electric capacity both end voltage entered using the mode of comparator
Row compares, and eliminates demand of the comparator to datum, makes design more simple, and save datum generation module
Required power consumption.
The technical solution adopted in the present invention is：
Low-power consumption oscillator circuit is made up of pierce circuit, current source circuit, hysteresis comparator circuit.
The pierce circuit is produced the electric current unrelated with power supply by reference current source circuit, with the image current of the electric current
Discharge and recharge is carried out to electric capacity.Wherein, when S1 is high level.S2 is low level, i.e. the now output of comparator is low level.From
And constant-current charge is carried out to C0 left end N1 by PMOS M5, while constant current is carried out to CO right-hand member N2 by NMOS tube M6 and put
Electricity.Decline as the current potential of N1 points rises N2 points current potential, when N1 and N2 potential difference is more than the retarding window of hysteresis comparator,
The output saltus step of comparator is high level, and it is low level to cause Sl saltus steps, while S2 saltus steps are high level.Similarly, PMOS is passed through
Pipe M5 carries out constant-current discharge to CO left end N1, while carries out constant-current charge to CO right-hand member N2 by NMOS tube M6.N1 points electricity
Position declines, and N2 points current potential rises, and when N2 and N1 potential difference is more than the retarding window of hysteresis comparator, comparator output is anti-
Phase, it is changed into low level.So as to complete the change procedure that clock signal produces a cycle.
In the current source circuit, the current source unrelated with supply voltage is made up of M1~M6 and RP1 and RD2, MS1~
MS3 is start-up circuit.During normal work, MS4 pipes are opened, and by MS3 tube grid voltage pull-downs, so as to which MS3 pipes turn off, do not influence electricity
Current source circuit normal work；When current source is in abnormal nought state, the grid of M5/6 pipes maintains high level.The grid of M1/2 pipes
Voltage keeps low level, the shut-off of MS4 pipes, and MS3 pipes are opened so as to which the grid of M5/6 pipes be dragged down so that current source circuit is opened.
In current source branch caused electric current be M1 and M2 △ VGS and resistance ratio, wherein, in order to further improve
The irrelevance of electric current and supply voltage, using cascode structures.In order to improve temperature characterisitic, resistance uses polysilicon resistance
The form of RP1 and diffusion resistance RD2 series connection is realized.Wherein, polysilicon resistance is negative temperature coefficient, and diffusion resistance is positive temperature system
Number, therefore certain proportion series connection polysilicon resistance and diffusion resistance are used, make total resistance value temperature independent.
In the hysteresis comparator circuit, the input stage of high-gain open loop comparator realizes sluggish knot using internal positive feedback
Structure.Wherein, M5 tube grids bias voltage is derived from electric current source generating circuit.In order that circuit internal positive feedback coefficient is more than negative-feedback
Coefficient, M6/7 breadth length ratio should be more than M3/4 breadth length ratio.It can be adjusted by changing the breadth length ratio and flowing through M5 electric current
The retarding window of the comparator.
The beneficial effects of the invention are as follows：Circuit structure is simple, takes small volume, working stability, adaptability is good, improves work
Make efficiency, reduce circuit power consumption, and there is good anti-interference and reliability.
Brief description of the drawings
The present invention is further described with reference to the accompanying drawings and examples.
Fig. 1 is the pierce circuit of the present invention.
Fig. 2 is the current source circuit of the present invention.
Fig. 3 is the hysteresis comparator circuit of the present invention.
Embodiment
The invention will be further described with reference to the accompanying drawings and examples.
Such as Fig. 1, pierce circuit is produced the electric current unrelated with power supply by reference current source circuit, with the mirror image electricity of the electric current
Stream carries out discharge and recharge to electric capacity.Wherein, when S1 is high level.S2 is low level, i.e. the now output of comparator is low level.
So as to carry out constant-current charge to C0 left end N1 by PMOS M5, while constant current is carried out to CO right-hand member N2 by NMOS tube M6
Electric discharge.Decline as the current potential of N1 points rises N2 points current potential, when N1 and N2 potential difference is more than the retarding window of hysteresis comparator
When, the output saltus step of comparator is high level, and it is low level to cause Sl saltus steps, while S2 saltus steps are high level.Similarly, pass through
PMOS M5 carries out constant-current discharge to CO left end N1, while carries out constant-current charge to CO right-hand member N2 by NMOS tube M6.N1
Point current potential declines, and N2 points current potential rises, when N2 and N1 potential difference is more than the retarding window of hysteresis comparator, comparator output
It is anti-phase, it is changed into low level.So as to complete the change procedure that clock signal produces a cycle.
Such as Fig. 2, in current source circuit, the current source unrelated with supply voltage is made up of M1~M6 and RP1 and RD2,
MS1~MS3 is start-up circuit.During normal work, MS4 pipes are opened, by MS3 tube grid voltage pull-downs, so that MS3 pipes turn off, no
Influence current source circuit normal work；When current source is in abnormal nought state, the grid of M5/6 pipes maintains high level.M1/2 is managed
Grid voltage keep low level, the shut-off of MS4 pipes, MS3 pipes are opened so that the grid of M5/6 pipes be dragged down so that current source circuit
Open.
In current source branch caused electric current be M1 and M2 △ VGS and resistance ratio, wherein, in order to further improve
The irrelevance of electric current and supply voltage, using cascode structures.In order to improve temperature characterisitic, resistance uses polysilicon resistance
The form of RP1 and diffusion resistance RD2 series connection is realized.Wherein, polysilicon resistance is negative temperature coefficient, and diffusion resistance is positive temperature system
Number, therefore certain proportion series connection polysilicon resistance and diffusion resistance are used, make total resistance value temperature independent.
Such as Fig. 3, in hysteresis comparator circuit, the input stage of high-gain open loop comparator is realized sluggish using internal positive feedback
Structure.Wherein, M5 tube grids bias voltage is derived from electric current source generating circuit.Born instead in order that circuit internal positive feedback coefficient is more than
Feedforward coefficient, M6/7 breadth length ratio should be more than M3/4 breadth length ratio.It can be adjusted by changing the breadth length ratio and flowing through M5 electric current
Save the retarding window of the comparator.
Claims (8)
1. a kind of low-power consumption oscillator circuit of frequency stabilization, it is characterized in that：Described low-power consumption oscillator circuit is by oscillator
Circuit, current source circuit, hysteresis comparator circuit composition.
2. a kind of low-power consumption oscillator circuit of frequency stabilization according to claim 1, it is characterized in that：The oscillator electricity
It route reference current source circuit and produces the electric current unrelated with power supply, discharge and recharge is carried out to electric capacity with the image current of the electric current.
3. a kind of low-power consumption oscillator circuit of frequency stabilization according to claim 1, it is characterized in that：Described oscillator
Circuit carries out constant-current charge to C0 left end N1 by PMOS M5, while carries out constant current to CO right-hand member N2 by NMOS tube M6
Electric discharge.
4. a kind of low-power consumption oscillator circuit of frequency stabilization according to claim 1, it is characterized in that：Described oscillator
Circuit carries out constant-current discharge to CO left end N1 by PMOS M5, while carries out constant current to CO right-hand member N2 by NMOS tube M6
Charging.
5. a kind of low-power consumption oscillator circuit of frequency stabilization according to claim 1, it is characterized in that：The current source electricity
Lu Zhong, the current source unrelated with supply voltage is made up of M1~M6 and RP1 and RD2, and MS1~MS3 is start-up circuit.
6. a kind of low-power consumption oscillator circuit of frequency stabilization according to claim 1, it is characterized in that：The current source electricity
Lu Zhong, when current source is in abnormal nought state, the grid of M5/6 pipes maintains high level, and the grid voltage of M1/2 pipes keeps low electricity
Flat, MS4 pipes shut-off, MS3 pipes are opened so as to which the grid of M5/6 pipes be dragged down.
7. a kind of low-power consumption oscillator circuit of frequency stabilization according to claim 1, it is characterized in that：The current source electricity
Lu Zhong, caused electric current is M1 and M2 △ VGS and the ratio of resistance in current source branch, in order to further improve electric current and electricity
The irrelevance of source voltage, using cascode structures.
8. a kind of low-power consumption oscillator circuit of frequency stabilization according to claim 1, it is characterized in that：The sluggishness is relatively
In device circuit, the input stage of high-gain open loop comparator realizes sluggish structure using internal positive feedback.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610540678.8A CN107612526A (en) | 2016-07-11 | 2016-07-11 | A kind of low-power consumption oscillator circuit of frequency stabilization |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610540678.8A CN107612526A (en) | 2016-07-11 | 2016-07-11 | A kind of low-power consumption oscillator circuit of frequency stabilization |
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| CN107612526A true CN107612526A (en) | 2018-01-19 |
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| CN201610540678.8A Pending CN107612526A (en) | 2016-07-11 | 2016-07-11 | A kind of low-power consumption oscillator circuit of frequency stabilization |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114675705A (en) * | 2022-04-12 | 2022-06-28 | 中科芯集成电路有限公司 | Low-temperature drift hysteresis comparator |
-
2016
- 2016-07-11 CN CN201610540678.8A patent/CN107612526A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114675705A (en) * | 2022-04-12 | 2022-06-28 | 中科芯集成电路有限公司 | Low-temperature drift hysteresis comparator |
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| PB01 | Publication | ||
| PB01 | Publication | ||
| WD01 | Invention patent application deemed withdrawn after publication | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20180119 |