CN101566974A - System on a chip and starting method thereof - Google Patents
System on a chip and starting method thereof Download PDFInfo
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- CN101566974A CN101566974A CNA2009101077090A CN200910107709A CN101566974A CN 101566974 A CN101566974 A CN 101566974A CN A2009101077090 A CNA2009101077090 A CN A2009101077090A CN 200910107709 A CN200910107709 A CN 200910107709A CN 101566974 A CN101566974 A CN 101566974A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/24—Resetting means
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
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Abstract
The invention is suitable for the field of integrate circuit, and provides a system on a chip and a starting method thereof, wherein the system on a chip includes a on-chip power supply device, a reset device and a functional device; the on-chip power supply device includes: a clock generator for generating clock signal, a first reference voltage generating circuit for generating the first reference voltage and a power supply regulator. The power supply regulator provides power supply voltage required by other device during working; the reset device sets the functional device in a reset state in the pre-delay time, when the delay time is finished, the reset state of the functional device is released and the functional device outputs the clock signal, then the functional device starts working. Once the external power source connects to the system on a chip, the on-chip power supply device starts immediately under of action of the first reference voltage, which is not controlled by any reset signals and enable signals of other devices inside the system, thereby improving the start speed of the system on a chip.
Description
Technical field
The invention belongs to integrated circuit fields, relate in particular to a kind of SOC (system on a chip) and startup method thereof.
Background technology
(System On Chip, SOC) system comprises reference voltage generating circuit, power generation circuit, clock generation circuit and four parts of Digital Analog Hybrid Circuits to a SOC (system on a chip) usually.In general, reference voltage generating circuit needs power generation circuit to provide power supply for it, and power generation circuit needs reference voltage generating circuit to provide reference voltage for it; Clock generation circuit needs power generation circuit to provide power supply for it, and power generation circuit needs clock-generating device to provide clock signal for it; Digital Analog Hybrid Circuits needs power supply, reference voltage and clock signal simultaneously, and Digital Analog Hybrid Circuits also might be gone control or be regulated power supply, reference voltage and clock signal simultaneously.Industry tradition startup method is: when external power source is connected to the SOC SOC (system on a chip), at first set up a holding state, a part of circuit at least resets; After receiving a power enable signal, produce a clock signal; When the clock signal reach stable after, enable reference voltage signal, internal electric source begins to start under the effect of clock signal and reference signal then; When internal electric source reach stable after, the ena-bung function module, thus system enters into normal operating conditions.The power initiation time of this classic method is sum start-up time of each module no better than, causes the system start-up time slow, needing to be not suitable for the application scenario of quick start system.
Summary of the invention
The purpose of the embodiment of the invention is to provide a kind of SOC (system on a chip) and startup method thereof, so that the SOC system can correctly start apace.
The embodiment of the invention is achieved in that a kind of SOC (system on a chip), comprising:
Supply unit, resetting means and functional device in the sheet;
Described interior supply unit comprises first reference voltage generating circuit and the feed regulator isolator that is used to produce first reference voltage, and described feed regulator isolator produces the required supply voltage of other device work of SOC (system on a chip) inside under the effect of described first reference voltage;
Described resetting means makes described functional device be in reset mode in default delay time, when delay time is finished, remove the reset mode and the clock signal of described functional device, described functional device is started working under the effect of supply voltage, described first reference voltage and described clock signal that described feed regulator isolator produces.
The embodiment of the invention also provides a kind of startup method of SOC (system on a chip), and described SOC (system on a chip) comprises supply unit, resetting means and functional device in the sheet; Described interior supply unit comprises first reference voltage generating circuit and the feed regulator isolator that is used to produce first reference voltage; Described reseting module comprises reset circuit and delay circuit;
Described startup method may further comprise the steps:
1): the feed regulator isolator in the sheet in the supply unit starts under the effect of described first reference voltage, and the while reset circuit sends the reset enable signal functional device and is in reset mode, and delay circuit is started working;
2): delay circuit is finished after the time delays that sets, and clock signal is delivered to functional device, and the disappearance of the reset signal of reset circuit, and functional device begins operate as normal.
In the embodiment of the invention, in case external power source is connected to SOC (system on a chip), supply unit just begins to start under the effect of first reference voltage immediately in the sheet, other install the control of any reset signal and enable signal not to be subjected to internal system, do not need promptly to wait for that other device of SOC (system on a chip) sends any reset signal or enable signal, therefore improved the toggle speed of SOC (system on a chip) greatly; And after the power supply that does not need to wait for supply unit generation in the sheet reaches fully and stablizes, functional device is just started working, as long as after the time delay that the delay circuit of certain subfunction unit correspondence is realized setting in the control function device, this subfunction unit is the energy operate as normal just, has further improved the toggle speed of SOC (system on a chip); The supply voltage that produces when supply unit in the sheet rises to a certain degree and before the ena-bung function device, by the performance apparatus for evaluating power source performance that supply unit in the sheet produces is assessed, to promote the internal electric source performance.
Description of drawings
Fig. 1 is the structure principle chart of the SOC (system on a chip) that provides of the embodiment of the invention;
Fig. 2 is the realization flow figure of the startup method of SOC (system on a chip) shown in Figure 1;
Fig. 3 is a topology example figure of shown in Figure 1 clock generator 111 in the interior supply unit 11;
Fig. 4 is a topology example figure of shown in Figure 1 first reference voltage generating circuit 112 in the interior supply unit 11;
Fig. 5 is a delay circuit 121 in the resetting means 12 shown in Figure 1 and a topology example figure of reset circuit 122.
Embodiment
In order to make purpose of the present invention, technical scheme and advantage clearer,, the present invention is further elaborated below in conjunction with drawings and Examples.Should be appreciated that specific embodiment described herein only in order to explanation the present invention, and be not used in qualification the present invention.
In the embodiment of the invention, in case external power source is connected to SOC (system on a chip), supply unit just begins to start under the effect of first reference voltage immediately in the sheet, and other install the control of any reset signal and enable signal not to be subjected to internal system.
Fig. 1 shows the structural principle of the SOC (system on a chip) that the embodiment of the invention provides, and for convenience of description, only shows part related to the present invention.
With reference to Fig. 1, SOC (system on a chip) 1 comprises supply unit 11, resetting means 12, functional device 13 and 14 4 parts of Performance Evaluation device in the sheet.SOC (system on a chip) is connected with external power source 2, and external power source 2 can be battery or other power supply maker, but it can only provide correct supply voltage for partial circuit in the SOC (system on a chip).
Should be appreciated that above structure about supply unit in the sheet 11 only describes with the example that is applied as that needs clock generator, for the application of clock generator when not required, supply unit 11 also can not comprise clock generator in the sheet.
Resetting means 12 comprises delay circuit 121, reset circuit 122, clock shielding device 123 and clock generator 124, wherein delay circuit 121, reset circuit 122 and clock shielding device 123 are directly powered by external power source 2, the supply voltage power supply that clock generator 124 is then produced by the feed regulator isolator in the supply unit in the sheet 11 113.When external power source 2 is connected to SOC (system on a chip) 1, reset circuit 122 produces reset signal immediately, and functional device 13 is resetted, and avoids functional device 13 to cause misoperation in supply unit 12 start-up courses with regard to starting working in sheet.Simultaneously, the connected clock shielding of reset circuit 122 controls device 123 promptly is not delivered to functional device 13 with the clock signal shielding that clock generator 124 produces.When the supply voltage of supply unit in the sheet 11 output rises to when clock generator 124 is started working, clock generator 124 begins to produce functional device 13 needed clock signals.After external power source 2 is connected to SOC (system on a chip) 1, delay circuit 121 is just started working, it is through after the time delay that sets, delay circuit 121 sends control signal to reset circuit 122, reset circuit 122 is stopped to functional device 13 output reset signals, reset circuit 122 and then send control signal to clock shielding device 123 makes clock shielding device 123 that the clock signal that clock generator 124 is generated is delivered to functional device 13, and functional device 13 is started working.That is to say from external power source 2 be connected to SOC (system on a chip) 1 to time that functional device 13 is started working fully by delay circuit 121 controls, as long as delay circuit 121 is through after the time delays that set, functional device 13 can be started working.
In the embodiment of the invention, Performance Evaluation device 14 comprises Performance Evaluation circuit 141, after supply unit in the sheet 11 sends the elementary stabilization signal of power supply, Performance Evaluation circuit 141 begins the supply voltage performance of feed regulator isolator 113 outputs is assessed, do not reach and set and require (as detect supply voltage value vary with temperature the violent or supply voltage value of comparison accurately do not reach the target that sets) if detect the supply voltage performance index of supply unit 11 outputs in the sheet, then Performance Evaluation circuit 141 sends performance to feed regulator isolator 113 and adjusts signal.After feed regulator isolator 113 is adjusted the supply voltage of self exporting, return a Performance Detection signal to performance evaluation circuits 141, Performance Evaluation circuit 141 is assessed the supply voltage performance of feed regulator isolator 113 outputs once more, repeats above-mentioned steps and meets the demands up to this supply voltage performance.Wherein the elementary stabilization signal of power supply is sent by the clock generator 111 or the feed regulator isolator 113 of supply unit in the sheet 11.
Further, Performance Evaluation device 14 comprises also and second reference voltage generating circuit 142 and voltage reference selector switch 143 that voltage reference selector switch 143 is connected with second reference voltage generating circuit 142 with first reference voltage generating circuit 112 simultaneously.Before Performance Evaluation device 14 is started working, the feed regulator isolator 113 and the functional device 13 of supply unit 11 in first reference voltage generating circuit, 112 control strips.After system start-up, when if first reference voltage that Performance Evaluation circuit 141 detects first reference voltage generating circuit 112 can not satisfy the performance requirement of certain subfunction unit in supply unit 11 in the sheet or the functional device 13, then Performance Evaluation circuit 141 replaces first reference voltage by 143 controls of voltage reference selector switch with second reference voltage that second reference voltage generating circuit 142 produces, thus the performance of certain subfunction unit in power supply that supply unit 11 is exported in the optimization sheet or the functional device 13.If when the first reference voltage performance that detects Performance Evaluation circuit 141 satisfies requiring of interior supply unit 11 of sheet and functional device 13, then do not need to switch reference voltage, can close second reference voltage generating circuit 142 this moment to save system power dissipation.Certainly, Performance Evaluation device 14 not necessarily needs to wait in the sheet just starts working behind supply unit 11 complete stabilities, can also be in sheet the supply voltage of supply unit 11 outputs just start working after rising to a certain degree, can further improve the toggle speed of SOC (system on a chip) 1 like this.
Fig. 2 shows the realization flow of the startup method of SOC (system on a chip) shown in Figure 1, and details are as follows:
In step S21, the feed regulator isolator in the sheet in the supply unit starts immediately; Reset circuit sends the reset enable signal functional device and is in reset mode, and delay circuit is started working.
In case external power source is connected to SOC (system on a chip), the clock generator and first reference voltage generating circuit in the sheet in the supply unit must be established beginning work by cable immediately, clock generator produces the needed clock signal of feed regulator isolator, first reference voltage generating circuit produces needed first reference voltage of feed regulator isolator, feed regulator isolator normally starts under the control of the clock signal and first reference voltage immediately then, owing to be not subjected to the control of any reset signal and enable signal when supply unit starts in the sheet, promptly do not need to wait for after other device of SOC (system on a chip) sends any signal just to begin to start, therefore improved the toggle speed of SOC (system on a chip) greatly.
When external power source is connected to SOC (system on a chip), reset circuit produces reset signal immediately, functional device is resetted, avoid functional device in sheet, to cause misoperation in the supply unit start-up course with regard to starting working, delay circuit is started working simultaneously, and the time inner control of waiting in time-delay masks the needed clock signal of functional device operate as normal.
In step S22, delay circuit is finished the time delays that sets, and functional device begins operate as normal.
In the embodiment of the invention, functional device comprises the subfunction unit that a plurality of operating voltage are inequality, for further improving the toggle speed of SOC (system on a chip), just start working after making functional device not need to wait until the supply voltage complete stability that supply unit produces in the sheet, difference according to each subfunction cell operation voltage in the functional device, correspondence is provided with a plurality of delay times in delay circuit, delay circuit is finished after the time delays that sets, clock signal is delivered to functional device, and the reset signal of reset circuit disappears, thereby the subfunction unit begins operate as normal.
Further, for guaranteeing the performance of the supply voltage of supply unit functions of physical supply device in the sheet, SOC (system on a chip) further comprises a Performance Evaluation device, and described Performance Evaluation device comprises a Performance Evaluation circuit; Between step S21 and step S22, also comprise the steps:
In step S2111, whether the supply voltage performance that Performance Evaluation circuitry evaluates feed regulator isolator produces reaches requirement, whether vary with temperature the violent or supply voltage value of comparison as supply voltage value and accurately do not reach the target that sets, be then to enter step S2112, otherwise enter step S2113.
Wherein, the Performance Evaluation circuit not necessarily needs to wait in the sheet just starts working behind the supply unit complete stability, just starts working after the supply voltage that it can supply unit be exported in sheet rises to a certain degree, can further improve the toggle speed of SOC (system on a chip) like this.
In step S2112, the Performance Evaluation circuit quits work, and the supply voltage of feed regulator isolator keeps original performance.
In step S2113, feed regulator isolator is adjusted signal according to the performance of Performance Evaluation circuit, promotes the power source performance that is produced.
After feed regulator isolator is adjusted the supply voltage of self exporting, return a Performance Detection signal to the performance evaluation circuits, the Performance Evaluation circuit is assessed the supply voltage performance of feed regulator isolator output once more, repeats above-mentioned steps and meets the demands up to this supply voltage performance.
Further, the Performance Evaluation device further comprises second reference voltage generating circuit and the voltage reference selector switch that is used to produce second reference voltage.
Among the step S2114, can Performance Evaluation circuitry evaluates first reference voltage meet the demands.
Among the step S2115, if can not meet the demands, voltage reference selector switch control output second reference voltage is to functional device.
The step mark that should be appreciated that the embodiment of the invention and claim only is used in reference to for this step, and is not used in the sequencing that limits the step execution.
Fig. 3 shows a topology example of shown in Figure 1 clock generator 111 in the interior supply unit 11, and it is the circular oscillator that band RC postpones, and wherein T1, T2, T3 are reverser, and the frequency of the clock signal of output is about 1/4 π RC.The power supply of clock generator 111 is provided by external power source 2, as long as external power source 2 is connected to SOC (system on a chip) 1, this clock generator 111 just can produce a clock signal 2 at once, drives feed regulator isolator 113 and starts.
Fig. 4 shows a topology example of shown in Figure 1 first reference voltage generating circuit 112 in the interior supply unit 11, its input voltage is an external power source 2, the output reference voltage signal, as long as external power source 2 is connected to SOC (system on a chip) 1, first reference voltage generating circuit 112 just can produce a reference voltage signal, size is the grid voltage of NMOS pipe Q, i.e. threshold voltage and its overdrive voltage sum of NMOS pipe Q.If design the threshold voltage of this overdrive voltage much smaller than NMOS pipe 21, then reference voltage signal is about the threshold voltage of NMOS pipe Q, thereby first reference voltage generating circuit 112 has produced a comparatively stable benchmark voltage signal.
Fig. 5 is a delay circuit 121 in the resetting means 12 shown in Figure 1 and a topology example of reset circuit 122, and its input signal is the signal of external power source 2, and output signal is a reset signal.When external power source 2 is connected to SOC (system on a chip) 1, external power source 2 is given d type flip flop 1, d type flip flop 2, d type flip flop 3 and reverser T power supply immediately, but because the delay of resistance R and capacitor C, the input end of reverser T is after externally power supply 2 is connected to SOC (system on a chip) 1 certain hour, still keep low level, thereby during this period of time the output terminal of reverser T keeps high level, therefore d type flip flop 1, d type flip flop 2 and d type flip flop 3 are under reset signal control, carry out the zero clearing action, thereby reset signal keeps low level always, makes functional device 13 be in reset mode.When the input end of reverser T slowly rises to high level, the reset signal output low level, thus d type flip flop 1, d type flip flop 2 and d type flip flop 3 stop the zero clearing action, and beginning is worked under the control of clock signal.Begin to produce before its 4th rising edge signal arrive from clock signal, reset signal keeps low level always, makes functional device 13 be in reset mode always.After the 4th rising edge signal of clock signal arrived, rising edge signal of delay circuit 121 outputs was given reset circuit 122, make reset signal from the low transition to the high level, thereby functional device 13 withdraws from reset mode, the beginning operate as normal.When should be appreciated that specific implementation, the number of d type flip flop in the delay circuit 121 can be set according to the time situation.
In the embodiment of the invention, in case external power source is connected to SOC (system on a chip), supply unit just can begin to start immediately in the sheet, other install the control of any reset signal and enable signal not to be subjected to internal system, do not need promptly to wait for that other device of SOC (system on a chip) sends any reset signal or enable signal, therefore improved the toggle speed of SOC (system on a chip) greatly; And after the power supply that does not need to wait for supply unit generation in the sheet reaches fully and stablizes, functional device is just started working, as long as after the time delay that the delay circuit of certain subfunction unit correspondence is realized setting in the control function device, this subfunction unit is the energy operate as normal just, has further improved the toggle speed of SOC (system on a chip); The supply voltage that produces when supply unit in the sheet rises to a certain degree and before the ena-bung function device, by the performance apparatus for evaluating power source performance that supply unit in the sheet produces is assessed, to promote the internal electric source performance.
The above only is preferred embodiment of the present invention, not in order to restriction the present invention, all any modifications of being done within the spirit and principles in the present invention, is equal to and replaces and improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1, a kind of SOC (system on a chip) is characterized in that, described SOC (system on a chip) comprises:
Supply unit, resetting means and functional device in the sheet;
Described interior supply unit comprises first reference voltage generating circuit and the feed regulator isolator that is used to produce first reference voltage, and described feed regulator isolator produces the required supply voltage of other device work of SOC (system on a chip) inside under the effect of described first reference voltage;
Described resetting means makes described functional device be in reset mode in default delay time, when delay time is finished, remove the reset mode and the clock signal of described functional device, described functional device is started working under the effect of supply voltage, described first reference voltage and described clock signal that described feed regulator isolator produces.
2, SOC (system on a chip) as claimed in claim 1, it is characterized in that, described interior supply unit further comprises the clock generator that is used for clocking, and described feed regulator isolator produces the required supply voltage of other device work of SOC (system on a chip) inside under the effect of the clock signal of described clock generator and described first reference voltage.
3, SOC (system on a chip) as claimed in claim 1, it is characterized in that, described functional device comprises the subfunction unit that a plurality of operating voltage are inequality, described resetting means is preset with and the corresponding delay time in a plurality of described subfunctions unit, after a delay time is finished, described resetting means is removed the reset mode and the clock signal of corresponding subfunction unit, starts working under the effect of supply voltage that described feed regulator isolator produces and described clock signal in described subfunction unit.
4, as claim 1,2 or 3 described SOC (system on a chip), it is characterized in that described resetting means comprises:
Delay circuit is used for default one or more delay times;
Reset circuit is used for to described functional device output reset signal, and stops to export reset signal when described delay circuit is finished delay time;
Clock generator is used for clocking; And
Clock shielding device, be connected with described reset circuit, be used for being shielded, and the clock signal that when described reset circuit stops to export reset signal described clock generator is produced is delivered to described functional device in the clock signal that described reset circuit produces described clock generator when described functional device is exported reset signal.
5, SOC (system on a chip) as claimed in claim 1 is characterized in that, described SOC (system on a chip) further comprises a Performance Evaluation device, and described Performance Evaluation device comprises:
The Performance Evaluation circuit, be used for the supply voltage performance of described feed regulator isolator output is assessed, do not reach the setting requirement if detect the supply voltage performance index, then send performance and adjust signal, so that described feed regulator isolator is adjusted the supply voltage of self exporting to described feed regulator isolator.
6, SOC (system on a chip) as claimed in claim 5 is characterized in that, described Performance Evaluation circuit is used to also check whether described first reference voltage satisfies the requirement of described functional device; Described Performance Evaluation device further comprises:
Second reference voltage generating circuit is used to produce second reference voltage; And
The voltage reference selector switch, be connected with described second reference voltage generating circuit with described first reference voltage generating circuit, be used for when described Performance Evaluation circuit detects described first reference voltage and can not meet the demands after system start-up, described second reference voltage of control output is to described functional device.
7, a kind of startup method of SOC (system on a chip) is characterized in that, described SOC (system on a chip) comprises supply unit, resetting means and functional device in the sheet; Described interior supply unit comprises first reference voltage generating circuit and the feed regulator isolator that is used to produce first reference voltage; Described reseting module comprises reset circuit and delay circuit;
Described startup method may further comprise the steps:
1): the feed regulator isolator in the sheet in the supply unit starts under the effect of described first reference voltage, and the while reset circuit sends the reset enable signal functional device and is in reset mode, and delay circuit is started working;
2): delay circuit is finished after the time delays that sets, and clock signal is delivered to functional device, and the disappearance of the reset signal of reset circuit, and functional device begins operate as normal.
8, startup method as claimed in claim 7 is characterized in that, the functional device of described SOC (system on a chip) comprises the subfunction unit that a plurality of operating voltage are inequality, and described delay circuit is preset with and the corresponding delay time in a plurality of described subfunctions unit; Described step 2) be specially:
After delay circuit is finished a time delays, clock signal is delivered to corresponding subfunction unit, and the disappearance of the reset signal of this subfunction unit, this subfunction unit begins operate as normal.
9, as claim 7 or 8 described startup methods, it is characterized in that described SOC (system on a chip) further comprises a Performance Evaluation device, described Performance Evaluation device comprises a Performance Evaluation circuit; In described step 2) before, described method further comprises the steps:
1a), whether the supply voltage performance of Performance Evaluation circuitry evaluates feed regulator isolator generation reaches requirement;
1b), if the supply voltage performance that feed regulator isolator produces can meet the demands, then the supply voltage of feed regulator isolator keeps original performance;
1c), if the supply voltage performance that feed regulator isolator produces cannot meet the demands, then the Performance Evaluation device sends performance to described feed regulator isolator and adjusts signal, so that described feed regulator isolator is adjusted the supply voltage of self exporting.
10, startup method as claimed in claim 9 is characterized in that, described Performance Evaluation device further comprises second reference voltage generating circuit and the voltage reference selector switch that is used to produce second reference voltage; In described step 2) before, described method further comprises the steps:
1d), can Performance Evaluation circuitry evaluates first reference voltage meet the demands;
1e), if can not meet the demands, voltage reference selector switch control output second reference voltage is to functional device.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009101077090A CN101566974B (en) | 2009-05-25 | 2009-05-25 | System on a chip and starting method thereof |
| PCT/CN2010/072346 WO2010135945A1 (en) | 2009-05-25 | 2010-04-29 | System on chip and starting method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009101077090A CN101566974B (en) | 2009-05-25 | 2009-05-25 | System on a chip and starting method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101566974A true CN101566974A (en) | 2009-10-28 |
| CN101566974B CN101566974B (en) | 2011-11-30 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2009101077090A Expired - Fee Related CN101566974B (en) | 2009-05-25 | 2009-05-25 | System on a chip and starting method thereof |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN101566974B (en) |
| WO (1) | WO2010135945A1 (en) |
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| WO2010135945A1 (en) * | 2009-05-25 | 2010-12-02 | 炬才微电子（深圳）有限公司 | System on chip and starting method thereof |
| CN102193576A (en) * | 2010-03-12 | 2011-09-21 | 上海宏力半导体制造有限公司 | Reference voltage generation circuit |
| CN102707780A (en) * | 2012-05-09 | 2012-10-03 | 中兴通讯股份有限公司 | Method for improving resetting reliability of single plate, device and single plate |
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| CN103246304A (en) * | 2012-02-06 | 2013-08-14 | 炬力集成电路设计有限公司 | In-chip reference voltage generation circuit, chip and method |
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| JP3031293B2 (en) * | 1997-06-02 | 2000-04-10 | 日本電気株式会社 | Power-on reset circuit |
| US6629291B1 (en) * | 2000-09-25 | 2003-09-30 | International Business Machines Corporation | Integrated power solution for system on chip applications |
| CN1681105A (en) * | 2004-04-05 | 2005-10-12 | 华为技术有限公司 | Method and chip for realizing chip reset |
| CN101566974B (en) * | 2009-05-25 | 2011-11-30 | 炬力集成电路设计有限公司 | System on a chip and starting method thereof |
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2009
- 2009-05-25 CN CN2009101077090A patent/CN101566974B/en not_active Expired - Fee Related
-
2010
- 2010-04-29 WO PCT/CN2010/072346 patent/WO2010135945A1/en active Application Filing
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| WO2010135945A1 (en) * | 2009-05-25 | 2010-12-02 | 炬才微电子（深圳）有限公司 | System on chip and starting method thereof |
| CN102193576B (en) * | 2010-03-12 | 2015-01-21 | 上海华虹宏力半导体制造有限公司 | Reference voltage generation circuit |
| CN102193576A (en) * | 2010-03-12 | 2011-09-21 | 上海宏力半导体制造有限公司 | Reference voltage generation circuit |
| CN103152019B (en) * | 2011-12-07 | 2016-01-27 | 上海西门子医疗器械有限公司 | A kind of reset circuit of control lever |
| CN103152019A (en) * | 2011-12-07 | 2013-06-12 | 上海西门子医疗器械有限公司 | Reset circuit of control rod |
| CN103246304A (en) * | 2012-02-06 | 2013-08-14 | 炬力集成电路设计有限公司 | In-chip reference voltage generation circuit, chip and method |
| WO2013117139A1 (en) * | 2012-02-06 | 2013-08-15 | 炬力集成电路设计有限公司 | On-chip reference voltage generation circuit, generation method and chip |
| CN103246304B (en) * | 2012-02-06 | 2016-08-24 | 炬芯（珠海）科技有限公司 | A kind of sheet internal reference voltage generative circuit, generation chip and the method for generation |
| CN102707780B (en) * | 2012-05-09 | 2014-12-10 | 中兴通讯股份有限公司 | Method for improving resetting reliability of single plate, device and single plate |
| CN102707780A (en) * | 2012-05-09 | 2012-10-03 | 中兴通讯股份有限公司 | Method for improving resetting reliability of single plate, device and single plate |
| CN103685077A (en) * | 2013-12-18 | 2014-03-26 | 上海斐讯数据通信技术有限公司 | Network data switch and method for switching network data forwarding function |
| CN103685077B (en) * | 2013-12-18 | 2017-12-19 | 上海斐讯数据通信技术有限公司 | The method of network data exchange machine and handover network data forwarding function |
| CN110489169A (en) * | 2019-08-06 | 2019-11-22 | 晶晨半导体(上海)股份有限公司 | A kind of memory quick start method of system on chip |
| CN110489169B (en) * | 2019-08-06 | 2021-10-19 | 晶晨半导体(上海)股份有限公司 | Quick starting method for memory of system on chip |
| CN113467845A (en) * | 2021-06-25 | 2021-10-01 | 厦门码灵半导体技术有限公司 | Starting method, control device, storage medium and electronic equipment of ARM chip suitable for industrial application scene |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101566974B (en) | 2011-11-30 |
| WO2010135945A1 (en) | 2010-12-02 |
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