CN1681105A - Method and chip for realizing chip reset - Google Patents
Method and chip for realizing chip reset Download PDFInfo
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- CN1681105A CN1681105A CN 200410031002 CN200410031002A CN1681105A CN 1681105 A CN1681105 A CN 1681105A CN 200410031002 CN200410031002 CN 200410031002 CN 200410031002 A CN200410031002 A CN 200410031002A CN 1681105 A CN1681105 A CN 1681105A
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Abstract
The method controls reset of chip through counting external clock and comparing the count value with a preset reset end value to generate a reset signal. The invention also discloses a chip that includes a self reset unit, for counting external clock to output self reset signal to chip, which comprises reset counter for counting external clock and comparison circuit for comparing counting value with reset ending value and generating self reset signal.
Description
Technical field
The present invention relates to chip design art, particularly relate to a kind of method and chip of realizing chip reset.
Background technology
In the application system design of Digital Signal Processing, reset processing is crucial problem.Resetting is sequential device initialization with hold mode in the circuit, thereby makes the state initialization of circuit.Carrying out Circuits System when design, each system all need one can the proper reset whole system control unit, when powering on each element circuit and chip in the system are carried out the control that resets of the overall situation in system.For chip, need also to guarantee that chip carries out resetting of the overall situation when powering on, the various piece of initialization chip internal enters a definite state to guarantee the chip internal each several part.
When Circuits System designs, the special-purpose chip that resets generally is set in system, this special use chips incorporate peripheral circuit that resets is formed reset control circuit, and this reset control circuit output Global reset control signal resets to chips all in the system.Correspondingly, when design chips, need one of the specialized designs control pin that resets, by this control pin that resets, the Global reset control signal of system can be imported chip, makes chip reset.
Fig. 1 adopts the special-purpose chip that resets to realize the schematic block diagram of the circuit that resets, as can be seen from Figure 1, reset chip 100 and intrasystem chip 110 of the special use of system is connected with 120 the control pin that resets, special use resets chip by the functional circuit 111,112,121 and 122 in the control pin input chip that resets of chip, the functional circuit of chip is resetted, thereby realize resetting of chip 110 and 120.
The chip reset of prior art is to be realized by the reseting controling signal of outside, and this method need be used the special use control chip that resets, and needs reset control circuit, and this has not only increased the design cost of system, has also increased the complexity that realizes.And, if need in the design to provide when control of independently resetting separately, then needing to increase a plurality of independently reset control circuits to a plurality of chips, design cost will further increase, and realize also complicated more.
Summary of the invention
Main purpose of the present invention is to provide a kind of method that realizes chip reset, need not the external reset circuit, at the signal that resets certainly that chip internal produces, utilizes this to realize resetting of chip from the signal that resets.
Another main purpose of the present invention is to provide a kind of chip, and this chip can produce the signal that resets certainly that control chip resets.
The objective of the invention is to be achieved through the following technical solutions:
A kind of method that realizes chip reset comprises the steps:
A, according to required clock cycle of chip reset the end value that resets is set in advance;
When B, chip power, external clock is counted;
C, judge whether the clock count value equates with the end value that resets that sets in advance, if then from resetting invalidating signal, chip reset finishes; Otherwise the signal that resets certainly is effective, and chip continues external clock is counted, and returns execution in step C.
The reset method of end value of the described setting of steps A is: the initial condition value of chip power is set earlier, and the required clock cycle of chip reset takes advantage of the long-pending result of initial condition value gained that adds of counting step value to be set to the end value that resets.
Described step B is: during chip power, count value is the initial condition value, and each clock cycle, count value added the counting step value when arriving.
The reset method of end value of the described setting of steps A is: the initial condition value of chip power is set earlier, and the initial condition value deducts the required clock cycle of chip reset and takes advantage of the result of the long-pending gained of counting step value to be set to the end value that resets.
Described step B is: during chip power, count value is the initial condition value, and each clock cycle, count value subtracted the counting step value when arriving.
Described step C further comprises: when chip reset finishes, stop external clock being counted.
This method further comprises: output to the reseting controling end of external chip or the reseting controling end of external circuit with described from the signal that resets, control resetting of external chip or external circuit.
Described effective from the signal high level that resets, low level is invalid; Perhaps, described effective from the signal low level that resets, high level is invalid.
This chip further comprises one from reset unit, be used for to external clock count, count value is compared with the end value that resets of storage in advance to be produced from the signal that resets, and this signal that resets is certainly exported to the functional circuit of chip.
Describedly comprise from reset unit:
Reset counter is used for external clock is counted, and count value is sent to comparison circuit in real time;
Comparison circuit, be used for will input the count value of reset counter compare and oneself functional circuit of signal that reset of output to chip with the end value that resets that is stored in its inside in advance.
Described reset counter is made up of the register of at least one chip internal.
Further comprise a reset signal output port that is used for the signal that resets is certainly exported to chip exterior from reset unit.
The invention provides a kind of method that realizes chip reset, this method is counted external clock, and when count value and the end value that resets that sets in advance were unequal, the signal that resets certainly was effective, chip reset; When count value equates with the end value that resets that sets in advance, the invalidating signal that resets certainly, chip reset finishes.The present invention also provides a kind of chip, this chip comprise one be used for by the count value that external clock is counted compare with the end value that resets that sets in advance produce from the signal that resets, and with this signal that resets certainly be sent to functional circuit from reset unit.And the method for existing techniques in realizing chip reset generally is to adopt special use reset chip and reset control circuit, this special use chip and reset control circuit chip output reseting controling signal to Circuits System that resets.The common chip of prior art is not supported from reset function, but is realized resetting of this chip by the reset signal of outside input.From the present invention and prior art to recently, the present invention need not special use reset chip and reset control circuit, so realize fairly simplely, and provides cost savings greatly.In addition, chip internal of the present invention can also export chip exterior to from the signal that resets, and for other chip or circuit module provide reseting controling signal, so this method can also realize the control that resets to the entire circuit system, has wide application space.
Description of drawings
Fig. 1 adopts the special-purpose chip that resets to realize the schematic block diagram of the circuit that resets.
Fig. 2 is the schematic block diagram that has from the chip of reset function.
Fig. 3 is from the method flow diagram that resets according to the realization chip of a preferred embodiment of the present invention.
Embodiment
In order to make the purpose, technical solutions and advantages of the present invention clearer, the present invention is further described below in conjunction with the drawings and specific embodiments.
The invention provides a kind of chip internal of realizing from the method that resets, need not external dedicated reset chip and reset control circuit, the signal that resets certainly that utilizes chip internal to produce is realized chip reset.In addition, the signal that resets certainly that this chip internal produces can also be exported to other chip or the circuit module of Circuits System as reseting controling signal, is used for the control that resets of other chip or circuit module.
Method of the present invention is according to the required clock cycle of chip reset the end value that resets to be set in advance, when chip power, external clock is counted, judge whether the clock count value equates with the end value that resets that sets in advance, if then from resetting invalidating signal, chip reset finishes; Otherwise the signal that resets certainly is effective, and chip continues external clock is counted, when the clock count value equates with the end value that resets that sets in advance, and the invalidating signal that resets certainly, chip reset finishes.
The present invention also provides a kind of chip, and this chip has from the function that resets.Fig. 2 is the schematic block diagram that has from the chip of reset function, as can be seen from Figure 2, has chip from reset function except comprising functional circuit 211,212 and 213, also comprises one from reset unit 200.Should comprise the N digit counter of forming by N register, be used for clock count that chip exterior is imported from reset unit 200, be also referred to as reset counter 201, this chip that resets certainly also comprises a comparison circuit 202, comparison circuit 202 is with the count value of reset counter 201 and be stored in the end value that resets in the comparison circuit 202, predefined and compare, comparison circuit 202 according to comparative result output from resetting signal, the resetting of the inner all functions circuit of control chip.Alternatively, this chip comprises that the signal that will reset certainly exports other chip of Circuits System or the reset signal output port 220 of circuit module to, is used to control resetting of other chip or circuit module.
When chip power, reset counter 201 begins the clock of outside input is increased progressively or countdown from initial value, and export count value to comparison circuit 202 in real time, when the count value of reset counter 201 and the end value that resets are unequal, certainly the signal that resets of comparison circuit 202 outputs is effective, then all functional circuits of chip internal are in reset mode, in case the end value that resets that the count value of reset counter 201 equals to set in advance, certainly the invalidating signal that resets of comparison circuit 202 outputs, the all functional circuits of chip internal finish to reset, this moment, reset counter 201 stopped counting, chip is in the disarmed state that resets, re-power after the electricity down up to chip, the count value of reset counter 201 begins chip reset after becoming initial value again.
Followingly the method for realization chip reset of the present invention is elaborated with reference to Fig. 2.In order to implement the method according to this invention, need in advance chip to be carried out following setting:
In advance N register of chip internal formed one and be used for N digit counter that the clock of chip exterior input is counted, this counter is called reset counter.
The quantity N of register determines according to the required clock periodicity that resets, and the required clock periodicity that resets was determined by the clock cycle of reset required time-delay and outside input.For example, the required time-delay that resets is 10 milliseconds, and the clock cycle of outside input is 1 millisecond, and the required clock periodicity that resets so is 10, needs 4 registers to count as can be known at least, so in this case, the value of N must be more than or equal to 4.
Pre-determine the initial condition value of reset counter when chip power, and set the end value that resets of a N position, the end value that resets is not equal to the initial condition value of reset counter.
Because form the register of reset counter default conditions are arranged when power-up initializing, so reseting register also has default conditions when power-up initializing, when design chips, require the initial condition value of reset counter when chip power to determine, can not produce at random.
The end value that resets is according to the counting step value, and required clock periodicity and the reset counter initial condition value when powering on that resets is determined.If the initial condition value of reset counter is taken advantage of the long-pending of counting step value less than the required clock periodicity that resets, the end value that then resets is that the required clock periodicity that resets is taken advantage of the long-pending initial condition value that adds reset counter of counting step value; If the initial condition value of reset counter is taken advantage of the long-pending of counting step value greater than the required clock periodicity that resets, the end value that resets can be both sums, also can be that the initial condition value of reset counter deducts the required clock periodicity that resets and takes advantage of the long-pending of counting step value.For example, the initial condition value of reset counter is 0, and the required clock periodicity that resets is 10, and the counting step value is 2, and the end value that resets so is set to 20; If the initial condition value of reset counter is 15, the required clock periodicity that resets is 10, and the counting step value is 1, and the end value that resets so can be set to 5, also can be set to 25.
When resetting end value, setting it is noted that the end value that resets can not equal the initial condition value of reset counter when chip power.
After chip has been carried out setting in advance, can implement resetting certainly of chip internal, Fig. 3 is from the flow chart that resets according to the chip internal of a preferred embodiment of the present invention, in the present embodiment, if the initial condition value of reset counter is 0, the required clock periodicity that resets is 10, and the counting step value is 2, the end value that resets is 20, and the step of this method is as follows:
Step 301: during chip power, reset counter is in the initial condition value that powers on.
Step 302: the signal that resets certainly of chip internal is set to high level, and the signal that resets certainly is effective, and chip is in reset mode, and chip carries out initialization.
Step 303: the clock of importing when the outside enters the new clock cycle, and the count value of reset counter adds counting step value 2.
Step 304: whether the count value of judging reset counter equals the end value that resets, if then forward step 305 to; Otherwise get back to step 303.
Step 305: reset counter stops counting, and the signal that resets certainly of chip internal changes low level into by high level, the invalidating signal that resets certainly, and the end that resets this moment, chip initiation finishes.
After chip reset finished, the count value of reset counter remained on the end value that resets, and powered on once more after the electricity down up to chip, and the value of reset counter is just got back to the initial condition value.
Need to prove, in the present embodiment, if the initial condition value of reset counter is 15, the required clock periodicity that resets is 10, the counting step value is 1, the end value that resets is 5, and then step 303 should be: the clock of importing when the outside enters the new clock cycle, and the count value of reset counter subtracts counting step value 1.
In addition, in the present embodiment, the signal that resets certainly is that high level is effective, and chip is in reset mode, resets effectively; From the signal that resets is that low level is invalid, and chip reset is invalid.In the application of reality, vice versa, that is to say, the signal that resets certainly is that low level is effective, and chip is in reset mode, resets effectively; From the signal that resets is that high level is invalid, and chip reset is invalid.
The described method of Fig. 3 only is the reset control of signal to this chip that resets certainly of chip internal, also can be as shown in Figure 2, the signal that resets certainly that this chip internal is produced outputs to chip exterior, as other chip in the Circuits System or the reseting controling signal of circuit module, make other circuit module or chip reset.So this method is specially adapted to the kernel control chip of system, has the chip of core controlled function when especially powering in system.
In concrete implementation process, can carry out suitable improvement, to adapt to the concrete needs of concrete condition to the method according to this invention.Therefore be appreciated that according to the specific embodiment of the present invention just to play an exemplary role, not in order to restriction protection scope of the present invention.
Claims (12)
1, a kind of method that realizes chip reset is characterized in that, comprises the steps:
A, according to required clock cycle of chip reset the end value that resets is set in advance;
When B, chip power, external clock is counted;
C, judge whether the clock count value equates with the end value that resets that sets in advance, if then from resetting invalidating signal, chip reset finishes; Otherwise the signal that resets certainly is effective, and chip continues external clock is counted, and returns execution in step C.
2, the method for realization chip reset according to claim 1, it is characterized in that, the reset method of end value of the described setting of steps A is: the initial condition value of chip power is set earlier, and the required clock cycle of chip reset takes advantage of the long-pending result of initial condition value gained that adds of counting step value to be set to the end value that resets.
3, the method for realization chip reset according to claim 2 is characterized in that, described step B is: during chip power, count value is the initial condition value, and each clock cycle, count value added the counting step value when arriving.
4, the method for realization chip reset according to claim 1, it is characterized in that, the reset method of end value of the described setting of steps A is: the initial condition value of chip power is set earlier, and the initial condition value deducts the required clock cycle of chip reset and takes advantage of the result of the long-pending gained of counting step value to be set to the end value that resets.
5, the method for realization chip reset according to claim 4 is characterized in that, described step B is: during chip power, count value is the initial condition value, and each clock cycle, count value subtracted the counting step value when arriving.
6, the method for realization chip reset according to claim 1 is characterized in that, described step C further comprises: when chip reset finishes, stop external clock being counted.
7, the method for realization chip reset according to claim 1, it is characterized in that, this method further comprises: output to the reseting controling end of external chip or the reseting controling end of external circuit with described from the signal that resets, control resetting of external chip or external circuit.
According to the method for claim 1 or 7 described realization chip resets, it is characterized in that 8, described effective from the signal high level that resets, low level is invalid; Perhaps, described effective from the signal low level that resets, high level is invalid.
9, a kind of chip, comprise at least one functional circuit, it is characterized in that, this chip further comprises one from reset unit, be used for to external clock count, count value is compared with the end value that resets of storage in advance to be produced from the signal that resets, and this signal that resets is certainly exported to the functional circuit of chip.
10, chip according to claim 9 is characterized in that, describedly comprises from reset unit:
Reset counter is used for external clock is counted, and count value is sent to comparison circuit in real time;
Comparison circuit, be used for will input the count value of reset counter compare and oneself functional circuit of signal that reset of output to chip with the end value that resets that is stored in its inside in advance.
11, chip according to claim 10 is characterized in that, described reset counter is made up of the register of at least one chip internal.
12, chip according to claim 9 is characterized in that, further comprises a reset signal output port that is used for the signal that resets is certainly exported to chip exterior from reset unit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200410031002 CN1681105A (en) | 2004-04-05 | 2004-04-05 | Method and chip for realizing chip reset |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200410031002 CN1681105A (en) | 2004-04-05 | 2004-04-05 | Method and chip for realizing chip reset |
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| CN1681105A true CN1681105A (en) | 2005-10-12 |
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| CN 200410031002 Pending CN1681105A (en) | 2004-04-05 | 2004-04-05 | Method and chip for realizing chip reset |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100464192C (en) * | 2005-12-20 | 2009-02-25 | 海信集团有限公司 | Method for detecting resetting chip for air conditioner |
| WO2010135945A1 (en) * | 2009-05-25 | 2010-12-02 | 炬才微电子（深圳）有限公司 | System on chip and starting method thereof |
| CN101471054B (en) * | 2007-12-27 | 2012-07-04 | 东部高科股份有限公司 | LCD driver IC and method for operating the same |
| CN102835029A (en) * | 2010-03-31 | 2012-12-19 | 高通股份有限公司 | System and method to control a power on reset signal |
-
2004
- 2004-04-05 CN CN 200410031002 patent/CN1681105A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100464192C (en) * | 2005-12-20 | 2009-02-25 | 海信集团有限公司 | Method for detecting resetting chip for air conditioner |
| CN101471054B (en) * | 2007-12-27 | 2012-07-04 | 东部高科股份有限公司 | LCD driver IC and method for operating the same |
| WO2010135945A1 (en) * | 2009-05-25 | 2010-12-02 | 炬才微电子（深圳）有限公司 | System on chip and starting method thereof |
| CN102835029A (en) * | 2010-03-31 | 2012-12-19 | 高通股份有限公司 | System and method to control a power on reset signal |
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