CN107546207A - A kind of GaN base electronic device and preparation method thereof - Google Patents
A kind of GaN base electronic device and preparation method thereof Download PDFInfo
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- CN107546207A CN107546207A CN201610497031.1A CN201610497031A CN107546207A CN 107546207 A CN107546207 A CN 107546207A CN 201610497031 A CN201610497031 A CN 201610497031A CN 107546207 A CN107546207 A CN 107546207A
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Abstract
The invention discloses a kind of GaN base electronic device and preparation method thereof, is followed successively by from top to bottom in the GaN base electronic device：Substrate layer, cushion, template layer, channel layer, barrier layer, grid leak source metal level, bonding layer and the packaging body for encasing electronic components.It is directly connected between metal pad in GaN base electronic device chips provided by the invention and packaging body by the good metal of thermal diffusivity (bonding layer), thermal diffusivity is more preferable；Device active region is mainly close to upper surface simultaneously, so, chip upper surface and packaging body, which are joined directly together, allows heat caused by chip operation quickly to be transmitted, so as to substantially increase the heat dispersion of electronic device, while substantially increase operating efficiency, stability, reliability and the life-span of electronic device.
Description
Technical field
The present invention relates to electronic device manufacturing field, and in particular to a kind of GaN base electronic device and preparation method thereof.
Background technology
Gallium nitride (GaN) has larger direct band gap (3.4ev), high heat conductance, high electronics saturation drift velocity
The features such as, therefore have become the study hotspot of current technical field of semiconductors.The semiconductor devices made using this feature, such as
HEMT (HEMT) has the characteristics that breakdown electric field is big, current density is high, electronics saturation drift velocity is fast, non-
It is very suitable for making high temperature, high frequency, high pressure and powerful device, can be used for frequency microwave field and field of power electronics,
Such as the field such as the information transmit-receive such as radio communication base station, power electronic devices, energy conversion.
GaN base electronic device is often operated in the case of high pressure, high current, so the temperature of ordinary circumstance chip can be very
Height, and the characteristic of the semiconductor devices to be worked under hot conditions can be deteriorated, the life-span can shorten.So good radiating is for chip
High reliability, high stability and high efficiency are extremely important.
The encapsulation of existing GaN base electronic device is general first to connect chip electrode and substrate by lead, then by substrate and encapsulation
Body connects.Encapsulation volume is big, easily goes offline, and is not easy to radiate.
The content of the invention
For above-mentioned technical problem present in prior art, the invention provides a kind of GaN base electronic device and its system
Preparation Method, existing GaN base dissipation from electronic devices difference is solve thed problems, such as, while improve the reliable of GaN base electronic device
Property, stability.
The present invention's is achieved through the following technical solutions：
A kind of GaN base electronic device, the GaN base electronic device are followed successively by from top to bottom：Substrate layer, cushion, template layer,
Channel layer, barrier layer, grid leak source metal level, bonding layer and the packaging body for encasing electronic components.
It is further preferred that the substrate layer is one kind in Sapphire Substrate, Si substrates and SiC substrate.
It is further preferred that the cushion is a kind of or more in AlN, GaN, AlGaN, AlInN and AlInGaN
Kind combination.
It is further preferred that the cushion is sandwich construction or single layer structure.
It is further preferred that the template layer is that one in GaN, C doping GaN and AlGaN is adulterated undoped with GaN, Fe
Kind or multiple combinations.
It is further preferred that the barrier layer is one or more kinds of groups in AlN, AlGaN, AlInN and AlInGaN
Close.
It is further preferred that the bonding layer is Sn or Au-Sn alloys.
It is further preferred that the packaging body includes metal pad and encapsulated member, the encapsulated member passes through the metal welding
Disk welds with the bonding layer.
Present invention also offers a kind of GaN base electronic device preparation method, the preparation method is applied to above-mentioned GaN base electronics
Device, including：
A1 grown buffer layer, template layer, channel layer and barrier layer successively from top to bottom on substrate layer, obtain GaN base
The epitaxial structure of electronic device；
A2 prepares grid leak source metal level on the barrier layer, obtains chip；
A3 prepares bonding layer in grid leak source layer on surface of metal；
The chip formed in step A2 is welded on the gold in packaging body by A4 by the way of eutectic by the bonding layer
Belong on pad, the encapsulated member reused in the packaging body is encapsulated to it.
The beneficial effects of the invention are as follows：
For the present invention compared with traditional die and encapsulation technology, the metal pad in chip and packaging body directly passes through metal level
(bonding layer) is linked together in a manner of eutectic, it is not necessary to using wire and substrate, so as to substantially reduce GaN base electronics device
The volume and weight of part, the packing density and cost performance of electronic device are improved, reduces manufacturing cost, will not be drawn because of wire dropping
Play the reliability of device.
Further, using method for packing provided by the invention, because it is without using wire, so internal chip and packaging body
Interconnection length between wiring is short a lot, thus parasitic parameter is small, and signal transmission delay time is short, substantially improves the height of circuit
Frequency performance.
In addition, pass through radiating between metal pad in GaN base electronic device chips provided by the invention and packaging body
The good metal (bonding layer) of property is directly connected to, and thermal diffusivity is more preferable；Device active region is mainly close to upper surface, so, chip simultaneously
Upper surface and packaging body, which are joined directly together, allows heat caused by chip operation quickly to be transmitted, so as to substantially increase electricity
The heat dispersion of sub- device, while substantially increase operating efficiency, stability, reliability and the life-span of electronic device.
Brief description of the drawings
GaN base electronic device structure schematic diagram in Fig. 1 present invention；
Marked in figure：1- substrate layers, 2- epitaxial structures, 3- grid leak source metals, 4- bonding layers, 5- metal pads, 6-
Encapsulated member；
Epitaxial structure schematic diagram in Fig. 2 present invention；
Marked in figure：21- cushions, 22- template layers, 23- channel layers, 24- barrier layers；
Fig. 3 is GAN base electron device structural representations in a specific embodiment in the present invention；
Marked in figure：11- Sapphire Substrate layers, 12- gallium nitride low temperature buffer layers, 13- undoped with high-temperature ammonolysis gallium layer,
The semi-insulating gallium nitride layer of 14- carbon dopings, 15- undoped gallium nitride channel layers, 16- aluminum gallium nitride barrier layers, 17- grid leaks source metal
Layer, 18- bonding layers, 19- metal pads.
Embodiment
In order to further illustrate the present invention, embodiments of the invention are described in detail below in conjunction with accompanying drawing, provided
Some embodiments.But content involved in the present invention is not limited only to these embodiments.It is all disclosed in this specification
Feature, or disclosed all methods or during the step of, can be with addition to mutually exclusive feature and/or step
Any mode combines.
Any feature disclosed in this specification (including any accessory claim, summary and accompanying drawing), except non-specifically chatting
State, can alternative features equivalent by other or with similar purpose replaced.Unless specifically stated otherwise, each feature is one
An example in serial equivalent or similar characteristics.
It is as shown in Figure 1 GaN base electronic device structure schematic diagram provided by the invention, it can be seen that the GaN base
Electronic device includes successively from top to bottom：Substrate layer 1, epitaxial structure 2 (such as Fig. 2, the epitaxial structure include cushion 21,
Template layer 22, channel layer 23 and barrier layer 24), grid leak source metal level 3, bonding layer 4 and the envelope for encasing electronic components
Dress body (as figure includes metal pad 5 and encapsulated member 6).
In a specific embodiment, as shown in figure 3, packaged electronic device structure includes Sapphire Substrate layer 11,
And sequentially grown on Sapphire Substrate layer 11 gallium nitride low temperature buffer layer 12, undoped with high-temperature ammonolysis gallium layer 13, carbon
Semi-insulating gallium nitride layer 14, undoped gallium nitride channel layer 15 and the aluminum gallium nitride barrier layer 16 of doping.Afterwards, in epitaxial structure
It is upper to prepare source-drain electrode Ohmic contact using Ti-Al-Ni-Au alloys, prepare gate electrode using Ni-Au alloys, obtain grid leak source
Metal level 17.Then, bonding layer 18 is prepared on grid leak source metal level 17 using Au-Sn alloys, and nation is passed through using eutectic machine
Given layer is combined together the metal pad 19 in chip and packaging body.
More particularly, in this embodiment：
First, using MOCVD methods, GaN cushions, iron are grown successively from bottom to top in (0001) surface sapphire substrate
Or carbon doping semi-insulating gallium nitride layer, undoped with GaN channel layers and AlGaN potential barrier, wherein, using high-purity N2It is or high
Pure H2Or high-purity H2And high-purity N2Mixed gas as carrier gas, high-purity N H3As N sources, metal organic source trimethyl gallium (TMGa)
As gallium source, trimethyl indium (TMIn) is used as indium source, and trimethyl aluminium (TMAl) is used as silicon source, and n-type dopant is silane (SiH4),
P-type dopant is two luxuriant magnesium (Cp2) and ferrocene (Cp Mg2Fe), substrate is (0001) surface sapphire.
Afterwards, active area is prepared using ICP or RIE dry etchings, source-drain electrode is prepared using Ti-Al-Ni-Au alloys
Ohmic contact；Then growth SiN media protections surface reduces the current collapse on surface, then prepares grid electricity using Ni-Au alloys
Pole, obtain grid leak source metal level.
Afterwards, one layer of Sn or Au-Sn alloy-layer then is deposited on the metal level of grid leak source and is used for bonding；
Finally, on metal pad chip being welded in packaging body by bonding layer by the way of the eutectic, and use
Encapsulated member in the packaging body is encapsulated to it.
In the present embodiment, the pottery of chip and high-cooling property is directly connected to by using Sn or Au-Sn metal materials
Porcelain bottom plate reduces thermal resistance so that heat conduction is more preferable, so as to improve the efficiency of device.Solves device for high-power power electronic with this
Heat dissipation problem, the power-type electronic device that light extraction efficiency is high, stability is good is obtained with this.
In another specific embodiment：
First, using MOCVD methods, in Si substrates either growing AIN or AlGaN successively from bottom to top in SiC substrate
The semi-insulating gallium nitride layer of sandwich construction cushion, iron or carbon doping, undoped with GaN channel layers and AlGaN potential barrier, its
In, using high-purity N2Or high-purity H2Or high-purity H2And high-purity N2Mixed gas as carrier gas, high-purity N H3It is organic as N sources, metal
Source trimethyl gallium (TMGa) is used as gallium source, and trimethyl indium (TMIn) is used as indium source, and trimethyl aluminium (TMAl) is used as silicon source, and n-type is mixed
Miscellaneous dose is silane (SiH4), p-type dopant is two luxuriant magnesium (Cp2) and ferrocene (Cp Mg2Fe), substrate is (0001) surface sapphire.
Afterwards, active area is prepared using ICP or RIE dry etchings, source-drain electrode is prepared using Ti-Al-Ni-Au alloys
Ohmic contact；Then growth SiN media protections surface reduces the current collapse on surface, then prepares grid electricity using Ni-Au alloys
Pole, obtain grid leak source metal level.
Afterwards, one layer of Sn or Au-Sn alloy-layer then is deposited on the metal level of grid leak source and is used for bonding；
Finally, on metal pad chip being welded in packaging body by bonding layer by the way of the eutectic, and use
Encapsulated member in the packaging body is encapsulated to it.
In another specific embodiment：
First, using MOCVD methods, GaN cushions, iron are grown successively from bottom to top in (0001) surface sapphire substrate
Or carbon doping semi-insulating gallium nitride layer, undoped with GaN channel layers and AlGaN potential barrier, wherein, using high-purity N2It is or high
Pure H2Or high-purity H2And high-purity N2Mixed gas as carrier gas, high-purity N H3As N sources, metal organic source trimethyl gallium (TMGa)
As gallium source, trimethyl indium (TMIn) is used as indium source, and trimethyl aluminium (TMAl) is used as silicon source, and n-type dopant is silane (SiH4),
P-type dopant is two luxuriant magnesium (Cp2) and ferrocene (Cp Mg2Fe), substrate is (0001) surface sapphire.
Afterwards, active area is prepared using ICP or RIE dry etchings, source-drain electrode is prepared using Ti-Al-Ni-Au alloys
Ohmic contact；Then growth SiN media protections surface reduces the current collapse on surface, then prepares grid electricity using Ni-Au alloys
Pole, obtain grid leak source metal level.
Afterwards, one layer of Sn or Au-Sn alloy-layer then is deposited on the metal level of grid leak source and is used for bonding；
Finally, soldered ball, salient point or the bonding jumper being welded on chip by bonding layer by the way of eutectic in packaging body
On (metal pad), and it is encapsulated using the encapsulated member in the packaging body.
In another specific embodiment：
First, using MOCVD methods, GaN cushions, iron are grown successively from bottom to top in (0001) surface sapphire substrate
Or carbon doping semi-insulating gallium nitride layer, undoped with GaN channel layers and AlGaN potential barrier, wherein, using high-purity N2It is or high
Pure H2Or high-purity H2And high-purity N2Mixed gas as carrier gas, high-purity N H3As N sources, metal organic source trimethyl gallium (TMGa)
As gallium source, trimethyl indium (TMIn) is used as indium source, and trimethyl aluminium (TMAl) is used as silicon source, and n-type dopant is silane (SiH4),
P-type dopant is two luxuriant magnesium (Cp2) and ferrocene (Cp Mg2Fe), substrate is (0001) surface sapphire.
Afterwards, active area is prepared using ICP or RIE dry etchings, source-drain electrode is prepared using Ti-Al-Ni-Au alloys
Ohmic contact；Then growth SiN media protections surface reduces the current collapse on surface, then prepares grid electricity using Ni-Au alloys
Pole, obtain grid leak source metal level.
Afterwards, one layer of Sn or Au-Sn alloy-layer then is deposited on the metal level of grid leak source and is used for bonding；
Finally, on metal pad chip being welded in packaging body by bonding layer by the way of the eutectic, and use
Pcb board in the packaging body is encapsulated to it.
Above-described embodiment only listing property illustrates the technological thought and feature of the present invention, is not intended to limit the invention, for
For those skilled in the art, the present invention can have various changes and change.Therefore it is all according to disclosed spiritual institute
The equal change or modification made, should cover in protection scope of the present invention.
The invention is not limited in foregoing【Embodiment】.The present invention expands to any to be disclosed in this manual
New feature or any new combination, and disclose any new method or process the step of or any new combination.
Claims (9)
1. a kind of GaN base electronic device, it is characterised in that the GaN base electronic device is followed successively by from top to bottom：Substrate layer, delay
Rush layer, template layer, channel layer, barrier layer, grid leak source metal level, bonding layer and the packaging body for encasing electronic components.
2. GaN base electronic device as claimed in claim 1, it is characterised in that the substrate layer is Sapphire Substrate, Si substrates
And one kind in SiC substrate.
3. GaN base electronic device as claimed in claim 1, it is characterised in that the cushion be AlN, GaN, AlGaN,
One or more kinds of combinations in AlInN and AlInGaN.
4. GaN base electronic device as claimed in claim 3, it is characterised in that the cushion is sandwich construction or individual layer knot
Structure.
5. GaN base electronic device as claimed in claim 1, it is characterised in that the template layer is to be adulterated undoped with GaN, Fe
One or more kinds of combinations in GaN, C doping GaN and AlGaN.
6. GaN base electronic device as claimed in claim 1, it is characterised in that the barrier layer be AlN, AlGaN, AlInN with
And one or more kinds of combinations in AlInGaN.
7. GaN base electronic device as claimed in claim 1, it is characterised in that the bonding layer is Sn or Au-Sn alloys.
8. GaN base electronic device as claimed in claim 1, it is characterised in that the packaging body includes metal pad and encapsulating
Body, the encapsulated member are welded by the metal pad and the bonding layer.
9. a kind of GaN base electronic device preparation method, it is characterised in that the preparation method is applied to claim 1-8 such as and appointed
GaN base electronic device described in meaning one, the preparation method include：
A1 grown buffer layer, template layer, channel layer and barrier layer successively from top to bottom on substrate layer, obtain GaN base electronics
The epitaxial structure of device；
A2 prepares grid leak source metal level on the barrier layer, obtains chip；
A3 prepares bonding layer in grid leak source layer on surface of metal；
The chip formed in step A2 is welded on the metal welding in packaging body by A4 by the way of eutectic by the bonding layer
On disk, the encapsulated member reused in the packaging body is encapsulated to it.
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| CN201610497031.1A CN107546207A (en) | 2016-06-29 | 2016-06-29 | A kind of GaN base electronic device and preparation method thereof |
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| CN201610497031.1A CN107546207A (en) | 2016-06-29 | 2016-06-29 | A kind of GaN base electronic device and preparation method thereof |
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| CN102403348A (en) * | 2010-09-14 | 2012-04-04 | 三星Led株式会社 | Gallium nitride based semiconductor devices and methods of manufacturing the same |
| CN102629624A (en) * | 2012-04-29 | 2012-08-08 | 西安电子科技大学 | Metal-insulator-semiconductor (MIS) grid enhanced high electron mobility transistor (HEMT) device based on gallium nitride (GaN) and manufacture method of MIS grid enhanced HEMT device |
| CN104752162A (en) * | 2013-12-31 | 2015-07-01 | 江西省昌大光电科技有限公司 | Semi-insulated GaN film and preparation method thereof |
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2016
- 2016-06-29 CN CN201610497031.1A patent/CN107546207A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1757119A (en) * | 2003-01-02 | 2006-04-05 | 美商克立股份有限公司 | Group III nitride based flip-chip integrated circuit and method for fabricating |
| CN201887035U (en) * | 2010-07-22 | 2011-06-29 | 西安能讯微电子有限公司 | Encapsulation structure for semiconductor chip |
| CN102403348A (en) * | 2010-09-14 | 2012-04-04 | 三星Led株式会社 | Gallium nitride based semiconductor devices and methods of manufacturing the same |
| CN102629624A (en) * | 2012-04-29 | 2012-08-08 | 西安电子科技大学 | Metal-insulator-semiconductor (MIS) grid enhanced high electron mobility transistor (HEMT) device based on gallium nitride (GaN) and manufacture method of MIS grid enhanced HEMT device |
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Application publication date: 20180105 |