CN107527824B - 具有散热片的封装载板及其制备方法 - Google Patents
具有散热片的封装载板及其制备方法 Download PDFInfo
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- CN107527824B CN107527824B CN201610450816.3A CN201610450816A CN107527824B CN 107527824 B CN107527824 B CN 107527824B CN 201610450816 A CN201610450816 A CN 201610450816A CN 107527824 B CN107527824 B CN 107527824B
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- layer
- conductive circuit
- insulating layer
- conductive
- circuit layer
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- 238000002360 preparation method Methods 0.000 title claims description 21
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 62
- 239000011889 copper foil Substances 0.000 claims abstract description 62
- 238000001816 cooling Methods 0.000 claims abstract description 52
- 229920002120 photoresistant polymer Polymers 0.000 claims description 64
- 239000002184 metal Substances 0.000 claims description 48
- 229910052751 metal Inorganic materials 0.000 claims description 48
- 239000000758 substrate Substances 0.000 claims description 16
- 239000000543 intermediate Substances 0.000 claims description 15
- 238000009413 insulation Methods 0.000 claims description 8
- 230000001681 protective effect Effects 0.000 claims description 7
- 238000009434 installation Methods 0.000 claims description 5
- 238000003475 lamination Methods 0.000 claims description 5
- 238000007747 plating Methods 0.000 claims description 4
- 239000003822 epoxy resin Substances 0.000 claims description 3
- 239000000463 material Substances 0.000 claims description 3
- 229920000647 polyepoxide Polymers 0.000 claims description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 2
- 239000010931 gold Substances 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- 239000000126 substance Substances 0.000 claims description 2
- 239000011469 building brick Substances 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 443
- 241000208340 Araliaceae Species 0.000 description 12
- 235000005035 Panax pseudoginseng ssp. pseudoginseng Nutrition 0.000 description 12
- 235000003140 Panax quinquefolius Nutrition 0.000 description 12
- 235000008434 ginseng Nutrition 0.000 description 12
- 239000004020 conductor Substances 0.000 description 6
- 238000000034 method Methods 0.000 description 5
- 238000003466 welding Methods 0.000 description 5
- 239000012790 adhesive layer Substances 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- GQWNECFJGBQMBO-UHFFFAOYSA-N Molindone hydrochloride Chemical compound Cl.O=C1C=2C(CC)=C(C)NC=2CCC1CN1CCOCC1 GQWNECFJGBQMBO-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- JEIPFZHSYJVQDO-UHFFFAOYSA-N iron(III) oxide Inorganic materials O=[Fe]O[Fe]=O JEIPFZHSYJVQDO-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3672—Foil-like cooling fins or heat sinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5226—Via connections in a multilevel interconnection structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/27—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/568—Temporary substrate used as encapsulation process aid
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/19—Manufacturing methods of high density interconnect preforms
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73267—Layer and HDI connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92244—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Structure Of Printed Boards (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
Claims (11)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610450816.3A CN107527824B (zh) | 2016-06-21 | 2016-06-21 | 具有散热片的封装载板及其制备方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610450816.3A CN107527824B (zh) | 2016-06-21 | 2016-06-21 | 具有散热片的封装载板及其制备方法 |
Publications (2)
Publication Number | Publication Date |
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CN107527824A CN107527824A (zh) | 2017-12-29 |
CN107527824B true CN107527824B (zh) | 2019-11-12 |
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CN201610450816.3A Active CN107527824B (zh) | 2016-06-21 | 2016-06-21 | 具有散热片的封装载板及其制备方法 |
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CN (1) | CN107527824B (zh) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN201247772Y (zh) * | 2008-07-11 | 2009-05-27 | 欣兴电子股份有限公司 | 线路板 |
CN102214626A (zh) * | 2010-12-17 | 2011-10-12 | 日月光半导体制造股份有限公司 | 内埋式半导体封装件及其制作方法 |
CN102376675A (zh) * | 2010-08-04 | 2012-03-14 | 欣兴电子股份有限公司 | 嵌埋有半导体元件的封装结构及其制法 |
CN103779290A (zh) * | 2012-10-26 | 2014-05-07 | 宏启胜精密电子(秦皇岛)有限公司 | 连接基板及层叠封装结构 |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5406389B2 (ja) * | 2012-03-01 | 2014-02-05 | 株式会社フジクラ | 部品内蔵基板及びその製造方法 |
KR101497230B1 (ko) * | 2013-08-20 | 2015-02-27 | 삼성전기주식회사 | 전자부품 내장기판 및 전자부품 내장기판 제조방법 |
-
2016
- 2016-06-21 CN CN201610450816.3A patent/CN107527824B/zh active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN201247772Y (zh) * | 2008-07-11 | 2009-05-27 | 欣兴电子股份有限公司 | 线路板 |
CN102376675A (zh) * | 2010-08-04 | 2012-03-14 | 欣兴电子股份有限公司 | 嵌埋有半导体元件的封装结构及其制法 |
CN102214626A (zh) * | 2010-12-17 | 2011-10-12 | 日月光半导体制造股份有限公司 | 内埋式半导体封装件及其制作方法 |
CN103779290A (zh) * | 2012-10-26 | 2014-05-07 | 宏启胜精密电子(秦皇岛)有限公司 | 连接基板及层叠封装结构 |
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Publication number | Publication date |
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CN107527824A (zh) | 2017-12-29 |
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Effective date of registration: 20220720 Address after: 066004 No. 18-2, Tengfei Road, Qinhuangdao Economic and Technological Development Zone, Hebei Province Patentee after: Liding semiconductor technology Qinhuangdao Co.,Ltd. Patentee after: Qi Ding Technology Qinhuangdao Co.,Ltd. Patentee after: Zhen Ding Technology Co.,Ltd. Address before: No.18, Tengfei Road, Qinhuangdao Economic and Technological Development Zone, Hebei Province 066004 Patentee before: Qi Ding Technology Qinhuangdao Co.,Ltd. Patentee before: Zhen Ding Technology Co.,Ltd. |
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Effective date of registration: 20240205 Address after: 18-2 Tengfei Road, Economic and Technological Development Zone, Qinhuangdao City, Hebei Province Patentee after: Liding semiconductor technology Qinhuangdao Co.,Ltd. Country or region after: China Patentee after: Zhen Ding Technology Co.,Ltd. Country or region after: Taiwan, China Address before: 066004 No. 18-2, Tengfei Road, Qinhuangdao Economic and Technological Development Zone, Hebei Province Patentee before: Liding semiconductor technology Qinhuangdao Co.,Ltd. Country or region before: China Patentee before: Qi Ding Technology Qinhuangdao Co.,Ltd. Patentee before: Zhen Ding Technology Co.,Ltd. Country or region before: Taiwan, China |