CN107425054A - A kind of terminal structure of power semiconductor - Google Patents
A kind of terminal structure of power semiconductor Download PDFInfo
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- CN107425054A CN107425054A CN201710665466.7A CN201710665466A CN107425054A CN 107425054 A CN107425054 A CN 107425054A CN 201710665466 A CN201710665466 A CN 201710665466A CN 107425054 A CN107425054 A CN 107425054A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 154
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 20
- 229910052760 oxygen Inorganic materials 0.000 claims description 20
- 239000001301 oxygen Substances 0.000 claims description 20
- 238000001465 metallisation Methods 0.000 claims description 13
- 239000002184 metal Substances 0.000 claims description 12
- 239000000758 substrate Substances 0.000 claims description 6
- 230000005684 electric field Effects 0.000 abstract description 14
- 238000000034 method Methods 0.000 abstract description 10
- 230000008569 process Effects 0.000 abstract description 5
- 238000009826 distribution Methods 0.000 abstract description 4
- 230000015556 catabolic process Effects 0.000 description 12
- 238000009792 diffusion process Methods 0.000 description 9
- 239000012535 impurity Substances 0.000 description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 238000004140 cleaning Methods 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 239000011248 coating agent Substances 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- 238000003384 imaging method Methods 0.000 description 4
- 230000004913 activation Effects 0.000 description 3
- 239000004020 conductor Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000003292 glue Substances 0.000 description 3
- 238000005452 bending Methods 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 230000004907 flux Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- PEDCQBHIVMGVHV-UHFFFAOYSA-N Glycerine Chemical compound OCC(O)CO PEDCQBHIVMGVHV-UHFFFAOYSA-N 0.000 description 1
- 239000012190 activator Substances 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 150000008040 ionic compounds Chemical class 0.000 description 1
- 210000003127 knee Anatomy 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000035755 proliferation Effects 0.000 description 1
- 238000011946 reduction process Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
- H01L29/0623—Buried supplementary region, e.g. buried guard ring
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
- H01L29/404—Multiple field plate structures
Abstract
The invention belongs to semiconductor power device preparing technical field, the field limiting ring terminal structure of more particularly to a kind of power semiconductor.The present invention additionally introduces in traditional field limiting ring position is lightly doped buried regions, and relative to traditional field limiting ring structure, the present invention can mutually be exhausted using buried regions with epitaxial layer, changes the Electric Field Distribution in epitaxial layer, and the electric field for alleviating curved surface knot opening position is concentrated, and reduces terminal area；Relative to conventional buried structure, the present invention uses multiple buried regions being connected with equal potential belt or field limiting ring, increases buried regions quantity, reduces single buried regions length, reduce the susceptibility to process deviation.
Description
Technical field
The invention belongs to semiconductor power device preparing technical field, the field limit of more particularly to a kind of power semiconductor
Ring terminal structure and preparation method thereof.
Background technology
When in physical plane, technique manufactures PN junction, because impurity not only internally makees longitudinal diffusion, while also edge from surface
Horizontal direction makees horizontal proliferation, so forming a cylinder knot in diffusion window edge, and expands at rectangle diffusion window corner
Dissipate and form sphere knot.Influence of the junction bending to PN junction breakdown characteristics is very big, under certain voltage, with the electricity of distance change
Field intensity is more concentrated in junction knee, can be issued to the critical breakdown electric field of breakdown in relatively low backward voltage herein,
PN junction is punctured in advance than preferable planar junction, reduce breakdown voltage.In addition, PN junction is in semiconductor surface, there is also bending
Phenomenon, simultaneously because semiconductor flies the influence of desirable factors with oxide interface and oxide layer, generally cause semiconductor surface
Maximum field is more than internal maximum field, causes device to occur puncturing in advance.
Field limiting ring is compatible with traditional cmos process, and technique is simple, can be diffuseed to form simultaneously with main knot, influence factor that its is pressure-resistant
Including：Main knot and the spacing of field limiting ring, junction depth, spacing between field limiting ring and field limiting ring, ring width, the number of ring, field plate length and
Oxidated layer thickness etc..Typically, higher breakdown voltage can be obtained by reaching critical electric field simultaneously for main knot and field limiting ring intensity.Breakdown potential
Pressure can increase with the increase of field limiting ring number, but non-linear increase, reduce with the increase breakdown voltage increasing degree of ring,
Chip occupying area is larger.
The Chinese patent " a kind of RESURF terminal structures of power semiconductor " of Application No. 201710495643.1
A kind of buried regions terminal is proposed, RESURF layers and the first conduction type above it are lightly doped by the second conductive type semiconductor
Semiconductor lightly doped district mutually exhausts, and forms space-charge region, changes the distribution of semiconductor surface electric field, makes the pressure-resistant of terminal
The breakdown voltage of parallel plane knot can be reached as far as possible, effectively reduce terminal area.But the terminal structure will obtain well
Effect, it is necessary to which the quantity of electric charge of RESURF layers and the quantity of electric charge of the first conductive type semiconductor lightly doped district above it are accurate
Matching, thus easily influenceed by technological fluctuation, particularly when the breakdown voltage for requiring terminal is very high, the length of buried regions is longer,
It is more easy to impacted.
The content of the invention
The present invention for resistance to pressure request it is higher when, field limiting ring structure area utilization is not high and buried regions end process tolerance
Less problem, there is provided a kind of terminal structure of power semiconductor, improve field limiting ring Electric Field Distribution, reduce terminal area,
Improve process allowance.
The technical solution adopted in the present invention：A kind of terminal structure of power semiconductor, as shown in figure 1, including from
Under the supreme metallization negative electrode 1 being cascading, the first conductive type semiconductor substrate 2, the first conductive type semiconductor it is light
Doped epitaxial layer 3 and field oxygen layer 8；The upper strata side of first conductive type semiconductor lightly doped epitaxial layer 3 has the second conduction
The main knot 4 of type semiconductor, opposite side have the first conduction type cut-off ring 7, the main knot 4 of the second conductive type semiconductor
Portion of upper surface has metallization anode 9, and the metallization anode 9 is cut along the upper table of field oxygen layer 8 towards close to the first conduction type
The only side extension of ring 7, the upper surface of the first conduction type cut-off ring 7 and the main knot 4 of the conductive type semiconductor of part second
Upper surface contacted with field oxygen layer 8；In the main knot 4 of second conductive type semiconductor close to the first conduction type cut-off ring 7
Side has the second conductive type semiconductor equal potential belt 5, upper surface and the field oxygen layer 8 of the second conductive type semiconductor equal potential belt 5
Contact；Have second to lead close to the side of the first conduction type cut-off ring 7 in the second conductive type semiconductor equal potential belt 5
Electric type semiconductor equal potential belt buried regions 51, the lower surface junction depth of the second conductive type semiconductor equal potential belt buried regions 51 and
The lower surface junction depth of two conductive type semiconductor equal potential belts 5 is identical, the upper table of the second conductive type semiconductor equal potential belt buried regions 51
Face junction depth is more than the upper surface junction depth of the second conductive type semiconductor equal potential belt 5；In the second conductive type semiconductor equipotential
In the first conductive type semiconductor lightly doped epitaxial layer 3 between the conduction type of ring 5 and first cut-off ring 7, there is at least two
Mutually isostructural second conductive type semiconductor field limiting ring, and each second conductive type semiconductor field limiting ring is close to first
The side of conduction type cut-off ring 7 side has the second conductive type semiconductor field limiting ring buried regions, the second conductive type semiconductor
The upper surface of field limiting ring contacts with field oxygen layer 8, the lower surface junction depth of the second conductive type semiconductor field limiting ring buried regions and
The lower surface junction depth of two conductive type semiconductor field limiting rings is identical, the upper surface of the second conductive type semiconductor field limiting ring buried regions
Junction depth is more than the upper surface junction depth of the second conductive type semiconductor field limiting ring.
Further, the upper surface of the field oxygen layer 8 has multiple field plates, and field plate is located at the second conduction type respectively successively
The conductive type semiconductor equal potential belt buried regions 51 of semiconductor equal potential belt 5 and second and each second conductive type semiconductor field limit
The top of ring and the second conductive type semiconductor field limiting ring buried regions；In field plate and the upper surface of field oxygen layer 8 covered with dielectric layer 10,
Corresponding metallization anode 9 extends along the upper table of dielectric layer 10 towards close to the side of the first conduction type cut-off ring 7.
Further, the doping concentration of the second conductive type semiconductor equal potential belt buried regions 51 meets：In the terminal
When structure is reversely pressure-resistant, the second conductive type semiconductor equal potential belt buried regions 51 and the first conduction type directly over it are light
Doped epitaxial layer 3 is mutually exhausted can realize.
Further, the doping concentration of the second conductive type semiconductor field limiting ring buried regions meets：In the terminal knot
When structure is reversely pressure-resistant, the second conductive type semiconductor field limiting ring buried regions is lightly doped with the first conduction type directly over it
Epitaxial layer 3 is mutually exhausted can realize.
Further, first conductive type semiconductor is n-type semiconductor, and second conductive type semiconductor is p
Type semiconductor；Or first conductive type semiconductor is P-type semiconductor, second conductive type semiconductor is n-type half
Conductor.
Further, also there is Metal field plate 12 above the field plate 11, the Metal field plate 12 by contact hole with
Second conductive type semiconductor equal potential belt 5 and the second conductive type semiconductor field limiting ring are connected, and the Metal field plate 12 is also logical
Contact hole is crossed with field plate 11 to be connected.
Beneficial effects of the present invention are：Relative to traditional field limiting ring structure, the present invention can utilize buried regions and epitaxial layer phase
Mutually exhaust, change the Electric Field Distribution in epitaxial layer, the electric field for alleviating curved surface knot opening position is concentrated, and reduces terminal area；Relative to
Conventional buried structure, the present invention use multiple buried regions being connected with equal potential belt or field limiting ring, increase buried regions quantity, reduce single
Buried regions length, reduce the susceptibility to process deviation.
Brief description of the drawings
Fig. 1 is the terminal structure of the power semiconductor of embodiments of the invention one
Fig. 2 is the terminal structure of the power semiconductor of embodiments of the invention two
Fig. 3-Figure 11 is the terminal manufacturing approach craft schematic flow sheet of the power semiconductor of implementation column one of the present invention
1 is metallization negative electrode, and 2 be the first conductive type semiconductor substrate, and 3 be that the first conductive type semiconductor is lightly doped
Area, 4 be the main knot of the second conductive type semiconductor, and 5 be the second conductive type semiconductor equal potential belt, and 51,611,621 lead for second
Semiconductor buried layer is lightly doped in electric type, and 61,62 be the second conductive type semiconductor field limiting ring, and 7 be the first conductive type semiconductor
End ring, 8 be field oxygen layer, and 9 be metallization anode.
Embodiment
Illustrate embodiments of the present invention below by way of specific instantiation, those skilled in the art can be by this specification
Disclosed content understands other advantages and effect of the present invention easily.The present invention can also be by different specific in addition
Embodiment is embodied or practiced, and the various details in this specification can also be based on different viewpoints and application, not carry on the back
Various modifications or alterations are carried out under spirit from the present invention.
Embodiment one
A kind of terminal structure of power semiconductor, as shown in figure 1, the metallization being cascading from bottom to up is cloudy
Pole 1, the first conductive type semiconductor substrate 2, the first conductive type semiconductor lightly doped epitaxial layer 3, field oxygen layer 8 and metallization
Anode 9；The top of first conductive type semiconductor lightly doped epitaxial layer 3 has the main knot 4 of the second conductive type semiconductor, the
Two conductive type semiconductor equal potential belts 5, the first conduction type cut-off ring 7；The second conductive type semiconductor equal potential belt 5 with
The main knot 4 of second conductive type semiconductor is in contact, and the first conduction type cut-off ring 7 is located remotely from the second conductive-type
The distal end side of the main knot 4 of type semiconductor；The field oxygen layer 8 is covered in the upper surface of the first conduction type lightly doped epitaxial layer 3；Institute
Metallization anode 9 is stated on field oxide 8 and by the contact hole in field oxygen layer 8 and the main knot 4 of the second conductive type semiconductor
It is in contact；There is one or one between the second conductive type semiconductor equal potential belt 5 and the first conduction type cut-off ring 7
More than the second conductive type semiconductor field limiting ring (61,62 ... 6n, n >=1)；Led in the equal potential belt 5 close to first
The side of electric type cut-off ring 7 has the second conductive type semiconductor equal potential belt buried regions 51, second conductive type semiconductor
The side of equal potential belt buried regions 51 is in contact with equal potential belt 5 and opposite side is not in contact with field limiting ring 61, second conduction type
There is a certain distance the upper surface of semiconductor equal potential belt buried regions 51 to the upper surface of the first conduction type lightly doped epitaxial layer 3；
The second conductive type semiconductor field limiting ring (61,62 ... 6n, n >=1) close to the one of the first conduction type cut-off ring 7
Side have the second conductive type semiconductor field limiting ring buried regions (611,621 ... 6n1, n >=1), second conduction type half
Conductor field limiting ring buried regions (611,621 ... 6n1, n >=1) side and field limiting ring (61,62 ... 6n, n >=1) be in contact
And opposite side is not in contact with other any field limiting rings, the second conductive type semiconductor field limiting ring buried regions (611,
621st ... 6n1, n >=1) upper surface have a certain distance to the upper surface of the first conduction type lightly doped epitaxial layer 3.
Characterized in that, the doping concentration of the second conductive type semiconductor equal potential belt buried regions 51 meets：At the end
When end structure is reversely pressure-resistant, the second conductive type semiconductor equal potential belt buried regions 51 and the first conduction type directly over it
Lightly doped epitaxial layer 3 is mutually exhausted can realize.
Be further characterized in that, the second conductive type semiconductor field limiting ring buried regions (611,621 ... 6n1, n >=1)
Doping concentration meets：When the terminal structure is reversely pressure-resistant, the second conductive type semiconductor field limiting ring buried regions (611,
621st ... 6n1, n >=1) mutually exhausted with the first conduction type lightly doped epitaxial layer 3 directly over it can realize.
Fig. 4-Figure 11 is a kind of terminal manufacturing approach craft for power semiconductor that embodiments of the invention one provide
Schematic flow sheet, processing step are：
First as shown in figure 4, passing through epitaxy technique, growth one on the heavily-doped semiconductor substrate 2 of the first conduction type
Layer meets the lightly doped epitaxial layer 3 of certain thickness first conduction type of specific resistance to pressure request, the usual substrate and epitaxial layer
Material is silicon (Si)；
As shown in figure 5, rotation resist coating, exposure imaging, band glue inject the second conductive type ion or this kind ionization
Compound, the main knot 4 of the second conductive type semiconductor is formed by High temperature diffusion knot, impurity activation in diffusion furnace after cleaning；
As shown in fig. 6, rotating resist coating, band glue injects the second conductive type ion or this kind ionization after exposure imaging
Compound, remove photoresist, the He of the second conduction type equal potential belt 5 is formed by High temperature diffusion knot, activator impurity in diffusion furnace after cleaning
Field limiting ring 61,62；
As shown in fig. 7, cleaning of removing photoresist, then rotate resist coating, exposure imaging, band glue inject the first conductive type ion or
This kind of ionic compound, form the first conduction type by High temperature diffusion knot, impurity activation in diffusion furnace after cleaning and partly lead
Body ends ring 7；
Next, as shown in figure 8, one layer of hard mask of certain thickness is deposited by chemical vapor deposition method after Wafer Cleaning
Layer, resist coating is rotated, exposure imaging, hard mask is etched, is re-fed into ion implantation apparatus, carry out energetic ion injection；By silicon
Piece is sent into high temperature dispersing furnace, and impurity activation forms equal potential belt buried regions and field limiting ring buried regions, then removes hard mask；
As shown in figure 9, deposit forms certain thickness field oxygen layer 8,
As shown in Figure 10, photoetching, etching active area；
Finally, as shown in figure 11, anode metal and the moon are formed by metal sputtering, silicon chip back side reduction process, metallization
Pole metal.
Below, by taking embodiment one as an example, using the first conductive type semiconductor as N-type silicon, the second conductive type semiconductor is P
Type silicon, illustrate the operation principle of the present invention.
Generally, breakdown voltage can be with the increase of field limiting ring number rather than linearly increasing, and this is meant that in high-voltage applications
In, it is necessary to more field limiting ring is enough pressure-resistant to obtain, it is larger to make terminal area occupied.
Present invention limit ring position on the scene, which introduces, is lightly doped buried regions, and when device is reversely pressure-resistant, space-charge region will be from master
Tie and extended into N type lightly doped epitaxial layers, at the same the p-type beside equal potential belt and field limiting ring be lightly doped buried regions will with thereon
Mutually exhausted with the N-type lightly doped epitaxial layer under it, electronegative ionization acceptor impurity will be left at buried regions, N-type is lightly doped
Epitaxial layer in will be left the ionized donor impurity of positively charged.The ionized donor of positively charged produces in N-type lightly doped epitaxial layer
Electric flux part will fall on buried regions, so can reduce in equal potential belt and field limiting ring curved surface knot position electric flux, delay
The electric field of solution surface knot opening position is concentrated, and avoids curved surface knot electric field from advanceing to up to critical value, avalanche breakdown occurs.
P type buried layer exhausts with N-type lightly doped epitaxial layer thereon simultaneously, longitudinal electric field is introduced in terminal location, according to two
Tie up Poisson's equation：
Wherein NDConcentration, ε is lightly doped for epitaxial layer upper surface N-typesFor semiconductor permittivity.Drawing for buried regions is lightly doped in p-type
Enter so that longitudinal electric field gradientNo longer it is 0 so that semiconductor surface transverse electric field gradient slows down, unit length
Electrical potential difference increases, and peak surface electric field reduces, so as to reduce terminal length.
Although conventional buried regions terminal will obtain good effect with very high area utilization, such terminal structure
Fruit is, it is necessary to the quantity of electric charge of buried regions accurately matches with the quantity of electric charge of the semiconductor lightly doped district above it, thus easily by technological fluctuation
Influence, particularly when the breakdown voltage for requiring terminal is very high, the length of buried regions is longer, is more easy to impacted.The present invention uses
Multiple buried regions being connected with equal potential belt or field limiting ring, increase buried regions quantity, reduce single buried regions length, reduce inclined to technique
The susceptibility of difference.
Embodiment two
A kind of terminal structure of power semiconductor, as shown in Fig. 2 on the basis of embodiment one, in the equipotential
Increase field plate 11 on ring and field limiting ring, the field plate 11 is located at the upper surface of field oxygen layer 8, and the second conduction type of part covering half
The conductive type semiconductor equal potential belt buried regions 51 of conductor equal potential belt 5 and second, and the second conductive type semiconductor field limiting ring (61,
62nd ... 6n, n >=1) and the second conductive type semiconductor field limiting ring buried regions (611,621 ... 6n1, n >=1)；The field plate
11 upper surface blanket dielectric layers 10.
Embodiment three
A kind of terminal structure of power semiconductor, as shown in figure 3, on the basis of embodiment two, in the field plate
Increase Metal field plate 12 on 11, the Metal field plate 12 passes through contact hole and the second conductive type semiconductor equal potential belt 5 and the
Two conductive type semiconductor field limiting rings (61,62 ... 6n, n >=1) be connected, the Metal field plate 12 also passes through contact hole and field
Plate 11 is connected.
Claims (6)
1. a kind of terminal structure of power semiconductor, including be cascading from bottom to up metallization negative electrode (1),
One conductive type semiconductor substrate (2), the first conductive type semiconductor lightly doped epitaxial layer (3) and field oxygen layer (8)；Described first
Conductive type semiconductor lightly doped epitaxial layer (3) upper strata side has the main knot (4) of the second conductive type semiconductor, and opposite side has
First conduction type cut-off ring (7), the portion of upper surface of the main knot (4) of the second conductive type semiconductor have metallization anode
(9), the metallization anode (9) extends along field oxygen layer (8) upper table towards close to the side of the first conduction type cut-off ring (7),
The upper surface of the first conduction type cut-off ring (7) and the upper surface and field of the main knot (4) of the conductive type semiconductor of part second
Oxygen layer (8) contacts；In the main knot (4) of second conductive type semiconductor close to the side of the first conduction type cut-off ring (7) tool
There are the second conductive type semiconductor equal potential belt (5), upper surface and the field oxygen layer (8) of the second conductive type semiconductor equal potential belt (5)
Contact；Have second close to the side of the first conduction type cut-off ring (7) in the second conductive type semiconductor equal potential belt (5)
Conductive type semiconductor equal potential belt buried regions (51), the lower surface junction depth of the second conductive type semiconductor equal potential belt buried regions (51)
It is identical with the lower surface junction depth of the second conductive type semiconductor equal potential belt (5), the second conductive type semiconductor equal potential belt buried regions
(51) upper surface junction depth is more than the upper surface junction depth of the second conductive type semiconductor equal potential belt (5)；In second conductive-type
The first conductive type semiconductor lightly doped epitaxial layer between type semiconductor equal potential belt (5) and the first conduction type cut-off ring (7)
(3) in, there is the mutually isostructural second conductive type semiconductor field limiting ring of at least two, and each second conductive type semiconductor
Field limiting ring has the second conductive type semiconductor field limiting ring buried regions close to the side of the first conduction type cut-off ring (7) side,
The upper surface of second conductive type semiconductor field limiting ring contacts with field oxygen layer (8), the second conductive type semiconductor field limiting ring
The lower surface junction depth of buried regions is identical with the lower surface junction depth of the second conductive type semiconductor field limiting ring, the second conductive type semiconductor
The upper surface junction depth of field limiting ring buried regions is more than the upper surface junction depth of the second conductive type semiconductor field limiting ring.
A kind of 2. terminal structure of power semiconductor according to claim 1, it is characterised in that the field oxygen layer
(8) upper surface has multiple field plates, and field plate is successively respectively positioned at the second conductive type semiconductor equal potential belt (5) and the second conduction
Type semiconductor equal potential belt buried regions (51) and each second conductive type semiconductor field limiting ring and the second conductive type semiconductor
The top of field limiting ring buried regions；In field plate and field oxygen layer (8) upper surface covered with dielectric layer (10), metallize anode (9) accordingly
Extend along dielectric layer (10) upper table towards close to the side of the first conduction type cut-off ring (7).
3. the terminal structure of a kind of power semiconductor according to claim 1 or 2, it is characterised in that described second
The doping concentration of conductive type semiconductor equal potential belt buried regions (51) meets：When the terminal structure is reversely pressure-resistant, described second
Conductive type semiconductor equal potential belt buried regions (51) can realized with the first conduction type lightly doped epitaxial layer (3) directly over it
Mutually exhaust.
4. the terminal structure of a kind of power semiconductor according to claim 3, it is characterised in that described second is conductive
The doping concentration of type semiconductor field limiting ring buried regions meets：When the terminal structure is reversely pressure-resistant, second conduction type
Semiconductor field limiting ring buried regions and the first conduction type lightly doped epitaxial layer (3) directly over it are mutually exhausted can realize.
5. the terminal structure of a kind of power semiconductor according to claim 4, it is characterised in that described first is conductive
Type semiconductor is n-type semiconductor, and second conductive type semiconductor is p-type semiconductor；Or first conduction type
Semiconductor is P-type semiconductor, and second conductive type semiconductor is n-type semiconductor.
6. the terminal structure of a kind of power semiconductor according to claim 5, it is characterised in that in the field plate
(11) top also has Metal field plate (12), and the Metal field plate (12) passes through contact hole and the second conductive type semiconductor equipotential
Ring (5) and the second conductive type semiconductor field limiting ring are connected, and the Metal field plate (12) also passes through contact hole and field plate (11)
It is connected.
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| CN201710665466.7A CN107425054A (en) | 2017-08-07 | 2017-08-07 | A kind of terminal structure of power semiconductor |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109994539A (en) * | 2019-03-29 | 2019-07-09 | 华中科技大学 | A kind of silicon carbide junction barrier schottky diodes and preparation method thereof |
| CN110444587A (en) * | 2019-08-21 | 2019-11-12 | 江苏中科君芯科技有限公司 | Terminal structure with buried layer |
| CN110808245A (en) * | 2020-01-07 | 2020-02-18 | 四川立泰电子有限公司 | Low electromagnetic interference power device terminal structure |
| EP4343854A1 (en) * | 2022-09-22 | 2024-03-27 | Kabushiki Kaisha Toshiba | Termination region for semiconductor device and manufacturing method thereof |
Citations (3)
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| CN109994539A (en) * | 2019-03-29 | 2019-07-09 | 华中科技大学 | A kind of silicon carbide junction barrier schottky diodes and preparation method thereof |
| CN110444587A (en) * | 2019-08-21 | 2019-11-12 | 江苏中科君芯科技有限公司 | Terminal structure with buried layer |
| CN110444587B (en) * | 2019-08-21 | 2023-01-03 | 江苏中科君芯科技有限公司 | Terminal structure with buried layer |
| CN110808245A (en) * | 2020-01-07 | 2020-02-18 | 四川立泰电子有限公司 | Low electromagnetic interference power device terminal structure |
| CN110808245B (en) * | 2020-01-07 | 2020-04-21 | 四川立泰电子有限公司 | Low electromagnetic interference power device terminal structure |
| EP4343854A1 (en) * | 2022-09-22 | 2024-03-27 | Kabushiki Kaisha Toshiba | Termination region for semiconductor device and manufacturing method thereof |
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Application publication date: 20171201 |