CN107423027A - A kind of information-reading method of optical module, device and system - Google Patents
A kind of information-reading method of optical module, device and system Download PDFInfo
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- CN107423027A CN107423027A CN201710608212.1A CN201710608212A CN107423027A CN 107423027 A CN107423027 A CN 107423027A CN 201710608212 A CN201710608212 A CN 201710608212A CN 107423027 A CN107423027 A CN 107423027A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30101—Special purpose registers
Abstract
This application provides a kind of information-reading method of optical module, device and system.CPU first determines the order storage position of optical module to be read in the application, then deposits control command in position is deposited in order.FPGA starts optical module information corresponding to reading order storage position after detecting control command, control command is removed after reading, whether cpu cycle property inspection order storage also has control command in position, and when control command is not present, the optical module information of FPGA storages is obtained from memory space.Compared with prior art, the work of the application reading optical module information transfers to FPGA to handle, and compared with CPU in the prior art directly reads optical module information by I2C buses, time-consuming short, CPU will not be in busy state and timer normal work for a long time.
Description
Technical field
The application is related to the communications field, more particularly to a kind of information-reading method of optical module, device and system.
Background technology
With the development of optical communication technique, the accessible optical mode number of blocks of interchanger is continuously increased, and is stored in optical module
The relevant information of many optical links, the CPU of interchanger needs often to read the information of optical module, to judge the shape of optical link
State.
In the prior art, CPU realizes that the information to optical module is read by I2C buses.Referring to accompanying drawing 1, because CPU is only
There is an I2C interface, therefore multiple I2C interfaces are expanded usually using the chip such as CPLD, FPGA in interchanger, CPU can be with
Go to connect multiple optical modules by this multiple I2C interface.When CPU needs to read optical module information, the core such as CPLD, FPGA is notified
Piece turns on the I2C buses between CPU and optical module to be read, CPU is read optical module information by I2C buses.
The defects of prior art is that CPU directly reads optical module information by I2C buses, and what I2C buses were propagated is low
Fast signal, therefore reading process elapsed time is long and can not be interrupted, and causes CPU to be in busy state for a long time.And CPU needs
Interrupt requests are closed in reading process, such as accompanying drawing 2, this causes jiffies parameters to be affected and then influences timer just
Often operation.
The content of the invention
In order to solve the above technical problems, this application provides a kind of information-reading method of optical module, device and system, with
Improve CPU in the prior art directly to lack by cpu busy, timer inaccuracy etc. caused by I2C buses reading optical module information
Point.Technical scheme is as follows：
A kind of information-reading method of optical module, it is characterised in that methods described includes：
CPU determines the order storage position of optical module to be read, and the order storage position is in FPGA command register, each
The corresponding optical module in order storage position；
CPU deposits control command in the order storage position；
FPGA starts to read optical module information corresponding to the order storage position；
Whether cpu cycle property inspection order storage also has control command in position, is not deposited until in the order storage position
In control command；The CPU can receive interrupt requests during periodic test；
After the optical module information read is stored in designated memory space by FPGA, the control life in clear command storage position
Order；
CPU obtains the optical module information of FPGA storages from designated memory space.
A kind of information-reading method of optical module, CPU are connected by FPGA with some optical modules, it is characterised in that described
Method includes：
CPU determines order storage position of the optical module to be read in FPGA command register；
Control command is deposited in the order storage position, the control command is used to control FPGA to read optical module letter
Breath, the optical module information read is stored in after designated memory space by the FPGA removes the control command；
Whether periodic test order storage also has control command in position, until control is not present in the order storage position
System order；The CPU can receive interrupt requests during periodic test；
The optical module information of FPGA storages is obtained from designated memory space.
A kind of information-reading method of optical module, applied to FPGA, the FPGA is connected to a CPU and some optical modes
Block, it is characterised in that methods described includes：
Command register is checked, when order, which is deposited, houses control command in position, starts to read the order storage position
Corresponding optical module information；
The optical module information read is stored in designated memory space；
Control command in clear command storage position.
This application provides a kind of information-reading method of optical module, device and system, will read the work of optical module information
FPGA is transferred to handle, the work that the application reads optical module information transfers to FPGA to handle, direct with CPU in the prior art
Optical module information is read by I2C buses to compare, time-consuming short, CPU will not be in busy state and the normal work of timer for a long time
Make.
Brief description of the drawings
, below will be to embodiment or existing in order to illustrate more clearly of the embodiment of the present application or technical scheme of the prior art
There is the required accompanying drawing used in technology description to be briefly described, it should be apparent that, drawings in the following description are only this
Some embodiments described in application, for those of ordinary skill in the art, other can also be obtained according to these accompanying drawings
Accompanying drawing.
Fig. 1 is a kind of schematic diagram of the application information-reading method of optical module in the prior art；
Fig. 2 is another schematic diagram of the application information-reading method of optical module in the prior art；
Fig. 3 is a kind of schematic diagram of the information-reading method of the application optical module；
Fig. 4 is a kind of flow chart of the information-reading method of the embodiment of the present application optical module；
Fig. 5 applies a kind of flow chart in CPU for the information-reading method of the embodiment of the present application optical module；
Fig. 6 applies another flow chart in CPU for the information-reading method of the embodiment of the present application optical module；
Fig. 7 applies a kind of flow chart in FPGA for the information-reading method of the embodiment of the present application optical module；
Fig. 8 applies a kind of schematic diagram in CPU for the information read device of the embodiment of the present application optical module；
Fig. 9 applies a kind of schematic diagram in FPGA for the information read device of the embodiment of the present application optical module.
Embodiment
This application provides a kind of information-reading method of optical module, device and system, will read the work of optical module information
FPGA is transferred to handle, compared with CPU in the prior art directly reads optical module information by I2C buses, takes short, CPU
Busy state and timer normal work will not be in for a long time.
The information-reading method of optical module in the application is applied to the network equipment of forwarding optical signal, such as accompanying drawing 3, at this
All illustrated in specification with interchanger.In a switch, CPU connections FPGA, FPGA connect some light by I2C buses
Module, when CPU needs optical module information, notice FPGA is read out, and optical module information is placed on into finger after the completion of FPGA readings
Determine in memory space, CPU again takes optical module information away from memory space.
In order that those skilled in the art more fully understand the technical scheme in the application, implement below in conjunction with the application
Accompanying drawing in example, the technical scheme in the embodiment of the present application is described in detail.
Refer to Fig. 4, be the embodiment of the present application optical module information-reading method a kind of flow chart, its can include with
Lower basic step：
S401, CPU determine order storage position of the optical module to be read in FPGA command register；
FPGA is a kind of programmable chip, wherein there is some registers, according to be actually needed by wherein some or it is a few
Individual register is set as command register.
Some order storage positions are marked off in command register, for storing the control command that CPU is issued.FPGA connections
Some optical modules, order storage position and these optical modules correspond.
In the present embodiment, CPU first determines order corresponding to optical module to be read in FPGA some command registers
The command register where position is deposited, then optical module pair to be read is determined in some orders storage position of the command register
The order storage position answered.That is, first finding the corresponding command register of optical module, then found in this command register
Corresponding order storage position.
In actual applications, order storage position can be set according to demand, illustrated：
Each bit of command register is considered as an order storage position, the corresponding optical module of each bit；
Every 2 bits of command register are considered as an order storage position, the corresponding optical mode of every 2 bits
Block；
Every n bit of command register is considered as an order storage position, a corresponding optical mode per n bit
Block.
S402, CPU deposit control command in position is deposited in order；
Control command is used to control FPGA to read optical module information, if CPU will read the information of some optical module, as long as
Control command is stored in order storage position corresponding to optical module.Illustrate：By each bit of command register
It is considered as an order storage position, and bit and optical module is corresponded.When some bit is set to 1, it is considered as CPU and deposits
The reading order of corresponding optical module is put.
S403, FPGA start to read optical module information corresponding to the order storage position；
That reads optical module information needs the consumption long period, in the prior art, is completed by CPU, and the application will
It gives FPGA to complete.
Whether S404, cpu cycle property detection control command are also present；
After the optical module information read is stored in designated memory space by S405, FPGA, in clear command storage position
Control command；
FPGA reads optical module information finish and be put into memory space after, control command can be removed.Referring to step S404.
Cpu cycle property detection control command whether also exist, when detecting that control command is not present, show optical module information by
" ready " can be taken away by CPU.
S406, CPU obtain the optical module information of FPGA storages from designated memory space.
After CPU detects that control command is not present, the optical module information of FPGA storages is obtained from designated memory space.
In actual applications, usually using PCIE spaces as memory space.PCIE spaces are marked off into some information to deposit
Area is put, the information of a corresponding optical module is deposited by each information storage area.
Space can be allocated by user according to demand, be illustrated：In PCIE spaces, every 512 bytes are distributed to
Parking space of one optical module as information, then：
0x10000000~0x100001ff stores optical module 1；
0x10000200~0x100003ff stores optical module 2；
….
0x10000000+512*n~0x10000000+512* (n+1) storage optical modules n.
Fig. 5 is refer to, is that the information-reading method of the embodiment of the present application optical module applies a kind of flow chart in CPU, its
Following basic step can be included：
S501, CPU determine order storage position of the optical module to be read in FPGA command register, with phase described in S401
Together.
S502, control command is deposited in position is deposited in order, it is identical with described in S402.
S503, wait preset time.
For CPU after command bit deposits control command, FPGA needs the time to go to read corresponding optical module information.Here pre-
If the time is exactly the time that FPGA reads optical module.The time span of preset time can be by user rule of thumb and actual motion
Situation is configured and adjusted.
It should be noted that in this section of preset time, CPU is not in busy state, can be with other lines of unrestrained section
The request of journey.Equivalent to by this thread temporary suspension, delay a period of time, row was handled again.
S504, check in order storage position whether control command also be present, if control command also be present, repeat step
Rapid S503 to S504；If there is no control command, step S505 is performed.
S505, the optical module information of FPGA storages is obtained from designated memory space, it is identical with described in S406.
Fig. 6 is refer to, is that the information-reading method of the embodiment of the present application optical module applies another flow chart in CPU,
In the present embodiment, using command register numbering as 0-3, each command register is 32, the bit in 0-3 command registers
Bit number is followed successively by 00-31,32-63,64-95, exemplified by CPU will read the information of n-th of optical module, illustrates.It can be with
Including following basic step：
S601, calculate n/32 quotient value a；
In the present embodiment, each bit of command register is corresponding in turn to an optical module, 0-3 command registers
Bit bit number in device is followed successively by 00-31,32-63,64-95, and these bits can be corresponding in turn to the 1st to the 32nd optical mode
Block, the 33rd to the 64th optical module, the 65th to the 96th optical module.It should be noted that FPGA is at most can be with herein
Corresponding 96 optical modules, might not really be connected to 96 optical modules.
When some bit is set to 1 by CPU, represent that CPU needs to read optical module information corresponding to this bit.
Calculate n/32 quotient value.This value is exactly the register number where bit corresponding to optical module to be read.
Illustrate：Work as n=20, that is, when CPU will read the 20th optical module, calculate 20/32, quotient value is 0, this optical module
Corresponding bit is in the command register that numbering is 0；And work as n=35, that is, when CPU will read the 35th optical module,
35/32 is calculated, quotient value is 1, and bit corresponding to this optical module is just in the command register that numbering is 1.
S602, calculate n/32 remainder values b.
Calculate n/32 remainder values.This value is exactly the ratio in the register corresponding to optical module to be read where bit
Special bit number.Illustrate：Work as n=20, that is, when CPU will read the 20th optical module, calculate 20/32, remainder values 20,
Because having calculated bit corresponding to this optical module in last step S601 in the command register that numbering is 0,
That is bit corresponding to optical module to be read is exactly the 20th bit in the 0th command register；Work as n=35,
When being exactly that CPU will read the 35th optical module, 35/32 is calculated, remainder values 3, because having been calculated in last step S601
Bit corresponding to this optical module is in the command register that numbering is 1, that is to say, that bit corresponding to optical module to be read
Position is exactly the 3rd bit in the 1st command register.
S603, it is 1 by b-th of bit position of a-th of command register of FPGA；
This bit is arranged to 1 by CPU, it can be understood as notice FPGA goes to read optical module corresponding to this bit
Information.
S604, preset time is waited, it is identical with described in S504.
S605, judges whether the value of b-th of bit of a-th of command register of FPGA is equal to 0, if not equal to 0, weight
Step S604 to S605 is performed again, if equal to 0, perform step S606.
FPGA reads optical module finish and be put into PCIE spaces after, previous CPU can be set to 1 corresponding bit position again
Clear 0.Therefore, when corresponding bit position is equal to 0, show that optical module is read and finish, CPU can take optical module information away；When right
When answering bit not equal to 0, show that optical module is not yet read and finish, CPU temporarily handles other requests, sentences again after preset time
Whether the value of b-th of bit of a-th of command register of disconnected FPGA is equal to 0, until corresponding bit position is equal to 0.
S606, CPU obtain optical module information from the correspondence position in PCIE spaces.
Fig. 7 is refer to, is that the information-reading method of the embodiment of the present application optical module applies a kind of flow chart in FPGA, its
Following basic step can be included：
S701, command register is checked, when order, which is deposited, houses control command in position, start to read the order and deposit
Put optical module information corresponding to position.
S702, after the optical module information read is stored in into designated memory space, the control in clear command storage position
Order.
Fig. 8 is refer to, is that the information read device of the embodiment of the present application optical module applies a kind of schematic diagram in CPU, should
For CPU, the CPU is connected by FPGA with some optical modules, and described device includes：Position determination module 801, order issues
Module 802, order detection module 803, data obtaining module 804.
Position determination module 801：For making CPU determine order storage of the optical module to be read in FPGA command register
Position；
Order issues module 802：For depositing control command in the order storage position, the control command is used to control
FPGA processed reads optical module information, described in the optical module information read is stored in after designated memory space and removed by the FPGA
Control command；
Order detection module 803：Deposit in position whether control command also be present for periodic test order, until described
Control command is not present in position in order storage；The CPU can receive interrupt requests during periodic test；
Data obtaining module 804：For obtaining the optical module information of FPGA storages from designated memory space.
Fig. 9 is refer to, is that the information read device of the embodiment of the present application optical module applies a kind of schematic diagram in FPGA, institute
Stating FPGA and being connected to a CPU and some optical modules, described device includes：Information reading module 901, information storage module 902.
Information reading module 901：For checking command register, when order, which is deposited, houses control command in position, open
Begin to read optical module information corresponding to the order storage position；
Information storage module 902：For making FPGA that the optical module information read is stored in into designated memory space and clear
Except the control command in position is deposited in order；
Each embodiment in this specification is described by the way of progressive, identical similar portion between each embodiment
Divide mutually referring to what each embodiment stressed is the difference with other embodiment.It is real especially for device
For applying example, because it is substantially similar to embodiment of the method, so describing fairly simple, related part is referring to embodiment of the method
Part explanation.Device embodiment described above is only schematical, wherein described be used as separating component explanation
Module can be or may not be physically separate, can be as the part that module is shown or may not be
Physical location, you can with positioned at a place, or can also be distributed on multiple NEs.Can be according to the actual needs
Some or all of module therein is selected to realize the purpose of this embodiment scheme.Those of ordinary skill in the art are not paying
In the case of creative work, you can to understand and implement.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all essences in the present invention
God any modification, equivalent substitution and improvements done etc., should be included within the scope of protection of the invention with principle.
Claims (10)
1. a kind of information-reading method of optical module, it is characterised in that methods described includes：
CPU determines the order storage position of optical module to be read, and the order storage position is in FPGA command register, each order
Deposit the corresponding optical module in position；
CPU deposits control command in the order storage position；
FPGA starts to read optical module information corresponding to the order storage position；
Whether cpu cycle property inspection order storage also has control command in position, until control is not present in the order storage position
System order；The CPU can receive interrupt requests during periodic test；
After the optical module information read is stored in designated memory space by FPGA, the control command in clear command storage position；
CPU obtains the optical module information of FPGA storages from designated memory space.
2. a kind of information-reading method of optical module, CPU is connected by FPGA with some optical modules, it is characterised in that the side
Method includes：
CPU determines order storage position of the optical module to be read in FPGA command register；
Control command is deposited in the order storage position, the control command is used to control FPGA to read optical module information, institute
State FPGA the optical module information read is stored in after designated memory space and remove the control command；
Whether periodic test order storage also has control command in position, until control life is not present in the order storage position
Order；The CPU can receive interrupt requests during periodic test；
The optical module information of FPGA storages is obtained from designated memory space.
3. according to the method for claim 2, it is characterised in that described to determine optical module to be read in FPGA command register
In order storage position, including：
The command register where order storage position corresponding to optical module to be read is determined in FPGA some command registers；
Order storage position corresponding to optical module to be read is determined in some orders storage position of the command register.
4. according to the method for claim 2, it is characterised in that it is described to deposit control command in the order storage position,
Including：
Bit corresponding to optical module to be read is revised as 1；
Each bit of the command register is considered as an order storage position, when the bit is set to 0, is considered as
Control command is not deposited, when the bit is set to 1, is considered as and is housed control command.
5. according to the method for claim 2, it is characterised in that the designated memory space is PCIE spaces.
6. according to the method for claim 5, it is characterised in that have some information storage areas in the PCIE spaces, each
Information storage area deposits the information of a corresponding optical module.
7. a kind of information-reading method of optical module, applied to FPGA, the FPGA is connected to a CPU and some optical modules,
Characterized in that, methods described includes：
Command register is checked, when order, which is deposited, houses control command in position, it is corresponding to start to read the order storage position
Optical module information；
After the optical module information read is stored in into designated memory space, the control command in clear command storage position.
8. a kind of information read device of optical module, applied to CPU, the CPU is connected by FPGA with some optical modules, it is special
Sign is that described device includes：
Position determination module：For making CPU determine that position is deposited in order of the optical module to be read in FPGA command register；
Order issues module：For depositing control command in the order storage position, the control command is used to control FPGA
Optical module information is read, the optical module information read is stored in after designated memory space by the FPGA removes the control life
Order；
Order detection module：Deposit in position whether control command also be present for periodic test order, until the order is deposited
Put and control command is not present in position；The CPU can receive interrupt requests during periodic test；
Data obtaining module：For obtaining the optical module information of FPGA storages from designated memory space.
9. a kind of information read device of optical module, applied to FPGA, the FPGA is connected to a CPU and some optical modules,
Characterized in that, described device includes：
Information reading module：For checking command register, when order, which is deposited, houses control command in position, start to read institute
State optical module information corresponding to order storage position；
Information storage module：For making, the optical module information read is stored in designated memory space by FPGA and clear command is deposited
Put the control command in position.
10. a kind of information of optical module reads system, it is characterised in that the system includes：
Position determination module：For making CPU determine that position is deposited in order of the optical module to be read in FPGA command register；
Order issues module：For making CPU deposit control command in the order storage position, the control command is used to control
FPGA reads optical module information, and the optical module information read is stored in after designated memory space by the FPGA removes the control
System order；
Information reading module：For making FPGA check command register, when order, which is deposited, houses control command in position, start
Read optical module information corresponding to the order storage position；
Order detection module：For making whether control command also be present in cpu cycle property inspection order storage position, until the life
Control command is not present in position in order storage；The CPU can receive interrupt requests during periodic test；
Information storage module：For making, the optical module information read is stored in designated memory space by FPGA and clear command is deposited
Put the control command in position；
Data obtaining module：For making CPU obtain the optical module information of FPGA storages from designated memory space.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111131936A (en) * | 2019-12-28 | 2020-05-08 | 苏州浪潮智能科技有限公司 | Optical module monitoring method, monitoring device, switch and storage medium |
| CN111124972A (en) * | 2019-12-02 | 2020-05-08 | 深圳震有科技股份有限公司 | Chip extension method, system and storage medium based on same I2C address |
Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1584790A (en) * | 2004-06-11 | 2005-02-23 | Ut斯达康通讯有限公司 | Pick up device and method for data in plugable optical modular inner memory |
| CN101140556A (en) * | 2007-09-11 | 2008-03-12 | 中兴通讯股份有限公司 | Method and device for realizing accessing multiple I2C slave device by programmable device |
| CN101149722A (en) * | 2007-10-22 | 2008-03-26 | 中兴通讯股份有限公司 | Method for executing CPU access to XFP optical module |
| CN101719110A (en) * | 2009-12-18 | 2010-06-02 | 烽火通信科技股份有限公司 | Real-time monitoring method of multipath I2C device in optical communication device |
| KR101193329B1 (en) * | 2012-01-30 | 2012-10-19 | (주)미래시스템 | The method of optical multi channel real timing signal transmission |
| CN102832996A (en) * | 2012-09-04 | 2012-12-19 | 深圳市共进电子股份有限公司 | Constant emitting detecting and overcoming method and device of optical module in EPON (Ethernet Passive Optical Network) |
| CN102866982A (en) * | 2012-09-14 | 2013-01-09 | 复旦大学 | Eight-bit complex instruction set central processor based on FPGA (Field Programmable Gata Array) |
| CN103368663A (en) * | 2012-03-28 | 2013-10-23 | 普天信息技术研究院有限公司 | Debugging and test method and system for radio frequency remote base station |
| CN103475493A (en) * | 2013-09-29 | 2013-12-25 | 武汉希文科技股份有限公司 | Intelligent multi-internet-port network card and data processing method |
| CN103995785A (en) * | 2014-05-07 | 2014-08-20 | 四川九成信息技术有限公司 | Information processing method and system |
| CN104639375A (en) * | 2015-03-03 | 2015-05-20 | 大唐移动通信设备有限公司 | Interface management method and network equipment |
| CN104717157A (en) * | 2015-01-06 | 2015-06-17 | 国家电网公司 | Optical digital message sending method based on absolute time scale |
| CN106598059A (en) * | 2017-01-25 | 2017-04-26 | 桂林航天工业学院 | Multi-rotor unmanned aerial vehicle system based on FPGA |
| CN106612141A (en) * | 2016-12-20 | 2017-05-03 | 北京旋极信息技术股份有限公司 | Optical fiber channel protocol general simulation testing card and data interaction method thereof |
-
2017
- 2017-07-24 CN CN201710608212.1A patent/CN107423027B/en active Active
Patent Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1584790A (en) * | 2004-06-11 | 2005-02-23 | Ut斯达康通讯有限公司 | Pick up device and method for data in plugable optical modular inner memory |
| CN101140556A (en) * | 2007-09-11 | 2008-03-12 | 中兴通讯股份有限公司 | Method and device for realizing accessing multiple I2C slave device by programmable device |
| CN101149722A (en) * | 2007-10-22 | 2008-03-26 | 中兴通讯股份有限公司 | Method for executing CPU access to XFP optical module |
| CN101719110A (en) * | 2009-12-18 | 2010-06-02 | 烽火通信科技股份有限公司 | Real-time monitoring method of multipath I2C device in optical communication device |
| KR101193329B1 (en) * | 2012-01-30 | 2012-10-19 | (주)미래시스템 | The method of optical multi channel real timing signal transmission |
| CN103368663A (en) * | 2012-03-28 | 2013-10-23 | 普天信息技术研究院有限公司 | Debugging and test method and system for radio frequency remote base station |
| CN102832996A (en) * | 2012-09-04 | 2012-12-19 | 深圳市共进电子股份有限公司 | Constant emitting detecting and overcoming method and device of optical module in EPON (Ethernet Passive Optical Network) |
| CN102866982A (en) * | 2012-09-14 | 2013-01-09 | 复旦大学 | Eight-bit complex instruction set central processor based on FPGA (Field Programmable Gata Array) |
| CN103475493A (en) * | 2013-09-29 | 2013-12-25 | 武汉希文科技股份有限公司 | Intelligent multi-internet-port network card and data processing method |
| CN103995785A (en) * | 2014-05-07 | 2014-08-20 | 四川九成信息技术有限公司 | Information processing method and system |
| CN104717157A (en) * | 2015-01-06 | 2015-06-17 | 国家电网公司 | Optical digital message sending method based on absolute time scale |
| CN104639375A (en) * | 2015-03-03 | 2015-05-20 | 大唐移动通信设备有限公司 | Interface management method and network equipment |
| CN106612141A (en) * | 2016-12-20 | 2017-05-03 | 北京旋极信息技术股份有限公司 | Optical fiber channel protocol general simulation testing card and data interaction method thereof |
| CN106598059A (en) * | 2017-01-25 | 2017-04-26 | 桂林航天工业学院 | Multi-rotor unmanned aerial vehicle system based on FPGA |
Non-Patent Citations (2)
| Title |
|---|
| EDIN KADRIC: ""An FPGA implementation for a high-speed optical link with a PCIe interface"", 《IEEE》 * |
| 陈晋敏等: ""CFP光模块管理接口的FPGA实现"", 《第十七届全国青年通信学术年会论文集》 * |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111124972A (en) * | 2019-12-02 | 2020-05-08 | 深圳震有科技股份有限公司 | Chip extension method, system and storage medium based on same I2C address |
| CN111131936A (en) * | 2019-12-28 | 2020-05-08 | 苏州浪潮智能科技有限公司 | Optical module monitoring method, monitoring device, switch and storage medium |
| CN111131936B (en) * | 2019-12-28 | 2022-07-08 | 苏州浪潮智能科技有限公司 | Optical module monitoring method, monitoring device, switch and storage medium |
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