CN103368663A - Debugging and test method and system for radio frequency remote base station - Google Patents
Debugging and test method and system for radio frequency remote base station Download PDFInfo
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- CN103368663A CN103368663A CN2012100869959A CN201210086995A CN103368663A CN 103368663 A CN103368663 A CN 103368663A CN 2012100869959 A CN2012100869959 A CN 2012100869959A CN 201210086995 A CN201210086995 A CN 201210086995A CN 103368663 A CN103368663 A CN 103368663A
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Abstract
The invention provides a debugging and test method and system. An optical interface is used to transmit and receive debugging data between the optical interface and a board card which is to be debugged and tested; through a control of time of transmitting and receiving, a BBU (base band unit) function is simulated to provide a data source to a RRU (remote RF unit) and to collect data of the RRU, and a RRU function is simulated to provide the data source to the BBU and collects the data of the BBU; and the BBU and the RRU can be debugged under a condition of a single board, and can be debugged under a condition of a whole machine. The flexibility is good, the operationality is great; and the extra interface cooperation is not required under the condition of the whole machine.
Description
Technical field
The present invention relates to moving communicating field, relate in particular to a kind of accent method of testing and system for the remote radio base station.
Background technology
Existing LTE (Long term Evolution, Long Term Evolution) system and TD-SCDMA (Time Division-Synchronous Code Division Multiple Access, TD SDMA) distributed frame is adopted in the base station of system more, distributed base station refers to BBU (the Base Band Unit of base station, base station processing unit) and RRU (Remote RF Unit, Remote Radio Unit) separately as independently module is separated, and a kind of base station mode that utilizes optical fiber to link to each other by optical interface.The capacity of distributed base station system is large, and integrated level is high, networking flexibility, and applicable to multiple covering scene, its power consumption is little simultaneously, and reliability is high, and equipment cost is low, thereby makes the corresponding greatly decline of cost of network sputter and maintenance.
In mobile communication system, be subject to the impact of the objective factors such as cost, power consumption and networking flexibility, system requires more and more higher to the disposal ability of base station single-board, the data that often not only require base station single-board can finish multi-cell multi-antenna are processed, and also the resource utilization of base station single-board, integrated level etc. have all been proposed very high requirement.Especially in current TD and LTE system, owing to adopted Remote Radio Technique, base station processing unit BBU separates with radio frequency remote unit RRU, is connected by optical fiber between BBU and the RRU, so that the difficulty of test increase that the base station is carried out.Therefore, how in the higher situation of the resource utilization of base station single-board, to test to guarantee the correctness of BBU and RRU function, become one of current urgent problem.
In the existing method of testing to base station single-board, under the prerequisite that does not increase the peripheral hardware testing apparatus, can pass through software program, in BBU and RRU, utilize built-in application program to add certain method of testing, come the correctness of testing authentication BBU and RRU, the method is tested BBU and RRU by software code, do not need extra integrated circuit board or equipment, but, owing to be subject to the factor controllings such as cost, power consumption, the software and hardware resources of BBU and RRU does not have extra unnecessary resource to be used for testing outside the normal demand function of completion system itself substantially.Therefore, the method can only be used for simple test, the test that the mass data of can't satisfying the demand is analyzed.
Also usually adopt special-purpose equipment to realize certain RRU data acquisition and test in the prior art, as utilize the testing equipment of special analog BBU, whether the uplink and downlink physical channel of testing respectively RRU is normal.Its method of testing to uplink comprises the data by the antenna opening input signal source, be transferred in the analog BBU equipment after by optical fiber through each submodule of RRU, then analog BBU judges by analysis result whether uplink is normal with data analysis; Its method of testing to downlink is to send downlink data by analog BBU, be transferred to RRU through behind the optical fiber, RRU crosses downlink with these data communication devices and sends to antenna opening, by the output of apparatus measures antenna opening, judges according to test structure whether downlink is normal.Although but adopt special-purpose equipment to test RRU uplink and downlink passage simultaneously, but can not gather the upstream data of RRU, and can not test BBU, moreover utilize special-purpose analog BBU testing equipment owing to be subjected to the condition restriction such as hardware environment, and be difficult in the complete machine environment to connect RRU to be tested, only can test under the veneer environment, if test then needs to increase extra interface cooperation under the complete machine environment, thereby so that existing testing apparatus and method lack flexibility.
Summary of the invention
Defective in view of prior art, the invention provides a kind of method of testing for the remote radio base station and device, solve prior art and under the complete machine environment, test and need the additional interface cooperation, and can not gather the RRU upstream data, and the problem that can not test BBU.
The technological means that the present invention adopts is as follows: a kind of accent testing apparatus for the remote radio base station wherein, comprises and transfers test integrated circuit board and control PC; Wherein,
Described accent test integrated circuit board comprises CPU, FPGA, memory modules and optical module;
Wherein, described CPU is used for receiving debugging or the test instruction of described control PC and will comprises that transmitting-receiving corresponding configuration information constantly sends to described FPGA;
Described FPGA comprises the functional modules such as configuration module, Ethernet processing module, optical interface processing module and control module; Wherein, described configuration module is used for receiving the configuration information of described CPU and being configured; Described Ethernet processing module is used for receiving the tune-up data bag that described control PC sends, and extracts the tune-up data of described tune-up data bag, perhaps the test data that gathers is split to send to described control PC after being packaged as test packet; Described optical interface processing module is used for constantly receiving by described optical module in described transmitting-receiving the test data of described integrated circuit board interface to be tested, or reads tune-up data and send to described optical module by described control module; Described control module is used for inner each the module work of scheduling FPGA;
Described optical module is connected with RRU with described BBU by optical fiber, is used for the conversion of photosignal, and realize transferring the test integrated circuit board with wait to transfer data between the test integrated circuit board alternately;
Memory modules is used for the described tune-up data of buffer memory or test data;
Described control PC is used for sending debugging or test instruction to the CPU of described accent test integrated circuit board, and control the read operation of local tune-up data file, be to send to described accent test integrated circuit board behind continuous a plurality of tune-up data bags with described local tune-up data file declustering, and receive the test packet of exporting after described accent test integrated circuit board collection and the packing, and be stored in the local test data file.
Further, described configuration information also comprises the size of MAC Address, IP address, port numbers and the amount of transmitting and receive data of described control PC except comprising described transmitting-receiving constantly.
Further, described optical interface processing module also is used for repeatedly reading tune-up data according to the size of described transmission data volume; Described optical interface processing module also is used for receiving test data according to the size of receive data amount.
Further, the RRU that described CPU also is used for configuration FPGA when transferring test b BU integrated circuit board receives and dispatches constantly, and the BBU of configuration FPGA receives and dispatches constantly when transferring test RRU integrated circuit board.
Further, test board card interface described to be transferred is the IR interface, and described tune-up data bag and test packet are the UDP message bag.
The present invention also provides a kind of accent method of testing based on aforesaid accent testing apparatus, comprises debugging step and testing procedure, wherein,
Described debugging step comprises:
Described control PC sends debug command to the CPU of described accent test integrated circuit board, read local tune-up data file simultaneously, and be to send to described FPGA behind continuous a plurality of tune-up data bags with described tune-up data file declustering;
Described CPU sends to described FPGA according to the corresponding configuration information that described debug command will comprise delivery time;
The configuration module of described FPGA receives the configuration information of described CPU and is configured, and the Ethernet processing module of described FPGA receives described tune-up data bag, extracts the tune-up data of described tune-up data bag, and described tune-up data is write described memory modules;
Described optical interface processing module reads described tune-up data at described delivery time, and sends to described optical module;
Described optical module carries out described tune-up data to send to integrated circuit board to be debugged after the photosignal conversion;
Described testing procedure comprises:
Described control PC sends test instruction to the CPU of described accent test integrated circuit board;
Described CPU sends to described FPGA according to the corresponding configuration information that described test instruction will comprise the time of reception;
The configuration module of described FPGA receives the configuration information of described CPU and is configured;
Described optical interface processing module receives the data formation test data of integrated circuit board interface to be tested in the described time of reception by optical module, and is stored in described memory modules;
Described Ethernet processing module reads described test data, and packing formation test packet, sends to described control PC;
Described control PC receives described test packet, and is stored in the local test data file.
Further, in the described debugging step, described configuration information also comprises MAC Address, IP address, the port numbers of described control PC and the size that sends data volume except comprising described delivery time;
In the described testing procedure, described configuration information also comprises the size of MAC Address, IP address, port numbers and the receive data amount of described control PC except comprising the described time of reception.
Further, in the described debugging step, described optical interface processing module reads described tune-up data at described delivery time repeatedly according to the size that sends data volume, and sends to described optical module;
In the described testing procedure, described optical interface processing module receives test data according to the size of described receive data amount.
Further, the RRU of configuration FPGA receives and dispatches constantly when transferring test b BU integrated circuit board, and the BBU of configuration FPGA receives and dispatches constantly when transferring test RRU integrated circuit board.
Further, described integrated circuit board interface to be tested is the IR interface, and described tune-up data bag and test packet are the UDP message bag.
A kind of accent method of testing provided by the invention and device, adopt optical interface and treat and carry out the sending and receiving tune-up data between the accent test integrated circuit board, and by the control transmitting-receiving constantly, can realize that the analog BBU function provides data source to RRU and gathers the data of RRU, also can realize simulating the data that the RRU function provides data source to BBU and gathers BBU, not only can under the veneer environment, debug BBU and RRU, also can under the complete machine environment, debug, flexibility is good, workable, does not also need extra interface to cooperate in the complete machine environment.
Description of drawings
Fig. 1 is the structural representation of a kind of accent testing apparatus for the remote radio base station of the present invention;
Fig. 2 is a kind of debugging step flow chart of transferring in the method for testing of the present invention;
Fig. 3 is a kind of testing procedure flow chart of transferring in the method for testing of the present invention.
Embodiment
For make purpose of the present invention, technical scheme, and advantage clearer, referring to the accompanying drawing embodiment that develops simultaneously, the present invention is described in more detail.
A kind of accent testing apparatus for the remote radio base station of the present invention as described in Figure 1 comprises and transfers test integrated circuit board and control PC; Wherein,
Described accent test integrated circuit board comprises CPU, FPGA, memory modules and optical module;
Wherein, described CPU is used for receiving debugging or the test instruction of described control PC and will comprises that transmitting-receiving corresponding configuration information constantly sends to described FPGA, and the RRU that CPU also is used for configuration FPGA when transferring test b BU integrated circuit board receives and dispatches constantly, and the BBU of configuration FPGA receives and dispatches constantly when transferring test RRU integrated circuit board; Described configuration information also comprises the size of MAC Address, IP address, port numbers and the amount of transmitting and receive data of described control PC except comprising described transmitting-receiving constantly;
Described FPGA comprises the functional modules such as configuration module, Ethernet processing module, optical interface processing module and control module; Wherein, described configuration module is used for receiving the configuration information of described CPU and being configured; Described Ethernet processing module is used for receiving the tune-up data bag that described control PC sends, extract the tune-up data of described tune-up data bag, perhaps the test data that gathers is split be packaged as send to behind test packet (such as the UDP message) bag as described in control PC; Described optical interface processing module is used for constantly receiving described integrated circuit board interface to be tested by described optical module in described transmitting-receiving, test data such as the IR interface, or read tune-up data and send to described optical module by described control module, and it can read tune-up data repeatedly according to the size of described transmission data volume, or receives test data according to the size of receive data amount; Described control module is used for inner each the module work of scheduling FPGA;
Described optical module is connected with RRU with described BBU by optical fiber, is used for the conversion of photosignal, and realize transferring the test integrated circuit board with wait to transfer data between the test integrated circuit board alternately;
Memory modules is used for the described tune-up data of buffer memory or test data;
Described control PC is used for sending debugging or test instruction to the CPU of described accent test integrated circuit board, and control the read operation of local tune-up data file, be continuous a plurality of tune-up data bags with described local tune-up data file declustering, such as the UDP message bag, after send to described accent test integrated circuit board, and receive the test packet of exporting after described accent test integrated circuit board collection and the packing, and be stored in the local test data file.
The present invention also provides a kind of accent method of testing, comprises debugging step and testing procedure, and wherein debugging step comprises as shown in Figure 2:
Described control PC sends debug command to the CPU of described accent test integrated circuit board, read local tune-up data file simultaneously, and be to send to described FPGA behind continuous a plurality of tune-up data bags with described tune-up data file declustering;
Described CPU sends to described FPGA according to the corresponding configuration information that described debug command will comprise delivery time, wherein said configuration information also comprises MAC Address, IP address, the port numbers of described control PC and the size that sends data volume except comprising described delivery time;
The configuration module of described FPGA receives the configuration information of described CPU, and is configured, and the Ethernet processing module of described FPGA receives described tune-up data bag, extracts the tune-up data of described tune-up data bag, and described tune-up data is write described memory modules;
Described optical interface processing module reads described tune-up data at described delivery time repeatedly according to the size that sends data volume, and sends to described optical module;
Described optical module carries out described tune-up data to send to integrated circuit board to be debugged after the photosignal conversion;
Testing procedure comprises as shown in Figure 3:
Described control PC sends test instruction to the CPU of described accent test integrated circuit board;
Described CPU sends to described FPGA according to the corresponding configuration information that described test instruction will comprise the time of reception, described configuration information also comprises the size of MAC Address, IP address, port numbers and the receive data amount of described control PC except comprising the described time of reception;
The configuration module of described FPGA receives the configuration information of described CPU, and is configured;
Described optical interface processing module receives the data of integrated circuit board interface to be tested in the described time of reception by optical module, and receives test data according to the size of described receive data amount and form test data, and is stored in described memory modules;
Described Ethernet processing module reads described test data, and packing formation test packet, sends to described control PC;
Described control PC receives described test packet, and is stored in the local test data file.
In debugging step and testing procedure, the RRU of described CPU configuration FPGA receives and dispatches constantly, and the BBU of described CPU configuration FPGA receives and dispatches constantly when transferring test RRU integrated circuit board.
Among the present invention, adopt optical interface and treat and carry out the sending and receiving tune-up data between the accent test integrated circuit board, and by the control transmitting-receiving constantly, can realize that the analog BBU function provides data source to RRU and gathers the data of RRU, also can realize simulating the data that the RRU function provides data source to BBU and gathers BBU, not only can under the veneer environment, debug BBU and RRU, also can under the complete machine environment, debug, flexibility is good, workable, does not also need extra interface to cooperate in the complete machine environment.
The above only is preferred embodiment of the present invention, and is in order to limit the present invention, within the spirit and principles in the present invention not all, any modification of making, is equal to replacement, improvement etc., all should be included within the scope of protection of the invention.
Claims (10)
1. an accent testing apparatus that is used for the remote radio base station is characterized in that, comprises transferring test integrated circuit board and control PC; Wherein,
Described accent test integrated circuit board comprises CPU, FPGA, memory modules and optical module;
Wherein, described CPU is used for receiving debugging or the test instruction of described control PC and will comprises that transmitting-receiving corresponding configuration information constantly sends to described FPGA;
Described FPGA comprises the functional modules such as configuration module, Ethernet processing module, optical interface processing module and control module; Wherein, described configuration module is used for receiving the configuration information of described CPU and being configured; Described Ethernet processing module is used for receiving the tune-up data bag that described control PC sends, and extracts the tune-up data of described tune-up data bag, perhaps the test data that gathers is split to send to described control PC after being packaged as test packet; Described optical interface processing module is used for constantly receiving by described optical module in described transmitting-receiving the test data of described integrated circuit board interface to be tested, or reads tune-up data and send to described optical module by described control module; Described control module is used for inner each the module work of scheduling FPGA;
Described optical module is connected with RRU with described BBU by optical fiber, is used for the conversion of photosignal, and realize transferring the test integrated circuit board with wait to transfer data between the test integrated circuit board alternately;
Memory modules is used for the described tune-up data of buffer memory or test data;
Described control PC is used for sending debugging or test instruction to the CPU of described accent test integrated circuit board, and control the read operation of local tune-up data file, be to send to described accent test integrated circuit board behind continuous a plurality of tune-up data bags with described local tune-up data file declustering, and receive the test packet of exporting after described accent test integrated circuit board collection and the packing, and be stored in the local test data file.
2. accent testing apparatus according to claim 1 is characterized in that, described configuration information also comprises the size of MAC Address, IP address, port numbers and the amount of transmitting and receive data of described control PC except comprising described transmitting-receiving constantly.
3. accent testing apparatus according to claim 2 is characterized in that, described optical interface processing module also is used for repeatedly reading tune-up data according to the size of described transmission data volume; Described optical interface processing module also is used for receiving test data according to the size of receive data amount.
4. accent testing apparatus according to claim 3 is characterized in that, the RRU that described CPU also is used for configuration FPGA when transferring test b BU integrated circuit board receives and dispatches constantly, and the BBU of configuration FPGA receives and dispatches constantly when transferring test RRU integrated circuit board.
5. accent testing apparatus according to claim 1 is characterized in that, test board card interface described to be transferred is the IR interface, and described tune-up data bag and test packet are the UDP message bag.
6. one kind based on the accent method of testing such as the described accent testing apparatus of claim 1 to 5, comprises debugging step and testing procedure, wherein,
Described debugging step comprises:
Described control PC sends debug command to the CPU of described accent test integrated circuit board, read local tune-up data file simultaneously, and be to send to described FPGA behind continuous a plurality of tune-up data bags with described tune-up data file declustering;
Described CPU sends to described FPGA according to the corresponding configuration information that described debug command will comprise delivery time;
The configuration module of described FPGA receives the configuration information of described CPU and is configured, and the Ethernet processing module of described FPGA receives described tune-up data bag, extracts the tune-up data of described tune-up data bag, and described tune-up data is write described memory modules;
Described optical interface processing module reads described tune-up data at described delivery time, and sends to described optical module;
Described optical module carries out described tune-up data to send to integrated circuit board to be debugged after the photosignal conversion;
Described testing procedure comprises:
Described control PC sends test instruction to the CPU of described accent test integrated circuit board;
Described CPU sends to described FPGA according to the corresponding configuration information that described test instruction will comprise the time of reception;
The configuration module of described FPGA receives the configuration information of described CPU and is configured;
Described optical interface processing module receives the data formation test data of integrated circuit board interface to be tested in the described time of reception by optical module, and is stored in described memory modules;
Described Ethernet processing module reads described test data, and packing formation test packet, sends to described control PC;
Described control PC receives described test packet, and is stored in the local test data file.
7. method according to claim 6 is characterized in that, in the described debugging step, described configuration information also comprises MAC Address, IP address, the port numbers of described control PC and the size that sends data volume except comprising described delivery time;
In the described testing procedure, described configuration information also comprises the size of MAC Address, IP address, port numbers and the receive data amount of described control PC except comprising the described time of reception.
8. method according to claim 7 is characterized in that, in the described debugging step, described optical interface processing module reads described tune-up data at described delivery time repeatedly according to the size that sends data volume, and sends to described optical module;
In the described testing procedure, described optical interface processing module receives test data according to the size of described receive data amount.
9. method according to claim 8 is characterized in that, the RRU of described CPU configuration FPGA receives and dispatches constantly when transferring test b BU integrated circuit board, and the BBU of described CPU configuration FPGA receives and dispatches constantly when transferring test RRU integrated circuit board.
10. method according to claim 1 is characterized in that, described integrated circuit board interface to be tested is the IR interface, and described tune-up data bag and test packet are the UDP message bag.
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CN106937314B (en) * | 2015-12-29 | 2020-01-31 | 普天信息技术有限公司 | IR interface remote monitoring system and method for radio remote base stations |
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CN107453823B (en) * | 2017-07-31 | 2021-02-02 | 武汉虹信科技发展有限责任公司 | Single body test system and method for optical fiber distributed repeater |
CN111147334A (en) * | 2019-12-31 | 2020-05-12 | 北京信而泰科技股份有限公司 | Network tester |
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CN113726456A (en) * | 2020-05-26 | 2021-11-30 | 大唐移动通信设备有限公司 | Detection method of radio remote unit and radio remote unit |
CN113726456B (en) * | 2020-05-26 | 2023-05-05 | 大唐移动通信设备有限公司 | Detection method of remote radio unit and remote radio unit |
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