CN107369663A - A kind of chip of fan-out package structure for possessing front salient point and preparation method thereof - Google Patents

A kind of chip of fan-out package structure for possessing front salient point and preparation method thereof Download PDF

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Publication number
CN107369663A
CN107369663A CN201710742257.8A CN201710742257A CN107369663A CN 107369663 A CN107369663 A CN 107369663A CN 201710742257 A CN201710742257 A CN 201710742257A CN 107369663 A CN107369663 A CN 107369663A
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China
Prior art keywords
chip
heat
fan
salient point
package structure
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CN201710742257.8A
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Chinese (zh)
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崔成强
杨斌
赖韬
张昱
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Guangdong University of Technology
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Guangdong University of Technology
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Priority to CN201710742257.8A priority Critical patent/CN107369663A/en
Publication of CN107369663A publication Critical patent/CN107369663A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3731—Ceramic materials or glass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3736—Metallic materials
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    • H01—ELECTRIC ELEMENTS
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/023—Redistribution layers [RDL] for bonding areas
    • H01L2224/0237—Disposition of the redistribution layers
    • H01L2224/02379—Fan-out arrangement
    • H—ELECTRICITY
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
    • H—ELECTRICITY
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H01L2224/141—Disposition
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73267—Layer and HDI connectors
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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  • Ceramic Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

This application discloses a kind of chip for the fan-out package structure for possessing front salient point, including heat-radiating substrate, the front of the heat-radiating substrate offers at least one chip slot, chip body is bonded with the chip slot, the front and side of the chip body, the front of the heat-radiating substrate is all covered with dielectric layer, the chip body is positively connected with copper bump, the copper bump is connected to positioned at the positive metal ball of the heat-radiating substrate using by the positive metallic circuit of the dielectric layer, the front of the metallic circuit is provided with protective layer in addition to the position of the metal ball.Above-mentioned chip of fan-out package structure for possessing front salient point and preparation method thereof, the radiating effect of chip can be effectively improved on the basis of low cost, optimize configuration, and without lead frame.

Description

A kind of chip of fan-out package structure for possessing front salient point and preparation method thereof
Technical field
The invention belongs to chip encapsulation technology field, more particularly to a kind of fan-out package structure for possessing front salient point Chip and preparation method thereof.
Background technology
At present, electronic information technology has been deep into the every field of national economy, and the daily life with us ceases manner of breathing Close.Microelectronics IC chip encapsulation technology refers to each element and chip composition electronic building brick, module, will by defined circuit Reasonable Arrangement, assembling, bonding, interconnection are asked, and is isolated with external environment condition, so as to reach a kind of comprehensive Design of protection and manufacture skill Art.Different encapsulation technologies is widely different in manufacturing process and process aspect, to the performance of memory chip self performance after encapsulation Also function to vital effect.With the rapid development of photoelectricity, micro- electric manufacturing process technology, electronic product is all the time towards more Small, lighter and less expensive direction is developed, therefore the packing forms of chip component are also continuously available improvement.
In existing chip-packaging structure, chip is wrapped in injection molding body mostly, mainly the gold by being connected with chip Category carries out heat transfer with extraneous, and heat-sinking capability is limited, and this sufferings can influence the stability of chip operation.A kind of prior art is modeling Expect that the encapsulation that substrate material is chip bearing bottom plate, particularly ball type array encapsulation more and use plastic base material, but due to modeling Expect that the heat conductivility of substrate in itself is poor, cause radiating effect bad, also prior art realizes electricity interconnection using metal wire Encapsulating structure, chip being bonded on loading plate by macromolecule epoxy resin material more, the radiating effect of resin in itself is poor, Chip mainly passes through the metallic particles added in resin and carries out heat transfer, and metal is selected to reach more preferable radiating effect The higher synthetic resin of grain proportion, the relative drop of resin ratio is caused, it is viscous between chip, loading plate to reduce it Power is tied, and then the reliability such as layering caused by the high stress residual that cohesive force is not strong, metallic particles is brought at high proportion occurs Problem, is also limited and the semiconductor packages of poor heat radiation by the encapsulating structure of itself, also there is the side using high heat conduction plastic packaging material Formula improves radiating effect, but high heat conduction plastic packaging material is in addition to high cost price itself, the control to product plastic package process It it is also proposed higher requirement, and radiating effect unobvious.
The content of the invention
To solve the above problems, the invention provides a kind of chip of fan-out package structure for possessing front salient point and its Preparation method, the radiating effect of chip can be effectively improved on the basis of low cost, optimize configuration, and without lead frame Frame.
A kind of chip of fan-out package structure for possessing front salient point provided by the invention, including heat-radiating substrate, it is described The front of heat-radiating substrate offers at least one chip slot, and chip body is bonded with the chip slot, the chip body Front and side, the front of the heat-radiating substrate are all covered with dielectric layer, and the chip body is positively connected with copper bump, institute Copper bump is stated to be connected to positioned at the positive metal ball of the heat-radiating substrate using by the positive metallic circuit of the dielectric layer, The front of the metallic circuit is provided with protective layer in addition to the position of the metal ball.
Preferably, in the chip of the above-mentioned fan-out package structure for possessing front salient point, the heat-radiating substrate is copper-based Plate or ceramic substrate.
Preferably, in the chip of the above-mentioned fan-out package structure for possessing front salient point, the chip body utilizes Die-Attach glue is Nian Jie with the chip slot.
Preferably, in the chip of the above-mentioned fan-out package structure for possessing front salient point, the thickness of the heat-radiating substrate Scope is 0.5 millimeter to 5.0 millimeters.
Preferably, in the chip of the above-mentioned fan-out package structure for possessing front salient point, the dielectric layer be ABF layers, Bcb layer or PI layers.
Preferably, in the chip of the above-mentioned fan-out package structure for possessing front salient point, the metallic circuit is copper cash Or silver wire.
A kind of preparation method of the chip of fan-out package structure for possessing front salient point provided by the invention, including：
At least one chip slot is opened up in the front of heat-radiating substrate；
Adhering chip body in the chip slot, in the front implantation copper bump of the chip body；
The front of the chip body and side, the front of the heat-radiating substrate cover dielectric layer；
Metal seed layer, and plating metal circuit are made in the dielectric layer surface；
Need parts to be protected to cover photoresistance film in the metallic circuit, etch away the metal wire for being not required to area to be protected Road and metal seed layer, and remove the photoresistance film；
Protective layer is set in the front of the metallic circuit, is reserved in the front of the heat-radiating substrate and plants ball region, and In ball placement region implanted metal ball, the copper bump is connected to position using by the positive metallic circuit of the dielectric layer In the positive metal ball of the heat-radiating substrate；
Unnecessary dielectric layer is removed, cuts out one single chip.
Preferably, it is described to dissipate in the preparation method of the chip of the above-mentioned fan-out package structure for possessing front salient point The front of hot substrate opens up at least one chip slot：
At least one chip slot is opened up in the front of copper base or ceramic substrate.
By foregoing description, the chip of the above-mentioned fan-out package structure for possessing front salient point provided by the invention and Its preparation method, because the chip includes heat-radiating substrate, the front of the heat-radiating substrate offers at least one chip slot, described Chip body is bonded with chip slot, the front of the chip body and side, the front of the heat-radiating substrate are all covered with being situated between Electric layer, the chip body are positively connected with copper bump, and the copper bump utilizes the positive metal by the dielectric layer Connection is to the positive metal ball of the heat-radiating substrate is located at, and the front of the metallic circuit is except the position of the metal ball Outside be provided with protective layer, therefore the radiating effect of chip can be effectively improved on the basis of low cost, optimize circuit cloth Office, and without lead frame.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing There is the required accompanying drawing used in technology description to be briefly described, it should be apparent that, drawings in the following description are only this The embodiment of invention, for those of ordinary skill in the art, on the premise of not paying creative work, can also basis The accompanying drawing of offer obtains other accompanying drawings.
Fig. 1 is the signal of the chip for the fan-out package structure that the first that the embodiment of the present application provides possesses front salient point Figure；
Fig. 2 is the making of the chip for the fan-out package structure that the first that the embodiment of the present application provides possesses front salient point The schematic diagram of method.
Embodiment
The core concept of the present invention is to provide a kind of chip and its system of the fan-out package structure for possessing front salient point Make method, the radiating effect of chip can be effectively improved on the basis of low cost, optimize configuration, and without lead frame Frame.
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete Site preparation describes, it is clear that described embodiment is only part of the embodiment of the present invention, rather than whole embodiments.It is based on Embodiment in the present invention, those of ordinary skill in the art are obtained every other under the premise of creative work is not made Embodiment, belong to the scope of protection of the invention.
The embodiment of the present application provide the first possess front salient point fan-out package structure chip as shown in figure 1, Fig. 1 be the embodiment of the present application provide the first possess front salient point fan-out package structure chip schematic diagram, the core Piece includes heat-radiating substrate 1, and the material of the heat-radiating substrate 1 can be but not limited to copper or ceramics, is dissipated as long as there is sufficiently high Hot property, the front of the heat-radiating substrate 1 offer at least one chip slot 2, and the chip slot 2 opened up here can be two More than individual, this is decided according to the actual requirements, and is not intended to limit herein, and the depth and width of chip slot are not intended to limit, described Chip body 3 is bonded with chip slot 2, this mode that direct adhering chip body is slotted on heat-radiating substrate can be realized more Good radiating effect, and need to stress, using this programme, it becomes possible to opened up on same substrate with difference The chip slot of size, so as to place different types of chip body, encapsulated while realizing various chips body, greatly improve envelope Efficiency is filled, can also reduce the overall volume of encapsulating structure, the front of the chip body 3 and side, the heat-radiating substrate 1 are just Face is all covered with dielectric layer 4, and the chip body 1 is positively connected with copper bump 5, and the copper bump 5 is using by being given an account of The positive metallic circuit of electric layer 4 is connected to positioned at the positive metal ball 6 of the heat-radiating substrate 1, the front of the metallic circuit Protective layer 7 is provided with addition to the position of the metal ball 6, in this case, heat caused by chip body can be with It is directly transferred on heat-radiating substrate, then outside is transmitted to by heat-radiating substrate, without the resistance of epoxy resin or other heat-barrier materials Gear, realize more quickly radiating.
By foregoing description, the embodiment of the present application provide the first possess the fan-out package structure of front salient point Chip, because the front including heat-radiating substrate, the heat-radiating substrate offers at least one chip slot, glued in the chip slot Chip body is connected to, the front of the chip body and side, the front of the heat-radiating substrate are all covered with dielectric layer, the core Piece body is positively connected with copper bump, and the copper bump is connected to position using by the positive metallic circuit of the dielectric layer In the positive metal ball of the heat-radiating substrate, the front of the metallic circuit is provided with addition to the position of the metal ball Protective layer, therefore the radiating effect of chip can be effectively improved on the basis of low cost, optimize configuration, and without lead Framework.
The chip for second of fan-out package structure for possessing front salient point that the embodiment of the present application provides, it is above-mentioned the On the basis of a kind of chip for the fan-out package structure for possessing front salient point, in addition to following technical characteristic：
The heat-radiating substrate is copper base or ceramic substrate.
Because the heat conductivility of copper and ceramics is splendid, therefore using the radiating effect meeting of copper base or ceramic substrate to chip Greatly improve, and by chip directly placed on copper base or ceramic substrate, it is not necessary to custom lead-frame, and can be according to need Ask and carry out multiple same cake cores, even more than loading in mixture for different model chip, reduce manufacturing cost, improve the production effect of chip Rate.
The embodiment of the present application provide the third possess front salient point fan-out package structure chip, be above-mentioned the On the basis of a kind of chip for the fan-out package structure for possessing front salient point, in addition to following technical characteristic：
The chip body is Nian Jie with the chip slot using Die-Attach glue.
It should be noted that the DA glue (Die-Attach glue) that this preferred scheme uses is chip attachment glue, it is led It is epoxy resin, silver powder and other additives to want composition, and the effect primarily served is adhering chip and substrate, its conductive and heat conduction Performance is more preferable, so as to further realize the good radiating effect of chip.
The chip for the 4th kind of fan-out package structure for possessing front salient point that the embodiment of the present application provides, it is above-mentioned the On the basis of a kind of chip for the fan-out package structure for possessing front salient point, in addition to following technical characteristic：
The thickness range of the heat-radiating substrate is 0.5 millimeter to 5.0 millimeters.
It should be noted that heat-radiating substrate can not be too thick, the stop to heat is thus reduced to greatest extent, can not be too It is thin, thus guarantee to set chip slot thereon, therefore this scheme is generally preferred to 0.5 millimeter to 5.0 millimeters, takes into account Radiating and the aspect of processing two.
The chip for the 5th kind of fan-out package structure for possessing front salient point that the embodiment of the present application provides, it is above-mentioned the On the basis of a kind of chip for the fan-out package structure for possessing front salient point, in addition to following technical characteristic：
The dielectric layer is ABF layers, bcb layer or PI layers.
Wherein, the ABF layers are laminated plates dielectric resin material, and the bcb layer is benzocyclobutene insulating resin material Material, the PI layers are polyimide composite insulated material.
The chip for the 6th kind of fan-out package structure for possessing front salient point that the embodiment of the present application provides, it is above-mentioned the In a kind of chip to the 5th kind of fan-out package structure for possessing front salient point it is any on the basis of, in addition to following technology Feature：
The metallic circuit is copper cash or silver wire.
It should be noted that this copper cash or silver wire have more preferable heat dispersion, thus can be preferably here this two Kind, the metallic circuit of other kinds of perfect heat-dissipating can also be selected certainly, be not intended to limit herein.
The preparation method that the first of the embodiment of the present application offer possesses the chip of the fan-out package structure of front salient point As shown in Fig. 2 Fig. 2 is the system of the chip for the fan-out package structure that the first that the embodiment of the present application provides possesses front salient point Make the schematic diagram of method, this method comprises the following steps：
S1：At least one chip slot is opened up in the front of heat-radiating substrate；
Wherein, chip groove depth is the thickness that chip height adds adhesive glue, and the chip slot opened up here can be two More than, it is decided according to the actual requirements, there can also be various sizes of chip slot simultaneously, adapts to various sizes of chip sheet Body, to improve producing efficiency.
S2：Adhering chip body in the chip slot, in the front implantation copper bump of the chip body；
Specifically, being coated in chip slot, DA is viscous and glue, chip body is mounted in chip slot so that chip body Upper surface and the upper surface flush of heat-radiating substrate.
S3：The front of the chip body and side, the front of the heat-radiating substrate cover dielectric layer；
Specifically, the dielectric layer above copper bump can be removed with laser, expose copper bump.
S4：Metal seed layer, and plating metal circuit are made in the dielectric layer surface；
Metalized is carried out to the upper and lower surface of substrate first, makes metal seed layer so that subsequently it can be entered Row plating metal circuit, metal seed layer electroplating surface layer of conductive material (such as copper, silver), then covers photoresistance film, is needing Metallic circuit part up and down to be protected covers one layer of photoresistance film；Unnecessary copper is etched away, is etched away unprotected outside photoresistance film Metal；Fast-etching metal layer, fast-etching is carried out to substrate surface, removes the metal layer in addition to metallic circuit； Remove photoresistance film.
S6：Protective layer is set in the front of the metallic circuit, is reserved in the front of the heat-radiating substrate and plants ball region, And it is connected in ball placement region implanted metal ball, the copper bump using by the positive metallic circuit of the dielectric layer Positioned at the positive metal ball of the heat-radiating substrate；
It should be noted that this protective layer can be thermosetting polymer, circuit can be carried out and be effectively protected.
S7：Unnecessary dielectric layer is removed, cuts out one single chip.
Material is thus formed one chip product one by one.
The preparation method of the chip for second of fan-out package structure for possessing front salient point that the embodiment of the present application provides, Be it is above-mentioned the first possess front salient point fan-out package structure chip preparation method on the basis of, it is in addition to as follows Technical characteristic：
It is described to open up at least one chip slot in the front of heat-radiating substrate and be：
At least one chip slot is opened up in the front of copper base or ceramic substrate.
Because the heat conductivility of copper and ceramics is splendid, therefore using the radiating effect meeting of copper base or ceramic substrate to chip Greatly improve, and by chip body directly against on copper base or ceramic substrate, it is not necessary to custom lead-frame, and can root Multiple same cake core bodies are carried out according to demand, even more than loading in mixture for different model chip body, manufacturing cost is reduced, improves The production efficiency of chip.
The foregoing description of the disclosed embodiments, professional and technical personnel in the field are enable to realize or using the present invention. A variety of modifications to these embodiments will be apparent for those skilled in the art, as defined herein General Principle can be realized in other embodiments without departing from the spirit or scope of the present invention.Therefore, it is of the invention The embodiments shown herein is not intended to be limited to, and is to fit to and principles disclosed herein and features of novelty phase one The most wide scope caused.

Claims (8)

  1. A kind of 1. chip for the fan-out package structure for possessing front salient point, it is characterised in that including heat-radiating substrate, the radiating The front of substrate offers at least one chip slot, and chip body, the front of the chip body are bonded with the chip slot Dielectric layer is all covered with the front of side, the heat-radiating substrate, the chip body is positively connected with copper bump, the copper Salient point is connected to positioned at the positive metal ball of the heat-radiating substrate using by the positive metallic circuit of the dielectric layer, described The front of metallic circuit is provided with protective layer in addition to the position of the metal ball.
  2. 2. the chip of the fan-out package structure according to claim 1 for possessing front salient point, it is characterised in that described to dissipate Hot substrate is copper base or ceramic substrate.
  3. 3. the chip of the fan-out package structure according to claim 1 for possessing front salient point, it is characterised in that the core Piece body is Nian Jie with the chip slot using Die-Attach glue.
  4. 4. the chip of the fan-out package structure according to claim 1 for possessing front salient point, it is characterised in that described to dissipate The thickness range of hot substrate is 0.5 millimeter to 5.0 millimeters.
  5. 5. the chip of the fan-out package structure according to claim 1 for possessing front salient point, it is characterised in that given an account of Electric layer is ABF layers, bcb layer or PI layers.
  6. 6. the chip of the fan-out package structure for possessing front salient point according to claim any one of 1-5, its feature exist In the metallic circuit is copper cash or silver wire.
  7. A kind of 7. preparation method of the chip for the fan-out package structure for possessing front salient point, it is characterised in that including：
    At least one chip slot is opened up in the front of heat-radiating substrate；
    Adhering chip body in the chip slot, in the front implantation copper bump of the chip body；
    The front of the chip body and side, the front of the heat-radiating substrate cover dielectric layer；
    Metal seed layer, and plating metal circuit are made in the dielectric layer surface；
    The metallic circuit need parts to be protected cover photoresistance film, etch away be not required to area to be protected metallic circuit and Metal seed layer, and remove the photoresistance film；
    Protective layer is set in the front of the metallic circuit, is reserved in the front of the heat-radiating substrate and plants ball region, and in institute State and plant ball region implanted metal ball, the copper bump is connected to positioned at institute using by the positive metallic circuit of the dielectric layer State the positive metal ball of heat-radiating substrate；
    Unnecessary dielectric layer is removed, cuts out one single chip.
  8. 8. the preparation method of the chip of the fan-out package structure according to claim 7 for possessing front salient point, its feature It is, it is described to open up at least one chip slot in the front of heat-radiating substrate and be：
    At least one chip slot is opened up in the front of copper base or ceramic substrate.
CN201710742257.8A 2017-08-25 2017-08-25 A kind of chip of fan-out package structure for possessing front salient point and preparation method thereof Pending CN107369663A (en)

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CN1543675A (en) * 2000-12-15 2004-11-03 ض� Microelectronic package having a bumpless laminated interconnection layer
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Application publication date: 20171121