CN107342322A - 半导体装置的鳍状结构以及鳍式场效晶体管装置 - Google Patents
半导体装置的鳍状结构以及鳍式场效晶体管装置 Download PDFInfo
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Abstract
本发明公开一种半导体装置的鳍状结构以及鳍式场效晶体管装置。该半导体装置的鳍状结构,例如鳍式场效晶体管(FinFET)结构,具有第一半导体层、第二半导体层以及位于第一半导体层与第二半导体层之间的空气间隔。空气间隔可防止漏电。鳍式场效晶体管装置可由先进行掘入再进行外延再成长的方式形成源极/漏极鳍,而此再成长可开始于一管状空气间隔的上方。
Description
技术领域
本发明涉及一种半导体装置以及半导体装置的制造方法,尤其是涉及一种鳍式场效晶体管(fin-type field effect transistor)装置以及其制造方法。
背景技术
按比例缩小化的半导体装置已应用于各种类型的场效晶体管。在此些装置的微缩已导向电性以及制作工艺的极限时,需开发其他技术来维持或/及达到所需的效能。其中,鳍式场效晶体管(fin-type field effect transistor,FinFET)装置被开发用以在栅极尺寸缩减的状态下维持或/及达到更佳的效能。例如于美国专利号US 9,123,744中公开的鳍式场效晶体管装置,而US 9,123,744的全部公开内容通过引用并入本文。
在现今的电子装置(包括鳍式场效晶体管装置)的主要问题在于漏电。现有可于半导体装置中导入绝缘层覆硅(silicon-on-insulator,SOI)结构来减少漏电,例如于美国专利号US 8,395,217中所公开的SOI结构。SOI结构相对来说较昂贵,且SOI结构还尚未能相容于现已普及使用的块材基底结构。
本发明可对上述现有装置及方法的缺点提供很大程度的改善。
发明内容
依据本发明的一层面,一种半导体装置的鳍状结构包括一第一半导体材料、一空气间隔以及一第二半导体材料。举例来说,该半导体装置可为鳍式场效晶体管(fin-typefield effect transistor,FinFET)装置。该第一半导体材料可为例如一成长于鳍的凹陷内的外延材料,该第二半导体材料可为例如一基底材料,而该空气间隔可位于该第一半导体材料与该第二半导体材料之间。
依据本发明的另一层面,该空气间隔可具有一管状型态。该空气间隔可具有一中心轴平行于该鳍状结构中自源极区至一漏极区的方向。该空气间隔可减少关于该鳍状结构的漏电。如果需要的话,该空气间隔的剖面形状可似具有两尖端的柠檬形状或一橄榄形状。
依据本发明的另一层面,该第一半导体材料可位于一下凹陷部,且该下凹陷部具有一向上开口角介于10度至55度。
依据本发明的另一层面,一个或多个该鳍状结构可存在于一鳍式场效晶体管装置中,特别是未具有绝缘层覆硅(silicon-on-insulator,SOI)结构的鳍式场效晶体管装置,以及特别是通过先掘入再外延再成长形成一个或多个源极/漏极鳍的制造方式形成的鳍式场效晶体管装置。
依据本发明的另一层面,该第一半导体材料包括一磷化硅(SiP)缓冲层位于该空气间隔上方,且一磷化硅基体层成长于位于该磷化硅缓冲层上。如果需要的话,该磷化硅基体层的一部分可形成一对称的铲状部。
本发明的其他特征、实施例以及其他额外层面可参考详细的实施方式以及附图内容。此外,必须了解的是,上述的发明内容以及后述的实施方式仅为范例用以提供更进一步说明而并未对本发明的范围构成限制。
在此所述的制作工艺步骤、方法步骤或类似者的进行顺序可在可施行的状态下进行顺序调整。换句话说,在此说明的步骤顺序并不意味此些步骤必须以此顺序施行。在此说明的制作工艺与方法的步骤可以任何可行的顺序执行。此外,除了特别有说明不行,否则部分的步骤也可同步进行。
附图说明
图1为本发明的一层面的鳍式场效晶体管装置的结构透视示意图(为了清楚说明而简化);
图2为沿图1中剖线2-2所绘示之处于制造过程中状态的鳍式场效晶体管装置的两相邻鳍的细部剖视图;
图3为沿图1中剖线2-2所绘示之处于图2之后的制造过程中状态的该多个鳍的剖视图。
符号说明
10 鳍式场效晶体管装置
12 基底
14 栅极
16 鳍
20 源极区
22 漏极区
26 浅沟隔离区
40 凹陷部
42 下凹陷部
44 墙
46 墙
48 氮化硅层
50 氮碳化硅层
52 氮碳化硅层
60 上端
62 上端
64 限制间隙物高度
65 节距
67 界面
68 底面
70 磷化硅缓冲层
72 磷化硅基体层
74 铲状部
80 侧壁
82 侧壁
100 空气间隔
102 中心轴
θ 向上开口角
具体实施方式
请参考附图,其中元件以参考数字及符号标示,而图1为依据本发明的一层面的鳍式场效晶体管装置10的结构。鳍式场效晶体管装置10具有一硅基底(基底12)、一栅极14以及三个鳍16,各鳍16硅延伸穿过栅极14且具有相对的源极区20与漏极区22。本发明并不以此附图结构为限。例如,本发明的鳍式场效晶体管装置可具有一个、两个或多于三个的鳍16。
如果需要的话,基底12可由单晶硅材料或一外延硅材料所形成。如果需要的话,基底12可由一个或多个其他材料所形成,此材料可包括但不限于锗化硅(SiGe)、碳化硅(SiC)与砷化镓(GaAs)。多个鳍16的下部通过多个浅沟隔离(shallow trench isolation,STI)区26彼此分开。各浅沟隔离区26的表面的剖面形状可如图2与图3所示的碗形或V字形。各鳍16于剖线2-2的方向上的节距65可为例如480埃(angstrom)。
图2为两个鳍16于一制造过程中的状态。在所绘示的状态下,各个鳍16已经过数道制作工艺,此些制作工艺较佳可包括但不限于依此顺序的一垂直硅蚀刻制作工艺、一侧向硅蚀刻制作工艺以及一额外氧等离子体制作工艺。
在各个鳍16中,一个大体上为直线形成的凹陷部40于该垂直蚀刻制作工艺中形成。一下凹陷部42于该侧向硅蚀刻制作工艺中形成。下凹陷部42的底面68应远深于墙44以及墙46(墙44以及墙46也可被视为间隙子)与浅沟隔离区26之间的界面67。举例来说,底面68可比界面67更深约60至140埃。凹陷部40与下凹陷部42与介电间隙物的墙44与墙46相连。各个墙44与墙46可具有一氮化硅(SiN)层48(可被视为一硬掩模)、一氮碳化硅层50(可被视为一硬掩模)以及第二个氮碳化硅层52(可被视为一密封层)。凹陷部40与下凹陷部42可作为例如图1所示的鳍式场效晶体管装置10的源极/漏极凹陷。
上述的额外氧等离子体制作工艺可使用高温等离子体且其目的在于移除凹陷部40与下凹陷部42内的杂质,此杂质可包括但不限于光致抗蚀剂、由主蚀刻制作工艺产生的碳-氢-氟-溴-氮-硅(C-H-F-Br-N-Si)型聚合物、由沉积制作工艺所产生的碳-氢(C-H)型聚合物、由过蚀刻制作工艺所产生的碳-氢-氟-氮-硅(C-H-F-N-Si)型聚合物、由垂直蚀刻制作工艺所产生的碳-氢-溴-硅(C-H-Br-Si)型聚合物以及由侧向蚀刻制作工艺所产生的碳-氢-氯-氟-硅(C-H-Cl-F-Si)型聚合物。
额外氧等离子体制作工艺比一临场(in-situ)氧剥离(O2-strip)制作工艺更适合。临场氧剥离制作工艺可于垂直蚀刻制作工艺或/及侧向蚀刻制作工艺中执行,且临场氧剥离制作工艺容易产生过度氧化而因此造成作为间隙子的墙44与墙46的上端60与上端62(特别是作为间隙材料的氮化硅层48)过度劣化。特别是,临场氧剥离制作工艺容易使得墙44与墙46的限制间隙物高度(constrain spacer heights,CSH)64变小而导致不一致的现象。不同的鳍16的可能会经历无法预期的不一致的限制间隙物高度64的损失。此不一致的高度缩减(Δ CSH)可能使得后续外延成长的磷化硅的差排(dislocation)、叠差(stackingfaults)发生异常(例如不对称)的状况,进而导致元件劣化、漏极引致势垒下降(drain-induced barrier lowering,DIBL)、基体漏电(bulk leakage,Isb)以及自对准接触(self-aligned contact,SAC)形成不完全或形成不良等问题。
在本发明中,位于各个鳍16的墙44与墙46上的外延成长物(例如图3中标示74的物体)应较佳为对称的形状,例如在其剖面上可为铲状、六边形、八边形或其他的形状。在图3所绘示的例子中,多个铲状部(也就是铲状部74)并未彼此合并。在一替代实施例中,多个铲状部可彼此相连合并。
上述于侧向蚀刻制作工艺之后进行的额外氧等离子体制作工艺并不会导致作为间隙子的墙44与墙46的上端60与上端62(如图2所示)产生过度劣化。上端60与上端62在额外氧等离子体制作工艺中并不会如在上述的临场氧剥离制作工艺中那样程度地被氧化。因此,使用额外氧等离子体制作工艺可使鳍的墙44与墙46获得更一致且高的限制间隙物高度64。
此外,使用额外氧等离子体制作工艺可提供充分的清洁效率以维持下两者之间的关系处于可接受的状态:(1)下凹陷部42的向上开口角θ与(2)确保可避免异常(例如非对称)的缓冲成长。在本发明的一较佳实施例中,下凹陷部42的向上开口角θ的范围可约10度至约55度。因此,下凹陷部42的下部的剖面(如图2所示)为V字型且底面68处为弧面而非尖角。
另一方面,额外氧等离子体制作工艺可于下凹陷部42形成之后再进行,故可于下凹陷部42的底面68处产生一弱化氧化区。
请参考图3,在接续的制造步骤中,下凹陷部42中可生长成一磷化硅缓冲层70,且一磷化硅基体(SiP bulk)层72可接着于磷化硅缓冲层70上成长形成(自下而上式地)。磷化硅基体层72的成长于铲状部74形成之后停止。如果需要的话,可于磷化硅缓冲层70开始成长之前先进行一SiCoNi清洗制作工艺,用以移除下凹陷部42的表面的原生氧化物(nativeoxide)。
为了防止自鳍16通过下凹陷部42的底面68所产生的漏电,磷化硅缓冲层70自下凹陷部42的侧壁80与侧壁82以侧向并向内的方式成长而形成一空气间隔100。磷化硅缓冲层70通过空气间隔100与硅基底(也就是基底12)以一定程度分离(但非完全分离)。空气间隔100位于磷化硅缓冲层70与基底12之间。虽然于鳍的凹陷部的底面68未发生磷化硅生长,如果需要的话,位于空气间隔100另一面的少部分的磷化硅缓冲层70也可与基底12接触。在如图2所绘示的制造状态至如图3所绘示的制造状态中,在凹陷部40以及下凹陷部42中以及其上所进行的自下而上的磷化硅外延成长在未于鳍的凹陷部的底面68进行任何磷化硅成长的状况下进行。
如图3所示,空气间隔100位于磷化硅缓冲层70之下。空气间隔100可具有一管状型态并具有一中心轴102。空气间隔100可沿鳍16的整体长度延伸,除了鳍16被栅极14的墙所覆盖处。在各个鳍16中,空气间隔100的中心轴102平行于鳍16自鳍16的源极区20延伸至鳍16的漏极区22的方向。如图3所示,空气间隔100的剖面形状可似具有两尖端的柠檬形状或一橄榄形状。
在运作上,空气间隔100分离磷化硅缓冲层70(可被视为一第一半导体材料的一例)与硅基底(基底12,可被视为一第二半导体材料的一例)。在本发明所绘示的实施例中,空气间隔100占据了约20%至约80%的位于第一半导体材料(例如磷化硅缓冲层70)与第二半导体材料(例如基底12)之间的空间,且空气间隔100位于浅沟隔离区26的表面最低处以下的区域。其中,空气间隔100可用以降低鳍式场效晶体管装置10的基体漏电(Isb)。
美国专利号US 8,395,217(自此简称Cheng专利)已公开一种已知的方式,通过在半导体装置中控制外延成长来形成空气间隔。然而,依据Cheng专利的内容,其空气间隔形成于埋入介电层(buried dielectric,BOX)上且基于绝缘层覆硅(SOI)结构,且Cheng专利的空气间隔并未分离第一半导体材料与第二半导体材料。
相对于Cheng专利,如果需要的话,本发明可应用于不具有SOI结构的状态。如图1所示的本发明的鳍式场效晶体管装置10并不具有SOI结构,且也不具有关于鳍16的操作的埋入介电层,但本发明的鳍式场效晶体管装置10的确具有被空气间隔100形成互相分离的第一半导体材料(例如磷化硅缓冲层70)与第二半导体材料(例如基底12)。
本发明并不限于N型场效晶体管及其制作工艺。如果需要的话,本发明也可适用于P型场效晶体管(使用锗化硅SiGe)及其制作工艺。
以上所述仅为本发明的较佳实施例,凡依本发明权利要求所做的均等变化与修饰,皆应属本发明的涵盖范围。
Claims (17)
1.一种半导体装置的鳍状结构,包括:
第一半导体材料;
空气间隔;以及
第二半导体材料;
其中该空气间隔位于该第一半导体材料以及该第二半导体材料之间,且该第一半导体材料包括一外延材料。
2.如权利要求1所述的鳍状结构,其中该空气间隔具有一管状型态。
3.如权利要求2所述的鳍状结构,其中该鳍状结构沿一第一方向拉长,该第一半导体材料沿该第一方向延伸,且该空气间隔具有一中心轴平行于该第一方向。
4.如权利要求1所述的鳍状结构,还包括下凹陷部,其中该空气间隔位于该下凹陷部的底部。
5.如权利要求4所述的鳍状结构,其中该下凹陷部具有一向上开口锐角大于0度且小于90度。
6.如权利要求1所述的鳍状结构,其中该第二半导体材料包括一单晶硅。
7.如权利要求1所述的鳍状结构,其中该第一半导体材料包括一个或多个选自于硅、磷掺杂硅、锗化硅、碳化硅与砷化镓的材料。
8.一种鳍式场效晶体管装置,包括:
基底;
鳍,具有源极区与漏极区;以及
栅极,跨过该鳍;
其中该鳍包括第一半导体材料以及空气间隔,该基底包括一不同于该第一半导体材料的第二半导体材料,且该空气间隔位于该第一半导体材料以及该第二半导体材料之间。
9.如权利要求8所述的鳍式场效晶体管装置,其中该空气间隔具有一管状型态。
10.如权利要求9所述的鳍式场效晶体管装置,其中该鳍状结构沿一第一方向拉长,该栅极沿一与该第一方向正交的第二方向拉长,且该空气间隔具有一中心轴平行于该第一方向。
11.如权利要求10所述的鳍式场效晶体管装置,还包括下凹陷部,其中该第一半导体材料位于该第一下凹陷部中,该下凹陷部具有一向上开口角,该向上开口角介于10度至55度且位于一与该第一方向垂直的平面。
12.如权利要求8所述的鳍式场效晶体管装置,其中该第二半导体材料包括一单晶硅。
13.如权利要求8所述的鳍式场效晶体管装置,其中该第二半导体材料包括一个或多个选自于硅、锗化硅、碳化硅与砷化镓的材料。
14.如权利要求8所述的鳍式场效晶体管装置,还包括多个墙,用以定义出一源极/漏极凹陷,其中该第一半导体材料位于该多个墙之间。
15.如权利要求14所述的鳍式场效晶体管装置,其中该多个墙包括一个或多个的硬掩模与介电材料。
16.如权利要求14所述的鳍式场效晶体管装置,其中该第一半导体材料包括一磷化硅缓冲层,且该鳍式场效晶体管装置还包括一磷化硅基体层位于该磷化硅缓冲层上。
17.如权利要求16所述的鳍式场效晶体管装置,还包括一铲状部,其中该铲状部为该磷化硅基体层的一部分。
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