CN107317737A - One kind is based on SMBus/I2The communication system of C buses - Google Patents
One kind is based on SMBus/I2The communication system of C buses Download PDFInfo
- Publication number
- CN107317737A CN107317737A CN201710519289.1A CN201710519289A CN107317737A CN 107317737 A CN107317737 A CN 107317737A CN 201710519289 A CN201710519289 A CN 201710519289A CN 107317737 A CN107317737 A CN 107317737A
- Authority
- CN
- China
- Prior art keywords
- control
- interface
- circuit
- main control
- smbus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
- H04L12/40013—Details regarding a bus controller
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40052—High-speed IEEE 1394 serial bus
- H04L12/40078—Bus configuration
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Bus Control (AREA)
Abstract
SMBus/I is based on the embodiments of the invention provide one kind2The communication system of C buses, including main control device, I/O control chips, control switching circuit and at least two have the communication equipment of identical device address, and main control device is connected by LPC interfaces with I/O control chips, and main control device passes through SMBus or I2The connection of C buses and control switching circuit, control switching circuit passes through SMBus or I2C buses are also associated with described at least two communication equipments with identical device address；I/O control chips are connected with control switching circuit, the control instruction that I/O control chips are issued according to main control device is encoded to the control signal of control switching circuit, so that control switching circuit is according to the communication connection between the control signal switching main control device after coding and the communication equipment being connected with control switching circuit.The embodiment of the present invention can be controlled to device address identical equipment under SMBus/i2c buses, solve the problem of slave unit address is identical to cause access conflict.
Description
Technical field
SMBus/I is based on the present invention relates to technical field of circuit design, more particularly to one kind2The communication system of C buses.
Background technology
SMBus is that System Management Bus is two line interfaces.By it, between each equipment and equipment and system its
He can communicate between part.It is based on I2C operating principles.SMBus provides for the system task related to power management
One controlling bus.One system using SMBus can with multiple equipment transinformation, without using independent control line
Road.SMBus standards are related to three kind equipments.The equipment of slave unit, reception or response command.Main equipment, for issuing order, is produced
Clock and the equipment for terminating transmission.Main frame, is a kind of special main equipment, and it provides the main interface with system CPU.Main frame is necessary
With master-slave machine function, and SMBus must be supported to circulate a notice of agreement.Only allow have a main frame in a system.
SMBus/i2c communications are the most commonly used communication mode in the fields such as computer, industry control, communication, electronics, SMBus/
I2c is applied to the low rate communication in mobile PC and desktop PC systems.It is by a cheap and powerful bus
(being made up of two lines), the equipment come in control mainboard simultaneously collects corresponding information.
In process of the present invention is realized inventor find be in the prior art, under MBus/i2c buses identical equipment then from
The device address of equipment is identical to produce conflict, it is impossible to which realization is controlled to multiple identical device address equipment.
The content of the invention
In view of the above problems, it is proposed that the present invention so as to provide one kind overcome above mentioned problem or at least in part solve on
State the communication system based on SMBus/I2C buses of problem.
It is provided in an embodiment of the present invention to be based on SMBus/I2The communication system of C buses, including main control device, I/O control core
Piece, control switching circuit and at least two have the communication equipment of identical device address, and the main control device passes through LPC interfaces
It is connected with the I/O control chips, the main control device passes through SMBus or I2C buses and the connection of the control switching circuit,
The control switching circuit passes through SMBus or I2C buses are also associated with described at least two communications with identical device address
Equipment；
The I/O control chips are connected with the control switching circuit, and the I/O control chips are according to the main control device
The control instruction issued is encoded to the control signal of the control switching circuit, so that the control switching circuit is according to volume
Control signal after code switches the communication link between the main control device and the communication equipment being connected with the control switching circuit
Connect.
Wherein, when system include two have identical device address communication equipment when, the control switching circuit by
Multiplexer is realized.
Wherein, the multiplexer includes control interface, first via data-interface, the second circuit-switched data interface and the 3rd tunnel
Data-interface；The control interface is connected with general purpose I/O Interface gpio of the I/O control chips, and first circuit-switched data connects
Mouth passes through SMBus or I2C buses are connected with the main control device, the second circuit-switched data interface and the 3rd circuit-switched data the interface difference
Pass through SMBus or I2C buses are connected with described two communication equipments with identical device address；
When the control instruction that the I/O control chips are issued according to the main control device controls the control switching circuit
When control signal is high level, switches the first via data-interface and be connected with the second circuit-switched data interface, realize that master control is set
Communication connection between standby communication equipment corresponding with the second circuit-switched data interface；
When the control instruction that the I/O control chips are issued according to the main control device controls the control switching circuit
When control signal is low level, switches the first via data-interface and be connected with the 3rd circuit-switched data interface, realize that master control is set
Communication connection between standby communication equipment corresponding with the 3rd circuit-switched data interface.
Wherein, the control switching circuit includes multiple control sub-circuits, the main control device respectively by SMBus or
I2C buses are connected with each control sub-circuit, and each control sub-circuit passes through SMBus or I2C buses correspondence is connected with a communication
Equipment, the control interface of each control sub-circuit is connected with a general purpose I/O Interface gpio of the I/O control chips respectively,
The communication equipment that the control switching circuit is connected has identical device address；
The control instruction that the I/O control chips are issued according to the main control device is to each in the control switching circuit
The control signal of control sub-circuit is encoded, realize the main control device and it is any control the communication equipment that is connected of sub-circuit it
Between communication connection.
Wherein, the control sub-circuit includes switch control module and relay module, the control of the switch control module
Signal input part processed is connected with a general purpose I/O Interface gpio of the I/O control chips, the control of the switch control module
Signal output part is connected with the control interface of the relay module；The main control device passes through SMBus or I respectively2C buses with
The relay module connection, the relay module passes through SMBus or I2C buses correspondence is connected with a communication equipment；
When the control instruction that the I/O control chips are issued according to the main control device controls the switch control module to close
When closing, the relay module disconnects the communication connection between the main control device and corresponding communication equipment；When I/O controls
When the control instruction that coremaking piece is issued according to the main control device controls the switch control module unlatching, the relay module
The communication connection set up between the main control device and corresponding communication equipment.
Wherein, the switch control module includes first resistor, second resistance, PMOS, NMOS tube and diode, described
The source electrode connection power supply of PMOS, the drain electrode of the drain electrode connection NMOS tube of the PMOS, the grid of the PMOS connects
The grid of the NMOS tube is connect, the source ground of the NMOS tube, one end of the first resistor is connected to the PMOS
Grid, the other end is connected with a general purpose I/O Interface gpio of the I/O control chips, one end of the second resistance and institute
State a general purpose I/O Interface gpio connections of I/O control chips, other end ground connection, the drain electrode of the PMOS is connected to described
The control interface connection of relay module, the positive pole of the diode is connected with the drain electrode of the PMOS, the diode
Negative pole connects power supply, when the general purpose I/O Interface gpio is output as low level, the NMOS tube cut-off, the relay mould
Block disconnects the communication connection between the main control device and corresponding communication equipment；When the general purpose I/O Interface gpio is output as
During high level, the NMOS tube conducting, the relay module is set up between the main control device and corresponding communication equipment
Communication connection.
Communication system provided in an embodiment of the present invention based on SMBus/I2C buses, is realized by switching circuit
The switching of SMBus/i2c signal wires, and then realize the communication connection to identical equipment in device address under SMBus/i2c buses
Control, solves the problem of slave unit address is identical to cause conflict, and realize on hardware by lpc Interface Controller switching circuits
Isolation.
Described above is only the general introduction of technical solution of the present invention, in order to better understand the technological means of the present invention,
And can be practiced according to the content of specification, and in order to allow above and other objects of the present invention, feature and advantage can
Become apparent, below especially exemplified by the embodiment of the present invention.
Brief description of the drawings
By reading the detailed description of hereafter preferred embodiment, various other advantages and benefit is common for this area
Technical staff will be clear understanding.Accompanying drawing is only used for showing the purpose of preferred embodiment, and is not considered as to the present invention
Limitation.And in whole accompanying drawing, identical part is denoted by the same reference numerals.In the accompanying drawings：
Fig. 1 is based on SMBus/I for one kind of the embodiment of the present invention2The structured flowchart of the communication system of C buses；
Fig. 2 is based on SMBus/I for the another of the embodiment of the present invention2The structured flowchart of the communication system of C buses；
Fig. 3 be the embodiment of the present invention in multiplexer circuit structure diagram；
Fig. 4 is based on SMBus/I for another of the embodiment of the present invention2The structured flowchart of the communication system of C buses；
Fig. 5 be the embodiment of the present invention in switch control module circuit structure diagram；
Fig. 6 be the embodiment of the present invention in relay module circuit structure diagram.
Embodiment
The exemplary embodiment of the disclosure is more fully described below with reference to accompanying drawings.Although showing the disclosure in accompanying drawing
Exemplary embodiment, it being understood, however, that may be realized in various forms the disclosure without should be by embodiments set forth here
Limited.On the contrary, these embodiments are provided to facilitate a more thoroughly understanding of the present invention, and can be by the scope of the present disclosure
Complete conveys to those skilled in the art.
Those skilled in the art of the present technique are appreciated that unless otherwise defined, all terms used herein (including technology art
Language and scientific terminology), with the general understanding identical meaning with the those of ordinary skill in art of the present invention.Should also
Understand, those terms defined in such as general dictionary, it should be understood that with the context with prior art
The consistent meaning of meaning, and unless by specific definitions, otherwise will not be explained with idealization or excessively formal implication.
Fig. 1 diagrammatically illustrate one embodiment of the invention based on SMBus/I2The structural frames of the communication system of C buses
Figure.Reference picture 1, it is provided in an embodiment of the present invention to be based on SMBus/I2The communication system of C buses, including main control device 10, I/O control
Coremaking piece 20, control switching circuit 30 and at least two have the communication equipment 40 (40-1 to 40-N) of identical device address,
The main control device 10 is connected by LPC interfaces with the I/O control chips 20, and the main control device 10 passes through SMBus or I2C
Bus and the connection of the control switching circuit, the control switching circuit 30 pass through SMBus or I2C buses are also associated with described
At least two communication equipments with identical device address, referring to Fig. 1.
Wherein, I/O control chips 20 are connected with the control switching circuit 30, and the I/O control chips 30 are according to described
The control instruction that main control device 10 is issued is encoded to the control signal of the control switching circuit 30, for the switching control
It is logical that circuit 30 processed is connected according to the control signal switching main control device 10 after coding and with the control switching circuit 30
Believe the communication connection between equipment.
In a specific embodiment, it is described when system, which includes two, has the communication equipment of identical device address
Control switching circuit 30 is realized by multiplexer, referring to Fig. 2.
Wherein, the multiplexer TS3USB221A includes control interface S, first via data-interface (D- and D-), the
Two circuit-switched data interfaces (1D+ and 1D-) and the 3rd circuit-switched data interface (2D+ and 2D-)；The control interface S and I/O controls core
Piece is NCT6776F general purpose I/O Interface gpio connections, and the first via data-interface passes through SMBus or I2C buses with it is described
Main control device is connected, and the second circuit-switched data interface and the 3rd circuit-switched data interface pass through SMBus or I respectively2C buses and described two
The communication equipment that platform has identical device address is connected；The control issued when the I/O control chips according to the main control device
When instruction controls the control signal of the control switching circuit for high level, switch the first via data-interface and described second
Circuit-switched data interface is connected, and realizes the communication connection between main control device communication equipment corresponding with the second circuit-switched data interface；
When the control instruction that the I/O control chips are issued according to the main control device controls the control signal of the control switching circuit
During for low level, switch the first via data-interface and be connected with the 3rd circuit-switched data interface, realize main control device with it is described
Communication connection between the corresponding communication equipment of 3rd circuit-switched data interface.
In the present embodiment, as shown in Fig. 2 using CPU as main control device, being controlled using model NCT6776F I/O
Coremaking piece, control switching circuit is used as using model TS3USB221A multiplexer.Wherein, model TS3USB221A
Multiplexer circuit structure it is as shown in Figure 3.
In the present embodiment, the concrete operating principle of control switching circuit is as follows：
1st, when TS3USB221A S pins are pulled low, then TS3USB221A 1D+ and D+, 1D- and D- are short circuit respectively
, 2D+ is to disconnect respectively with D+, 2D- and D-.
2nd, when TS3USB221A S pins are driven high, then TS3USB221A 1D+ is to disconnect respectively with D+, 1D- and D-
, 2D+ and D+, 2D- and D- are short circuit respectively.
Realize the method controlled identical address equipment under SMBus/i2c：
3rd, CPU is controlled by LPC interfaces to NCT6776F.
4th, NCT6776F operates gpio interfaces by cpu control instruction.
5th, when the output of gpio interfaces is low, then TS3USB221A 1D+ and D+, 1D- and D- are short circuit, 2D+ and D respectively
+, 2D- and D- be to disconnect respectively.
6th, CPU is controlled to equipment 40-1.
7th, when the output of gpio interfaces is high, then TS3USB221A 1D+ is to disconnect respectively with D+, 1D- and D-, 2D+ and D
+, 2D- and D- be short circuit respectively.
8th, CPU is controlled to equipment 40-2.
In a specific embodiment, as shown in figure 4, when system includes many communication equipments with identical device address
When, the control switching circuit 30 includes multiple control sub-circuits, and the main control device passes through SMBus or I respectively2C buses with
Each control sub-circuit connection, each control sub-circuit passes through SMBus or I2C buses correspondence is connected with a communication equipment, respectively
The control interface of individual control sub-circuit is connected with a general purpose I/O Interface gpio of the I/O control chips respectively, the switching
The communication equipment that control circuit is connected has identical device address；The I/O control chips are issued according to the main control device
Control instruction in the control switching circuit it is each control sub-circuit control signal encode, realize that the master control is set
Communication connection between the standby communication equipment being connected with any control sub-circuit.
Specifically, each control sub-circuit includes switch control module (referring to Fig. 5) and relay module (referring to Fig. 6),
The control signal input of the switch control module is connected with a general purpose I/O Interface gpio of the I/O control chips, institute
The control signal output for stating switch control module is connected with the control interface of the relay module；The main control device difference
Pass through SMBus or I2C buses are connected with the relay module, and the relay module passes through SMBus or I2C buses correspondence connects
It is connected to a communication equipment；When the control instruction that the I/O control chips are issued according to the main control device controls the switch
When control module is closed, the relay module disconnects the communication connection between the main control device and corresponding communication equipment；
When the control instruction that the I/O control chips are issued according to the main control device controls the switch control module to open, institute
State the communication connection that relay module is set up between the main control device and corresponding communication equipment.
Referring to Fig. 5, the switch control module includes first resistor R295, second resistance R294, PMOS Q9, NMOS tube
Q11 and diode D32, the PMOS Q9 source electrode connection power supply, the drain electrode of the PMOS Q9 connect the NMOS tube Q11
Drain electrode, the grid of the PMOS Q9 connects the grid of the NMOS tube Q11, and the source ground of the NMOS tube Q11 is described
First resistor R295 one end is connected to the grid of the PMOS Q9, and one of the other end and the I/O control chips 20 is led to
With the gpio connections of I/O interfaces, one end of the second resistance R294 and a general purpose I/O Interface of the I/O control chips
Gpio connections, other end ground connection, the drain electrode of the PMOS Q9 is connected to the control interface connection of the relay module, described
Diode D32 positive pole is connected with the drain electrode of the PMOS Q9, the negative pole connection power supply of the diode D32, when described logical
When being output as low level with I/O interfaces gpio, the NMOS tube Q11 cut-offs, the relay module disconnects the main control device
Communication connection between 10 and corresponding communication equipment；When the general purpose I/O Interface gpio is output as high level, the NMOS
Pipe Q11 is turned on, the communication connection that the relay module is set up between the main control device 10 and corresponding communication equipment.
In the present embodiment, as shown in figure 4, using CPU as main control device, being controlled using model NCT6776F I/O
Coremaking piece, using model N-NDS351AN_NL_SOT23-LF NMOS tube, using model P-AP2303GN_SOT23-3-
RH/N PMOS, using model NSVR0320M002T1G diode, using model g6k-2p-y relay.Its
In, the circuit structure using model g6k-2p-y relay is as shown in Figure 6.
In the present embodiment, the concrete operating principle of control switching circuit is as follows：
1st, CPU is controlled by LPC interfaces to NCT6776F.
2nd, NCT6776F operates multigroup gpio interfaces by cpu control instruction.
3rd, each group gpio1, gpio2, gpion interface is allowed each gpio1, gpio2, gpion interface by NCT6776F initialization
Export low level.
4th, NCT6776F gpio1 is connected with the GPIO_CRTL1 in multi-way switch circuit 1, when gpio1 is output as low,
Metal-oxide-semiconductor N-NDS351AN_NL_SOT23-LF then ends, and relay g6k-2p-y the 8th pin is driven high.Then relay g6k-
2p-y pin 3 and pin 2 is turned on, pin 6 and pin 7 are turned on, then equipment 40-1 and Smbus Bus isolations.
5th, it can similarly obtain, NCT6776F gpio1, gpio2, gpion interface is all low, and equipment 40-1, equipment 40-2 are arrived
Equipment 40-n all Smbus Bus isolations.
6th, NCT6776F gpio1 is connected with the GPIO_CRTL1 in multi-way switch circuit 1, when gpio1 is output as high,
Metal-oxide-semiconductor N-NDS351AN_NL_SOT23-LF is then turned on, and relay g6k-2p-y the 8th pin is pulled low.Then relay g6k-
2p-y pin 3 and pin 4 is turned on, pin 6 and pin 5 are turned on, then equipment 40-1 is suspended in Smbus buses.
7th, CPU is controlled to equipment 40-1.
8th, after end of transmission, NCT6776F gpio1 is dragged down, then equipment 40-1 and Smbus Bus isolations.
9th, after the same method, the other equipment on Smbus is controlled.
Communication system provided in an embodiment of the present invention based on SMBus/I2C buses, is realized by switching circuit
The switching of SMBus/i2c signal wires, and then realize the communication connection to identical equipment in device address under SMBus/i2c buses
Control, solves the problem of slave unit address is identical to cause conflict, and realize on hardware by lpc Interface Controller switching circuits
Isolation.
Although it will be appreciated by those of skill in the art that some embodiments in this are included included by other embodiments
Some features rather than further feature, but the combination of the feature of be the same as Example does not mean to be within the scope of the present invention simultaneously
And form different embodiments.For example, in the following claims, the one of any of embodiment claimed all may be used
Used in mode in any combination.
Finally it should be noted that：The above embodiments are merely illustrative of the technical solutions of the present invention, rather than its limitations；Although
The present invention is described in detail with reference to the foregoing embodiments, it will be understood by those within the art that：It still may be used
To be modified to the technical scheme described in foregoing embodiments, or equivalent substitution is carried out to which part technical characteristic；
And these modification or replace, do not make appropriate technical solution essence depart from various embodiments of the present invention technical scheme spirit and
Scope.
Claims (6)
1. one kind is based on SMBus/I2The communication system of C buses, it is characterised in that including main control device, I/O control chips, switching
Controlling circuit and at least two has a communication equipments of identical device address, the main control device by LPC interfaces with it is described
I/O control chips are connected, and the main control device passes through SMBus or I2C buses and the connection of the control switching circuit, it is described to cut
Change control circuit and pass through SMBus or I2C buses are also associated with described at least two communication equipments with identical device address；
The I/O control chips are connected with the control switching circuit, and the I/O control chips are issued according to the main control device
Control instruction the control signal of the control switching circuit is encoded, for the control switching circuit according to coding after
Control signal switch communication connection between the main control device and the communication equipment being connected with the control switching circuit.
2. system according to claim 1, it is characterised in that there is the logical of identical device address when system includes two
When believing equipment, the control switching circuit is realized by multiplexer.
3. system according to claim 2, it is characterised in that the multiplexer includes control interface, the first way
According to interface, the second circuit-switched data interface and the 3rd circuit-switched data interface；General purpose I/O of the control interface and the I/O control chips
Interface gpio connections, the first via data-interface passes through SMBus or I2C buses are connected with the main control device, and described second
Circuit-switched data interface and the 3rd circuit-switched data interface pass through SMBus or I respectively2C buses have identical device address with described two
Communication equipment is connected；
When the control instruction that the I/O control chips are issued according to the main control device controls the control of the control switching circuit
When signal is high level, switches the first via data-interface and be connected with the second circuit-switched data interface, realize main control device and
Communication connection between the corresponding communication equipment of the second circuit-switched data interface；
When the control instruction that the I/O control chips are issued according to the main control device controls the control of the control switching circuit
When signal is low level, switches the first via data-interface and be connected with the 3rd circuit-switched data interface, realize main control device and
Communication connection between the corresponding communication equipment of the 3rd circuit-switched data interface.
4. system according to claim 1, it is characterised in that the control switching circuit includes multiple control sub-circuits,
The main control device passes through SMBus or I respectively2C buses are connected with each control sub-circuit, and each control sub-circuit passes through
SMBus or I2C buses correspondence is connected with a communication equipment, and the control interface of each control sub-circuit is controlled with the I/O respectively
One general purpose I of coremaking piece/O Interface gpio connections, the communication equipment that the control switching circuit is connected has identical equipment
Address；
The control instruction that the I/O control chips are issued according to the main control device is to each control in the control switching circuit
The control signal of sub-circuit is encoded, between the communication equipment for realizing the main control device and the connection of any control sub-circuit
Communication connection.
5. system according to claim 4, it is characterised in that the control sub-circuit includes switch control module and relay
Device module, the control signal input of the switch control module and a general purpose I/O Interface gpio of the I/O control chips
Connection, the control signal output of the switch control module is connected with the control interface of the relay module；The master control
Equipment passes through SMBus or I respectively2C buses are connected with the relay module, and the relay module passes through SMBus or I2C is total
Line correspondence is connected with a communication equipment；
When the control instruction that the I/O control chips are issued according to the main control device controls the switch control module to close
When, the relay module disconnects the communication connection between the main control device and corresponding communication equipment；When I/O controls
When the control instruction that chip is issued according to the main control device controls the switch control module unlatching, the relay module is built
Vertical communication connection between the main control device and corresponding communication equipment.
6. system according to claim 5, it is characterised in that the switch control module includes first resistor, the second electricity
Resistance, PMOS, NMOS tube and diode, the source electrode connection power supply of the PMOS, the drain electrode connection of the PMOS are described
The drain electrode of NMOS tube, the grid of the PMOS connects the grid of the NMOS tube, the source ground of the NMOS tube, and described the
One end of one resistance is connected to the grid of the PMOS, a general purpose I/O Interface of the other end and the I/O control chips
Gpio connections, one end of the second resistance is connected with a general purpose I/O Interface gpio of the I/O control chips, the other end
Ground connection, the drain electrode of the PMOS is connected to the control interface connection of the relay module, the positive pole of the diode and institute
State the drain electrode connection of PMOS, the negative pole connection power supply of the diode, when the general purpose I/O Interface gpio is output as low level
When, the NMOS tube cut-off, the relay module disconnects the communication link between the main control device and corresponding communication equipment
Connect；When the general purpose I/O Interface gpio is output as high level, the NMOS tube conducting, the relay module is set up described
Communication connection between main control device and corresponding communication equipment.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710519289.1A CN107317737A (en) | 2017-06-30 | 2017-06-30 | One kind is based on SMBus/I2The communication system of C buses |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710519289.1A CN107317737A (en) | 2017-06-30 | 2017-06-30 | One kind is based on SMBus/I2The communication system of C buses |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN107317737A true CN107317737A (en) | 2017-11-03 |
Family
ID=60180868
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710519289.1A Pending CN107317737A (en) | 2017-06-30 | 2017-06-30 | One kind is based on SMBus/I2The communication system of C buses |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107317737A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108784741A (en) * | 2018-05-23 | 2018-11-13 | 深圳市德力凯医疗设备股份有限公司 | A kind of ultrasound Transcranial Doppler analyzer and system |
| CN112463691A (en) * | 2020-12-04 | 2021-03-09 | 威创集团股份有限公司 | Line switching circuit and communication system based on I2C |
| US11768788B2 (en) | 2019-07-23 | 2023-09-26 | Hewlett-Packard Development Company, L.P. | Bus endpoint isolation |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW201229748A (en) * | 2011-01-10 | 2012-07-16 | Hon Hai Prec Ind Co Ltd | Server and method for controlling opening of channels |
| CN103473206A (en) * | 2013-09-17 | 2013-12-25 | 广东威创视讯科技股份有限公司 | Data transmission method and I2C (Inter-Integrated Circuit) interface extender |
| US20150347344A1 (en) * | 2012-11-28 | 2015-12-03 | Atmel Corporation | Connecting multiple slave devices to single master controller in bus system |
-
2017
- 2017-06-30 CN CN201710519289.1A patent/CN107317737A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW201229748A (en) * | 2011-01-10 | 2012-07-16 | Hon Hai Prec Ind Co Ltd | Server and method for controlling opening of channels |
| US20150347344A1 (en) * | 2012-11-28 | 2015-12-03 | Atmel Corporation | Connecting multiple slave devices to single master controller in bus system |
| CN103473206A (en) * | 2013-09-17 | 2013-12-25 | 广东威创视讯科技股份有限公司 | Data transmission method and I2C (Inter-Integrated Circuit) interface extender |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108784741A (en) * | 2018-05-23 | 2018-11-13 | 深圳市德力凯医疗设备股份有限公司 | A kind of ultrasound Transcranial Doppler analyzer and system |
| CN108784741B (en) * | 2018-05-23 | 2024-03-12 | 深圳市德力凯医疗设备股份有限公司 | Ultrasonic transcranial Doppler analyzer and system |
| US11768788B2 (en) | 2019-07-23 | 2023-09-26 | Hewlett-Packard Development Company, L.P. | Bus endpoint isolation |
| CN112463691A (en) * | 2020-12-04 | 2021-03-09 | 威创集团股份有限公司 | Line switching circuit and communication system based on I2C |
| WO2022116349A1 (en) * | 2020-12-04 | 2022-06-09 | 威创集团股份有限公司 | I2c-based line switching circuit and communication system |
| CN112463691B (en) * | 2020-12-04 | 2024-04-02 | 威创集团股份有限公司 | I2C-based line switching circuit and communication system |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN100468378C (en) | SPI apparatus telecommunication circuit | |
| CN107317737A (en) | One kind is based on SMBus/I2The communication system of C buses | |
| CN210534769U (en) | OCP network card hot plug device | |
| CN104809088A (en) | Connecting device and control chip and control method thereof | |
| CN105718409A (en) | Pin-configurable internal bus termination system | |
| CN105487999A (en) | Cascaded large-scale USB expansion device and working method and system | |
| CN103516961A (en) | Image processor, preparing method thereof and mother card | |
| CN108701106A (en) | A kind of data transmission method and equipment | |
| CN107959806A (en) | A kind of binodal point server KVM switches circuit | |
| CN108304336A (en) | A kind of signal processing apparatus and method | |
| CN109815184A (en) | Debugging single board device and its control method, computer readable storage medium | |
| CN103885034A (en) | Digital signal processing device for radar | |
| CN105653482B (en) | Super USB controller and working method, system | |
| CN106527409B (en) | A kind of master control cabinet | |
| CN104572560A (en) | USB (universal serial bus) and ADC (analog to digital converter) interface multiplex circuit and multiplex method | |
| CN103793038A (en) | Electronic device and power supply control method | |
| CN105490844A (en) | PCIe port reconstruction method | |
| CN210666783U (en) | Control circuit of high-density ARM micro server | |
| CN106855846A (en) | A kind of PCIE signal extension system and method based on PCIE Switch | |
| CN111274193A (en) | Data processing apparatus and method | |
| CN109800198B (en) | Circuit for realizing independent switching of hardware by connecting three devices through USB (universal serial bus) ports | |
| CN105653483B (en) | The extensive usb expansion device of tandem and method of work, system | |
| CN103559159A (en) | Information processing method and electronic device | |
| CN210348480U (en) | Interface control circuit, chip and system | |
| CN107505486A (en) | A kind of high pressure program controlled matrix switch |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20171103 |
|
| RJ01 | Rejection of invention patent application after publication |