CN107305883A - Electronic package and manufacturing method thereof - Google Patents
Electronic package and manufacturing method thereof Download PDFInfo
- Publication number
- CN107305883A CN107305883A CN201610297247.3A CN201610297247A CN107305883A CN 107305883 A CN107305883 A CN 107305883A CN 201610297247 A CN201610297247 A CN 201610297247A CN 107305883 A CN107305883 A CN 107305883A
- Authority
- CN
- China
- Prior art keywords
- electronic
- electronic component
- packing piece
- bearing structure
- preparation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title description 2
- 238000012856 packing Methods 0.000 claims description 58
- 238000010276 construction Methods 0.000 claims description 36
- 238000002360 preparation method Methods 0.000 claims description 30
- 238000009413 insulation Methods 0.000 claims description 26
- 239000000463 material Substances 0.000 claims description 17
- 238000004806 packaging method and process Methods 0.000 claims description 13
- 239000011230 binding agent Substances 0.000 claims description 9
- 238000000034 method Methods 0.000 abstract description 6
- 238000005516 engineering process Methods 0.000 description 6
- 238000012545 processing Methods 0.000 description 6
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 5
- 238000013461 design Methods 0.000 description 4
- 230000005611 electricity Effects 0.000 description 4
- 239000004642 Polyimide Substances 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000003292 glue Substances 0.000 description 3
- 229920001721 polyimide Polymers 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000005253 cladding Methods 0.000 description 2
- 239000000084 colloidal system Substances 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- SZVJSHCCFOBDDC-UHFFFAOYSA-N ferrosoferric oxide Chemical compound O=[Fe]O[Fe]O[Fe]=O SZVJSHCCFOBDDC-UHFFFAOYSA-N 0.000 description 2
- 229910052742 iron Inorganic materials 0.000 description 2
- 238000010030 laminating Methods 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 229910000859 α-Fe Inorganic materials 0.000 description 2
- PWHULOQIROXLJO-UHFFFAOYSA-N Manganese Chemical compound [Mn] PWHULOQIROXLJO-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- -1 for example Substances 0.000 description 1
- 239000012774 insulation material Substances 0.000 description 1
- LIKBJVNGSGBSGK-UHFFFAOYSA-N iron(3+);oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Fe+3].[Fe+3] LIKBJVNGSGBSGK-UHFFFAOYSA-N 0.000 description 1
- 229910052748 manganese Inorganic materials 0.000 description 1
- 239000011572 manganese Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910001092 metal group alloy Inorganic materials 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000009747 press moulding Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000012797 qualification Methods 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Health & Medical Sciences (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Abstract
An electronic package and a method for fabricating the same, the electronic package comprising: the electronic package comprises a bearing structure, a first electronic element and a second electronic element which are arranged on the bearing structure, a shielding structure which covers the first electronic element but does not cover the second electronic element, and a package body which covers the shielding structure and the second electronic element, so that when the electronic package is operated, the first electronic element is not subjected to external electromagnetic interference, and the first electronic element and the second electronic element are not mutually subjected to electromagnetic interference, the electrical operation function of the electronic package can be normally operated, and the electrical efficiency of the electronic package can not be influenced.
Description
Technical field
The present invention relevant a kind of electronic packing piece and its preparation method, espespecially a kind of electronic packing piece and its system for having electromagnetic shielding
Method.
Background technology
With flourishing for electronic industry, electronic product is also gradually marched toward multi-functional, high performance trend.In order to meet
The multi-functional demand of electronic packing piece, need to set multiple chips in semiconductor package part.
However, semiconductor package part is when running, because it does not have electromagnetic interference (Electromagnetic
Interference, abbreviation EMI) shielding (shielding) structure, therefore respectively the chip be subject to the external world electromagnetic interference
Or respectively easy mutual electromagnetic interference between the chip, cause the electrical operational function of the semiconductor package part abnormal, thus shadow
Ring entirety electrical property efficiency.
Therefore, how to overcome above-mentioned the problem of note technology, it is real into the problem for desiring most ardently solution at present.
The content of the invention
In view of the above-mentioned disadvantages for noting technology, the invention discloses a kind of electronic packing piece and its preparation method, make the electronics
The electrical operational function of packaging part is able to normal operation, and its electrical property efficiency is unaffected.
The electronic packing piece of the present invention, it includes：Bearing structure；First electronic component, it is in the bearing structure；The
Two electronic components, it is in the bearing structure；Shielding construction, it is formed in the bearing structure and covers first electronics member
Part and do not cover second electronic component；And packaging body, it is formed in the bearing structure and coats the shielding construction with being somebody's turn to do
Second electronic component.
The present invention also provides a kind of preparation method of electronic packing piece, and it includes：First electronic component and the second electronics member are set
Part is in a bearing structure；The shielding construction of first electronic component, and the shielding knot are covered in formation one in the bearing structure
Structure does not cover second electronic component；And coat the shielding construction and second electronic component in forming one in the bearing structure
Packaging body.
In foregoing electronic packing piece and its preparation method, first electronic component is RF component, and second electronic component
For passive device.
In foregoing electronic packing piece and its preparation method, first electronic component is electrically connected with the bearing structure.
In foregoing electronic packing piece and its preparation method, second electronic component is electrically connected with the bearing structure.
In foregoing electronic packing piece and its preparation method, the shielding construction includes insulation division and shielding part, insulation division cladding
First electronic component, and the shielding part on the insulation division to cover first electronic component.For example, forming the shielding part
Material include conduction material.
In foregoing electronic packing piece and its preparation method, in addition to binder course is formed in first electronic component and the carrying knot
Between structure.
In foregoing electronic packing piece and its preparation method, the shielding construction is conducting film.
From the foregoing, it will be observed that in the electronic packing piece and its preparation method of the present invention, first electronics member is covered by the shielding construction
Part and the design for not covering second electronic component, so that when the electronic packing piece is operated, first electronic component is not exposed to
Extraneous electromagnetic interference, and between first and second electronic component will not mutual electromagnetic interference, therefore compared to noting technology, this
The electrical operational function of the electronic packing piece of invention is able to normal operation, and the electrical property efficiency of the electronic packing piece will not be by shadow
Ring.
Brief description of the drawings
Figure 1A to Fig. 1 D is the diagrammatic cross-section of the first embodiment of the preparation method of the electronic packing piece of the present invention；Wherein, scheme
1B ' is Figure 1B another embodiment, and Fig. 1 D ' and Fig. 1 D " are Fig. 1 D other embodiments；And
Fig. 2A to Fig. 2 B is the diagrammatic cross-section of the second embodiment of the preparation method of the electronic packing piece of the present invention；Wherein, scheme
2A ' and Fig. 2 B ' is Fig. 2A and Fig. 2 B another embodiment.
Symbol description
2,2 ', 2 ", 3,3 ' electronic packing pieces
20 bearing structures
21,21 ' first electronic components
21a active surfaces
The non-active faces of 21b
210 electronic padses
211,221 solder bumps
211 ', 221 ' bonding wires
22,22 ' second electronic components
23,23 ', 23 ", 33 shielding constructions
230,230 ', 230 " insulation divisions
231 shielding parts
24 packaging bodies
35,35 ' binder courses.
Embodiment
Illustrate embodiments of the present invention by particular specific embodiment below, those skilled in the art can be by this explanation
Content disclosed in book understands other advantages and effect of the present invention easily.
It should be clear that structure, ratio, size depicted in accompanying drawing appended by this specification etc., only to coordinate specification to be taken off
The content shown, for the understanding and reading of those skilled in the art, is not limited to enforceable qualifications of the invention, therefore
Do not have technical essential meaning, the modification of any structure, the change of proportionate relationship or the adjustment of size are not influenceing the present invention
Under the effect that can be generated and the purpose that can reach, it all should still fall and obtain the model that can cover in disclosed technology contents
In enclosing.Meanwhile, in this specification it is cited such as " on ", " first ", the term of " second " and " one ", be merely convenient to narration
Understand, and be not used to limit enforceable scope of the invention, being altered or modified for its relativeness is changing technology without essence
Inside hold, when being also considered as enforceable category of the invention.
Figure 1A to Fig. 1 D is the diagrammatic cross-section of the first embodiment of the preparation method of the electronic packing piece 2 of the present invention.Yu Benshi
Apply in example, the electronic packing piece 2 is to be fanned out to radio frequency (Radio frequency, the abbreviation RF) module of (fan-out) circuit or be
Radio frequency (RF) module of irrespective of size encapsulation (System in package, abbreviation SiP).
As shown in Figure 1A, set at least one first electronic component 21 with least one second electronic component 22 in a bearing structure
On 20.
In the present embodiment, the bearing structure 20 be build-up circuit structure, lead frame, circuit board, ceramic wafer or metallic plate,
Its surface can be selectively formed the line layer for being electrically connected with first and second electronic component 21,22 (figure is omited).However, having
The species for closing bearing structure 20 is various, however it is not limited to above-mentioned.
In addition, first electronic component 21 is active member, passive device or its combiner, wherein, the active member is
Such as semiconductor chip, and the passive device is such as resistance, electric capacity and inductance.Specifically, first electronic component 21 is to penetrate
Frequency chip or other semiconductor chips, such as Bluetooth chip or Wi-Fi (Wireless Fidelity) chip, it has relative
Active surface 21a and non-active face 21b, active surface 21a have multiple electrode pads 210, and first electronic component 21 is led with it
Dynamic face 21a is bound in the bearing structure 20.For example, first electronic component 21 is (convex i.e. by multiple scolding tin in flip mode
Block 211) electrically it is bound to the line layer of the bearing structure 20.
Also, second electronic component 22 is active member, passive device or its combiner, and the active member is such as half
Conductor chip, and the passive device is such as resistance, electric capacity and inductance.Specifically, second electronic component 22 is passive device.
For example, second electronic component 22 is electrically bound to the line layer of the bearing structure 20 by multiple solder bumps 221.
As shown in Figure 1B, an insulation division 230 is formed in the bearing structure 20, to make the insulation division 230 contiguously coat
First electronic component 21 and uncoated second electronic component 22.
In the present embodiment, formed the material of the insulation division 230 for for example, packing colloid (molding compound),
Dry film (dry film), polyimides (polyimide, abbreviation PI) or epoxy resin (expoxy), and the insulation division 230 is for example
Formed with press moulding mode formation or laminating type or the insulation division 230 is formed with dispensing (Globe top) and dry the insulation division again
230 mode is formed.
As shown in Figure 1 C, formed a shielding part 231 on the insulation division 230 to cover first electronic component 21, and order
The shielding part 231 constitutes a shielding construction 23 with the insulation division 230, wherein, the shielding construction 23 does not cover second electronics member
Part 22.In addition, the insulation division formed in dispensing mode must first drill compared to the production method noted re-forms a metal level afterwards
Mode can reduce processing time and cost.
In the present embodiment, the material for forming the shielding part 231 is conduction material, and its material is different from the insulation division 230
Material.
Specifically, if the material for forming the shielding part 231 includes conductor material, such as copper (Cu), nickel (Ni), iron (Fe) or aluminium
(Al) or above-mentioned metal alloy etc., it is formed with smearing conducting resinl mode, or with such as sputter (sputtering) plated film
Mode is formed, and can also be formed by coating (coating) mode or spraying method.Or, can be ferrite (ferrite), example
Such as bloodstone (Fe2O3) or magnetic iron ore (Fe3O4) or soft iron material (compound for such as including nickel, zinc or manganese).
Also, in the embodiment of another processing procedure, the shielding part 231 just like frame body also can be first set, such as shown in Figure 1B ',
The insulation division 230 is re-formed afterwards in the shielding part 231, to form shielding construction 23 as shown in Figure 1 C.
As shown in figure iD, a packaging body 24 is formed in the bearing structure 20, is somebody's turn to do with making the packaging body 24 contiguously coat
Shielding construction 23 and second electronic component 22, when using the intensity for lifting the electronic packing piece 2 and assembling product being provided and its
Insulation after its isoelectric membrane.
In the present embodiment, the material for forming the packaging body 24 is insulation material, for example, polyimides, dry film, epoxy resin
Or packing colloid, and the material of the insulation division 230 can be identical with the material of the packaging body 24 or differs.
In addition, referring to Fig. 1 D, Fig. 1 D ' and Fig. 1 D ", the appearance profile of the insulation division 230,230 ', 230 " can be by point
Half elliptic (as shown in figure iD), semicircle (as shown in Fig. 1 D') or rectangle (such as shown in Fig. 1 D ") that glue mode is formed, but
It is not limited to above-mentioned.
Also, as shown in Fig. 1 D ', first electronic component 21 ' can also routing mode (i.e. by multiple bonding wire 211') electricity
Property connects the bearing structure 20.It should be appreciated that ground, as shown in Fig. 1 D', second electronic component 22 ' can also multiple bonding wire 221'
It is electrically connected with the bearing structure 20.
The preparation method of the present invention for directly in forming shielding construction 23,23 ' in objective chip (such as the first electronic component 21),
23 ", the shielding construction 23,23 ', 23 " is covered first electronic component 21,21 ' and is not covered second electronic component 22,
22 ' design, therefore the electronic packing piece 2,2 ', 2 ", when running, first electronic component 21,21 ' is not exposed to the electricity in the external world
Magnetic disturbance (EMI), and first electronic component 21,21 ' and second between electronic component 22,22 ' will not mutual electromagnetic disturb, because
And the electrical operational function of the electronic packing piece 2,2 ', 2 " is able to normally, and then do not interfere with the overall electronic packing piece 2,2 ',
2 " electrical property efficiency.
Fig. 2A to Fig. 2 B is the diagrammatic cross-section of the second embodiment of the preparation method of the electronic packing piece 3 of the present invention.This implementation
The difference of example and first embodiment is the processing procedure of shielding construction, and other processing procedures are identical, therefore will be described below different person, and no longer
Repeat identical person.
As shown in Figure 2 A, hookup 1A processing procedure, forms a shielding construction 33 on first electronic component 21.
In the present embodiment, the shielding construction 33 is conducting film, for example, the chip adhesion glue film (Die with conducting particles
Attach film) or chip adhesion glue film with copper foil layer, it is formed at first electronics with pressing mode or laminating type
Coat on the non-active face 21b of element 21 and contiguously first electronic component 21.
In addition, before the shielding construction 33 is formed, can be selectively formed a binder course 35 in first electronic component
Between 21 and the bearing structure 20.In the present embodiment, the binder course 35 is primer, and in other embodiments, such as Fig. 2A ' institutes
Show, the binder course 35 ' or adhesion layer, with the non-active face 21b of the first electronic component 21 ' of combination routing type in the carrying
In structure 20.
As shown in Fig. 2 B and Fig. 2 B ', a packaging body 24 is formed in the bearing structure 20, to make the packaging body 24 cladding should
Shielding construction 33 and second electronic component 22, use to form electronic packing piece 3,3 '.
The preparation method of the present invention covers first electronic component 21,21 ' by the shielding construction 33 and does not cover second electricity
The design of subcomponent 22, therefore the electronic packing piece 3,3 ', when running, first electronic component 21,21 ' is not exposed to the external world
Electromagnetic interference (EMI), and first electronic component 21,21 ' and second between electronic component 22 will not mutual electromagnetic disturb, thus
The electrical operational function of the electronic packing piece 3,3 ' is able to normally, and then does not interfere with the electrical of the overall electronic packing piece 3,3 '
Efficiency.In addition, shielding construction by dispensing mode or by conducting film press in the way of formed, compared to the preparation method noted to drill
The shielding construction that mode is formed, can save processing time and cost.
The present invention also provides a kind of electronic packing piece 2, and 2 ', 2 ", 3,3 ', including：One bearing structure 20, located at the carrying knot
The first electronic component 21,21 ' and the second electronic component 22,22 ' on structure 20, the shielding for covering first electronic component 21,21 '
Structure 23,23 ', 23 ", 33 and the encapsulation for coating the shielding construction 23,23 ', 23 ", 33 and second electronic component 22,22 '
Body 24.
The first described electronic component 21,21 ' is RF component and is electrically connected with the bearing structure 20.
The second described electronic component 22,22 ' is passive device and is electrically connected with the bearing structure 20.
Described shielding construction 23,23 ', 23 ", 33 does not cover second electronic component 22,22 '.
In an embodiment, described shielding construction 23,23 ', 23 " includes an insulation division 230, and 230 ', 230 " and a screen
Portion 231 is covered, the insulation division 230,230 ', 230 " coats first electronic component 21,21 ', and the shielding part 231 is located at the insulation
To cover first electronic component 21,21 ' in portion 230,230 ', 230 ".
In an embodiment, the shielding construction 33 is conducting film.
In an embodiment, described electronic packing piece 3,3 ' also includes a binder course 35,35 ', the binder course 35,35 '
Between first electronic component 21,21 ' and the bearing structure 20.
In summary, in electronic packing piece of the invention and its preparation method, mainly first electricity is covered by the shielding construction
Subcomponent and the design for not covering second electronic component, so that when the electronic packing piece is operated, first electronic component will not
Will not mutual electromagnetic interference, therefore the electronics of the present invention by extraneous electromagnetic interference, and between first and second electronic component
The electrical operational function of packaging part is able to normal operation, and the electrical property efficiency of the electronic packing piece is unaffected.
Principle and its effect of the above-described embodiment only to the illustrative present invention, not for the limitation present invention.Appoint
What those skilled in the art can modify under the spirit and scope without prejudice to the present invention to above-described embodiment.Therefore originally
The rights protection scope of invention, should be as listed by claims.
Claims (18)
1. a kind of electronic packing piece, it is characterized in that, the electronic packing piece includes：
Bearing structure；
First electronic component, it is in the bearing structure；
Second electronic component, it is in the bearing structure；
Shielding construction, it is formed in the bearing structure and covers first electronic component and do not cover second electronic component；
And
Packaging body, it is formed in the bearing structure and coats the shielding construction and second electronic component.
2. electronic packing piece as claimed in claim 1, it is characterized in that, first electronic component is RF component.
3. electronic packing piece as claimed in claim 1, it is characterized in that, second electronic component is passive device.
4. electronic packing piece as claimed in claim 1, it is characterized in that, first electronic component is electrically connected with the bearing structure.
5. electronic packing piece as claimed in claim 1, it is characterized in that, second electronic component is electrically connected with the bearing structure.
6. electronic packing piece as claimed in claim 1, it is characterized in that, the shielding construction includes insulation division and shielding part, and this is exhausted
Edge coats first electronic component, and the shielding part is located on the insulation division to cover first electronic component.
7. electronic packing piece as claimed in claim 6, it is characterized in that, the material for forming the shielding part includes conduction material.
8. electronic packing piece as claimed in claim 1, it is characterized in that, the electronic packing piece also includes binder course, and it is located at should
Between first electronic component and the bearing structure.
9. electronic packing piece as claimed in claim 1, it is characterized in that, the shielding construction is conducting film.
10. a kind of preparation method of electronic packing piece, it is characterized in that, the preparation method includes：
First electronic component and the second electronic component are set in a bearing structure；
In in the bearing structure formed one cover first electronic component shielding construction, and the shielding construction do not cover this second
Electronic component；And
The shielding construction and the packaging body of second electronic component are coated in forming one in the bearing structure.
11. the preparation method of electronic packing piece as claimed in claim 10, it is characterized in that, first electronic component is RF component.
12. the preparation method of electronic packing piece as claimed in claim 10, it is characterized in that, second electronic component is passive device.
13. the preparation method of electronic packing piece as claimed in claim 10, it is characterized in that, first electronic component is electrically connected with this and held
Carry structure.
14. the preparation method of electronic packing piece as claimed in claim 10, it is characterized in that, second electronic component is electrically connected with this and held
Carry structure.
15. the preparation method of electronic packing piece as claimed in claim 10, it is characterized in that, the shielding construction includes insulation division and shielding
Portion, the insulation division coats first electronic component, and the shielding part is located on the insulation division to cover first electronic component.
16. the preparation method of electronic packing piece as claimed in claim 15, it is characterized in that, the material for forming the shielding part includes conduction
Material.
17. the preparation method of electronic packing piece as claimed in claim 10, it is characterized in that, the preparation method also includes forming binder course in this
Between first electronic component and the bearing structure.
18. the preparation method of electronic packing piece as claimed in claim 10, it is characterized in that, the shielding construction is conducting film.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW105112587A TWI632662B (en) | 2016-04-22 | 2016-04-22 | Electronic package and the manufacture thereof |
| TW105112587 | 2016-04-22 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN107305883A true CN107305883A (en) | 2017-10-31 |
Family
ID=60150491
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610297247.3A Pending CN107305883A (en) | 2016-04-22 | 2016-05-06 | Electronic package and manufacturing method thereof |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN107305883A (en) |
| TW (1) | TWI632662B (en) |
Cited By (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109979978A (en) * | 2019-03-28 | 2019-07-05 | 云谷（固安）科技有限公司 | Display device, display panel and circuit board |
| CN110459530A (en) * | 2019-07-26 | 2019-11-15 | 南通通富微电子有限公司 | Encapsulating structure |
| CN110473859A (en) * | 2019-07-26 | 2019-11-19 | 南通通富微电子有限公司 | Encapsulating structure |
| CN110473844A (en) * | 2019-07-26 | 2019-11-19 | 通富微电子股份有限公司 | Encapsulating structure |
| CN110504175A (en) * | 2019-07-26 | 2019-11-26 | 南通通富微电子有限公司 | The forming method of encapsulating structure |
| CN110504226A (en) * | 2019-07-26 | 2019-11-26 | 南通通富微电子有限公司 | Encapsulating structure |
| CN110518002A (en) * | 2019-07-26 | 2019-11-29 | 通富微电子股份有限公司 | The forming method of encapsulating structure |
| CN110534443A (en) * | 2019-07-26 | 2019-12-03 | 南通通富微电子有限公司 | The forming method of encapsulating structure |
| CN110534444A (en) * | 2019-07-26 | 2019-12-03 | 南通通富微电子有限公司 | The forming method of encapsulating structure |
| CN110534445A (en) * | 2019-07-26 | 2019-12-03 | 南通通富微电子有限公司 | The forming method of encapsulating structure |
| CN110534442A (en) * | 2019-07-26 | 2019-12-03 | 通富微电子股份有限公司 | The forming method of encapsulating structure |
| CN110544677A (en) * | 2019-07-26 | 2019-12-06 | 通富微电子股份有限公司 | packaging structure |
| CN110707071A (en) * | 2019-07-26 | 2020-01-17 | 南通通富微电子有限公司 | Packaging structure |
| CN110718536A (en) * | 2019-07-26 | 2020-01-21 | 南通通富微电子有限公司 | Packaging structure |
| CN110718472A (en) * | 2019-07-26 | 2020-01-21 | 南通通富微电子有限公司 | Forming method of packaging structure |
| CN110783208A (en) * | 2019-07-26 | 2020-02-11 | 南通通富微电子有限公司 | Forming method of packaging structure |
| CN112234049A (en) * | 2020-12-21 | 2021-01-15 | 甬矽电子(宁波)股份有限公司 | Photoelectric sensor, manufacturing method thereof and electronic device |
| WO2021017897A1 (en) * | 2019-07-26 | 2021-02-04 | Nantong Tongfu Microelectronics Co., Ltd | Packaging structure and fabrication method thereof |
| CN113990812A (en) * | 2020-07-27 | 2022-01-28 | 华为技术有限公司 | Electronic packaging module and preparation method thereof |
| CN114641847A (en) * | 2019-10-24 | 2022-06-17 | 德州仪器公司 | Metal-clad chip scale package |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102026132B1 (en) * | 2018-03-05 | 2019-09-27 | 삼성전자주식회사 | Fan-out semiconductor package module |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100207258A1 (en) * | 2009-02-19 | 2010-08-19 | Advanced Semiconductor Engineering, Inc. | Chip package and manufacturing method thereof |
| TW201032319A (en) * | 2009-02-25 | 2010-09-01 | Everlight Electronics Co Ltd | Semiconductor optoelectronic device and quad flat non-leaded optoelectronic device |
| CN102286254A (en) * | 2011-05-06 | 2011-12-21 | 广州方邦电子有限公司 | High-peeling-strength conductive adhesive film with through holes and preparation method thereof |
| TW201240056A (en) * | 2011-03-18 | 2012-10-01 | Siliconware Precision Industries Co Ltd | Semiconductor package and fabrication method thereof |
| CN104157618A (en) * | 2014-08-07 | 2014-11-19 | 华进半导体封装先导技术研发中心有限公司 | Packaging structure and packaging technology for radio-frequency module |
| CN104617053A (en) * | 2013-11-05 | 2015-05-13 | 天工方案公司 | Devices and methods related to packaging of radio-frequency devices on ceramic substrates |
-
2016
- 2016-04-22 TW TW105112587A patent/TWI632662B/en active
- 2016-05-06 CN CN201610297247.3A patent/CN107305883A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100207258A1 (en) * | 2009-02-19 | 2010-08-19 | Advanced Semiconductor Engineering, Inc. | Chip package and manufacturing method thereof |
| TW201032319A (en) * | 2009-02-25 | 2010-09-01 | Everlight Electronics Co Ltd | Semiconductor optoelectronic device and quad flat non-leaded optoelectronic device |
| TW201240056A (en) * | 2011-03-18 | 2012-10-01 | Siliconware Precision Industries Co Ltd | Semiconductor package and fabrication method thereof |
| CN102286254A (en) * | 2011-05-06 | 2011-12-21 | 广州方邦电子有限公司 | High-peeling-strength conductive adhesive film with through holes and preparation method thereof |
| CN104617053A (en) * | 2013-11-05 | 2015-05-13 | 天工方案公司 | Devices and methods related to packaging of radio-frequency devices on ceramic substrates |
| CN104157618A (en) * | 2014-08-07 | 2014-11-19 | 华进半导体封装先导技术研发中心有限公司 | Packaging structure and packaging technology for radio-frequency module |
Cited By (32)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109979978A (en) * | 2019-03-28 | 2019-07-05 | 云谷（固安）科技有限公司 | Display device, display panel and circuit board |
| CN109979978B (en) * | 2019-03-28 | 2020-10-20 | 云谷（固安）科技有限公司 | Display device, display panel and circuit board |
| CN110534444A (en) * | 2019-07-26 | 2019-12-03 | 南通通富微电子有限公司 | The forming method of encapsulating structure |
| CN110504175A (en) * | 2019-07-26 | 2019-11-26 | 南通通富微电子有限公司 | The forming method of encapsulating structure |
| CN110459530A (en) * | 2019-07-26 | 2019-11-15 | 南通通富微电子有限公司 | Encapsulating structure |
| CN110504226A (en) * | 2019-07-26 | 2019-11-26 | 南通通富微电子有限公司 | Encapsulating structure |
| CN110518002A (en) * | 2019-07-26 | 2019-11-29 | 通富微电子股份有限公司 | The forming method of encapsulating structure |
| CN110534443A (en) * | 2019-07-26 | 2019-12-03 | 南通通富微电子有限公司 | The forming method of encapsulating structure |
| CN110473859A (en) * | 2019-07-26 | 2019-11-19 | 南通通富微电子有限公司 | Encapsulating structure |
| CN110534445A (en) * | 2019-07-26 | 2019-12-03 | 南通通富微电子有限公司 | The forming method of encapsulating structure |
| CN110534442A (en) * | 2019-07-26 | 2019-12-03 | 通富微电子股份有限公司 | The forming method of encapsulating structure |
| CN110544677A (en) * | 2019-07-26 | 2019-12-06 | 通富微电子股份有限公司 | packaging structure |
| CN110707071A (en) * | 2019-07-26 | 2020-01-17 | 南通通富微电子有限公司 | Packaging structure |
| CN110718536A (en) * | 2019-07-26 | 2020-01-21 | 南通通富微电子有限公司 | Packaging structure |
| CN110718472A (en) * | 2019-07-26 | 2020-01-21 | 南通通富微电子有限公司 | Forming method of packaging structure |
| CN110783208A (en) * | 2019-07-26 | 2020-02-11 | 南通通富微电子有限公司 | Forming method of packaging structure |
| CN110544677B (en) * | 2019-07-26 | 2023-03-14 | 通富微电子股份有限公司 | Packaging structure |
| CN110473844A (en) * | 2019-07-26 | 2019-11-19 | 通富微电子股份有限公司 | Encapsulating structure |
| WO2021017897A1 (en) * | 2019-07-26 | 2021-02-04 | Nantong Tongfu Microelectronics Co., Ltd | Packaging structure and fabrication method thereof |
| CN110534442B (en) * | 2019-07-26 | 2023-03-14 | 通富微电子股份有限公司 | Forming method of packaging structure |
| CN110473859B (en) * | 2019-07-26 | 2021-07-02 | 南通通富微电子有限公司 | Packaging structure |
| CN110459530B (en) * | 2019-07-26 | 2021-07-02 | 南通通富微电子有限公司 | Packaging structure |
| CN110534445B (en) * | 2019-07-26 | 2021-08-27 | 南通通富微电子有限公司 | Forming method of packaging structure |
| CN110718536B (en) * | 2019-07-26 | 2021-08-27 | 南通通富微电子有限公司 | Packaging structure |
| CN110504226B (en) * | 2019-07-26 | 2021-08-31 | 南通通富微电子有限公司 | Packaging structure |
| CN110504175B (en) * | 2019-07-26 | 2021-08-31 | 南通通富微电子有限公司 | Forming method of packaging structure |
| CN110783208B (en) * | 2019-07-26 | 2021-11-05 | 南通通富微电子有限公司 | Forming method of packaging structure |
| CN110718472B (en) * | 2019-07-26 | 2021-11-05 | 南通通富微电子有限公司 | Forming method of packaging structure |
| CN114641847A (en) * | 2019-10-24 | 2022-06-17 | 德州仪器公司 | Metal-clad chip scale package |
| CN113990812A (en) * | 2020-07-27 | 2022-01-28 | 华为技术有限公司 | Electronic packaging module and preparation method thereof |
| CN112234049B (en) * | 2020-12-21 | 2021-03-26 | 甬矽电子(宁波)股份有限公司 | Photoelectric sensor, manufacturing method thereof and electronic device |
| CN112234049A (en) * | 2020-12-21 | 2021-01-15 | 甬矽电子(宁波)股份有限公司 | Photoelectric sensor, manufacturing method thereof and electronic device |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201739031A (en) | 2017-11-01 |
| TWI632662B (en) | 2018-08-11 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107305883A (en) | Electronic package and manufacturing method thereof | |
| CN107887344B (en) | Electronic package structure and method for fabricating the same | |
| CN105845635B (en) | Electron package structure | |
| CN105304582B (en) | Package structure and method for fabricating the same | |
| TWI438885B (en) | Semiconductor package and fabrication method thereof | |
| US10157855B2 (en) | Semiconductor device including electric and magnetic field shielding | |
| US9179549B2 (en) | Packaging substrate having embedded passive component and fabrication method thereof | |
| CN106711118B (en) | Electronic package and manufacturing method thereof | |
| CN108807297A (en) | Electronic package and manufacturing method thereof | |
| JP2007318076A (en) | Sip module | |
| TWI453836B (en) | Semiconductor package and fabrication method thereof | |
| CN104517922B (en) | Stacked package structure and method for fabricating the same | |
| CN106910735A (en) | Electronic package | |
| CN105990270A (en) | Electronic package and manufacturing method thereof | |
| US20170338183A1 (en) | Manufacturing method of semiconductor package and manufacturing method of semiconductor device | |
| CN108074904B (en) | Electronic package and manufacturing method thereof | |
| CN105845638B (en) | Electron package structure | |
| US20180114762A1 (en) | Semiconductor package structure and method for manufacturing the same | |
| CN103021969B (en) | substrate, semiconductor package and manufacturing method thereof | |
| CN105845639B (en) | Electron package structure and conductive structure | |
| US10689249B2 (en) | Semiconductor device package including a wall and a grounding ring exposed from the wall | |
| CN107622953A (en) | Method for manufacturing package-on-package structure | |
| CN104183555B (en) | Semiconductor package and fabrication method thereof | |
| US20160309574A1 (en) | Printed circuit board | |
| CN108022907A (en) | Electronic module |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20171031 |