CN107257447B - The simulator of cmos image sensor - Google Patents
The simulator of cmos image sensor Download PDFInfo
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- CN107257447B CN107257447B CN201710285811.4A CN201710285811A CN107257447B CN 107257447 B CN107257447 B CN 107257447B CN 201710285811 A CN201710285811 A CN 201710285811A CN 107257447 B CN107257447 B CN 107257447B
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- simulator
- image sensor
- cmos image
- temperature
- cmos
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
Abstract
The simulator of cmos image sensor, it is related to a kind of simulator of cmos image sensor, it solves the problems, such as that problem hard, including FPGA, temperature sensor, photodiode, multipath A/D converter, load simulation circuit, interface circuit and power-supply system are debugged and checked in existing cmos image sensor AEROSPACE APPLICATION；Power-supply system is that FPGA, temperature sensor, photodiode, multipath A/D converter, load simulation circuit and interface circuit are powered.Simulator of the invention can substitute completely cmos image sensor and work.After simulator internal module detects that externally input operating voltage and working sequence are normal, the cmos image signal of simulation is exported；In train stage output verification data；During investigation problem, the accompanying clock of output data can be switched to SDR mode from DDR mode, and guarantee the phase of output image data and accompanying clock fixed the problem of debugging to facilitate, carrying out the quick positioning of abnormal image, remove hardware and software.
Description
Technical field
The present invention relates to a kind of simulators of cmos image sensor, and in particular to a kind of high speed for AEROSPACE APPLICATION
The simulator of the cmos image sensor of serial image data output.
Background technique
Compared with ccd image sensor, cmos image sensor does not need complicated driving circuit, small in size, low in energy consumption,
And it can work at still higher frequencies；With the progress of its technology, performance is promoted steadily, is had begun and is answered in space industry
With.
Cmos image sensor can be exported and be improved transfering clock by multichannel and realize high-speed camera, but common work
Mode is the input lower clock of frequency, and the high frequency clock that portion is obtained using frequency multiplication of phase locked loop in the chip is as internal work
Clock, at the same by after high frequency clock two divided-frequency as output image data DDR accompanying clock.Due to the figure of the output in each channel
As there is delay between data, and export image data and accompanying clock is inconsistent in the phase powered on every time, relative phase also with
The variation of operating voltage and temperature and change, to collect reliable and stable image, need to carry out bit check and word verification.For
The FPGA device of low side, it is internal not integrate IODELAY and BITSLIP module, need to realize opposite phase using such as DCM resource
The adjustment of position.When occurring the image abnormity of certain data channel in debugging process, hardly possible carries out the removing of hardware and software problem, asks
Inscribe location difficulty.In addition, the operating voltage overrate or electrifying timing sequence when cmos image sensor are abnormal, all exist and burn
The risk ruined；Cmos image sensor number of pins is more, and the device of straight cutting encapsulation dismantles difficulty, dismantles the cmos image sensing burnt
Device also will affect the reliability of wiring board AEROSPACE APPLICATION.
Summary of the invention
The present invention is to solve the problems, such as that problem hard is debugged and checked in existing cmos image sensor AEROSPACE APPLICATION, is provided
A kind of simulator of cmos image sensor.
The simulator of cmos image sensor, including FPGA, temperature sensor, photodiode, multichannel modulus turn
Parallel operation, load simulation circuit, interface circuit and power-supply system；
Interface of the interface circuit as simulator and cmos imaging circuit board, on the interface circuit welding with
The test probe of the identical number of pins of cmos image sensor realizes simulator and cmos imaging circuit board by test probe
Connection；
The photodiode receives externally input luminous energy, and external luminous energy is converted to analog voltage signal and is transmitted in
Multipath A/D converter；The multipath A/D converter is transmitted to after analog voltage signal is converted to digital signal
Digital signal is sent to outside by interface circuit by FPGA, the FPGA；
The supply voltage and driver' s timing signal of the feeding of the multipath A/D converter receiving interface circuit transmission, and
The electric sequence of supply voltage and CMOS driver' s timing signal is detected；
The load simulation circuit is directed to the power supply of cmos image sensor, using resistance and capacitor and MOSFET into
The power supply performance of cmos imaging circuit board is examined in the simulation of row cmos image sensor power supply state；
The temperature information of the temperature sensor acquisition is sent into FPGA, and FPGA is passed according to current temperature simulation cmos image
The data-bias of sensor modifies the relative phase of accompanying clock and data according to the changing value of temperature；
The power-supply system is FPGA, temperature sensor, photodiode, multipath A/D converter, load simulation are electric
Road and interface circuit power supply.
Beneficial effects of the present invention:
One, the simulator of cmos image sensor of the present invention can substitute cmos image sensor completely and carry out work
Make.After simulator internal module detects that externally input operating voltage and working sequence are normal, the CMOS figure of simulation is exported
As signal；In train stage output verification data；It, can be the accompanying clock of output data from the side DDR during investigation problem
Formula is switched to SDR mode, and guarantees that the phase of output image data and accompanying clock is fixed to facilitate debugging, carries out abnormal image
Quick positioning, remove hardware and software the problem of.
Two, when the power supply and driving of multipath A/D converter of the present invention while receiving interface circuit feeding
The electric sequence of sequential signal, supply voltage and power supply and CMOS driver' s timing signal to power supply detects, and mentions
Preceding discovery electrifying timing sequence mistake, avoids burning cmos image sensor.
Three, simulator of the present invention is conducive to the removing for carrying out software and hardware problem during the experiment, fastly
Speed carries out the detection of wiring board, accelerates problem and checks speed；
Four, the related screening experiment of wiring board can be carried out before detector welding；Improve success rate；It reduces on wiring board
The risk for dismantling socket, improves the reliability of AEROSPACE APPLICATION；
Five, relevant debugging and experiment can be carried out in the case where no cmos image sensor, speeded up the work.
Detailed description of the invention
Fig. 1 is the functional block diagram of the simulator of cmos image sensor of the present invention；
Fig. 2 is power supply and the electric sequence overhaul flow chart of the simulator of cmos image sensor of the present invention；
Fig. 3 is the structure chart of cmos image sensor power supply state of the present invention simulation.
Specific embodiment
Specific embodiment one illustrates present embodiment, the simulator of cmos image sensor, packet in conjunction with Fig. 1 and Fig. 3
Include FPGA, temperature sensor, photodiode, multipath A/D converter, load simulation circuit, interface circuit and power supply system
System；
Interface of the interface circuit as simulator and cmos imaging circuit board, on the interface circuit welding with
The test probe of the identical number of pins of cmos image sensor realizes simulator and cmos imaging circuit board by test probe
Connection；
The photodiode receives externally input luminous energy, and external luminous energy is converted to analog voltage signal and is transmitted in
Multipath A/D converter；The multipath A/D converter is transmitted to after analog voltage signal is converted to digital signal
Digital signal is sent to cmos image sensor by interface circuit by FPGA, the FPGA；
The supply voltage and driver' s timing signal of the feeding of the multipath A/D converter receiving interface circuit transmission, and
The electric sequence of supply voltage and CMOS driver' s timing signal is detected；
The load simulation circuit is directed to the power supply of cmos image sensor, using resistance and capacitor and MOSFET into
The power supply performance of cmos imaging circuit board is examined in the simulation of row cmos image sensor power supply state；
The temperature information of the temperature sensor acquisition is sent into FPGA, and FPGA is passed according to current temperature simulation cmos image
The data-bias of sensor modifies the relative phase of accompanying clock and data according to the changing value of temperature；
The power-supply system is FPGA, temperature sensor, photodiode, multipath A/D converter, load simulation are electric
Road and interface circuit power supply.
In present embodiment, multipath A/D converter receiving interface circuit is sent into simultaneously supply voltage and driver' s timing
The electric sequence of signal, supply voltage and power supply and CMOS driver' s timing signal to power supply detects.Work as confession
The deviation of electric supply voltage is no more than 5%, and the electric sequence of each power supply does not lag driver' s timing signal, it is believed that power supply
It is normal with electric sequence, error condition indication signal is otherwise provided, the equal relevant operations without simulated image data output.
Simulator described in present embodiment is communicated by spi, can be worked under three kinds of operating modes:
(1) train mode exports fixed gray value of image；
(2) self-correcting mode, the self-correcting image of output gray level gradual change, meets the rules such as increasing or decreasing；
(3) normal imaging mode is exported with exterior light according to the image of linear change, and can be passed through spi and be communicated modification output
The biasing of image and yield value.
Gray value=biasing+gain × the exterior light for exporting image shines corresponding grey scale value.Exterior light is logical according to corresponding grey scale value
The analogue value for crossing photodiode output obtains after multipath A/D converter is converted.
Interface circuit described in present embodiment welds the test probe of upper number of pins identical as cmos image sensor, leads to
The connection that pressing test probe realizes simulator and cmos imaging circuit board is crossed, it is easy to disassemble, and subsequent image biography is not influenced
Welding of the sensor in cmos imaging circuit board.
Load simulation circuit described in present embodiment is directed to the power supply of cmos image sensor, using resistance and electricity
Appearance and MOSFET carry out the simulation of cmos image sensor power supply state,
The electric current of resistance value R2=supply voltage ÷ static state；
Resistance value R1=(operating current of supply voltage ÷ stable state)-R2；Capacitance C1 is the electricity of cmos image sensor
The equivalent capacitance value of source capsule foot；MOSFET to open period and service time identical as the working condition of cmos image sensor.
The described static electric current is just to be powered on not carry out the operating current of SPI configuration in cmos image sensor；The work electricity of stable state
Stream carries out SPI with postponing to be powered in cmos image sensor, starts the average current for carrying out camera work.
Simulator described in present embodiment output image data can format identical with cmos image sensor, companion
It is DDR mode with clock；It can also be investigation hardware problem, accompanying clock is revised as SDR mode；Also exportable accompanying clock and
The phase fixed data format of output data.
Present embodiment adopts operating voltage to the acquisition of operating temperature and by interface circuit by temperature sensor
Collection, increases according to temperature or operating voltage reduction can all cause delay to increase, and temperature reduces or operating voltage raising can all cause
Delay reduces the data-bias of analog cmos imaging sensor, modifies accompanying clock and data according to the changing value of temperature and voltage
Relative phase.
Knots modification=K of relative phase × temperature change value+P × voltage change value, K are Temperature affection factor, and P is voltage
Influence coefficient.
Embodiment is described with reference to Fig. 3, in load simulation circuit, when control signal control is in MOSFETQ1
When shutdown, then only resistance R2 accesses power supply VCC, forms static working current；When control signal control makes MOSFET
When Q1 is on, then resistance R1 and R2 and capacitor C1 accesses power supply VCC simultaneously, forms dynamic duty electric current.
FPGA described in present embodiment uses the device XC6VLX240T-2FFG1156C of Xilinx company；Simulation
Cmos image sensor is multispectral section of cmos image sensor GL1216 of Chang Guangchen core company；The power-supply system uses LDO
Power supply chip；The load simulation circuit uses wire-wound resistor, ceramic disc capacitor and MOSFET, the multipath A/D converter
Using AD7718；The photodiode is using photodiode common in the market；The temperature sensor uses
DS18B20。
Claims (3)
- The simulator of 1.CMOS imaging sensor, including FPGA, temperature sensor, photodiode, multichannel analog-to-digital conversion Device, load simulation circuit, interface circuit and power-supply system；Interface of the interface circuit as simulator and cmos imaging circuit board, welding and CMOS on the interface circuit The test probe of the identical number of pins of imaging sensor realizes the company of simulator and cmos imaging circuit board by test probe It connects；The photodiode receives externally input luminous energy, and external luminous energy is converted to analog voltage signal and is transmitted in multi-pass Road analog-digital converter；The multipath A/D converter is transmitted to FPGA after analog voltage signal is converted to digital signal, institute It states FPGA and digital signal is sent to by outside by interface circuit；The supply voltage and driver' s timing signal of the multipath A/D converter receiving interface circuit transmission, and to supply voltage It is detected with the electric sequence of CMOS driver' s timing signal；Specific detection are as follows: when the deviation of supply voltage is less than or equal to 5%, and the electric sequence of each power supply does not lag driving Clock signal then determines that power supply is normal with electric sequence, otherwise provides error condition indication signal；The load simulation circuit is directed to the power supply of cmos image sensor, is carried out using resistance and capacitor and MOSFET The power supply performance of cmos imaging circuit board is examined in the simulation of cmos image sensor power supply state；The temperature information of the temperature sensor acquisition is sent into FPGA, and FPGA is according to current temperature simulation cmos image sensor Data-bias, according to the changing value of temperature modify accompanying clock and data relative phase；Specifically: the acquisition by temperature sensor to the acquisition of operating temperature and by interface circuit to operating voltage, according to Temperature increases or operating voltage reduction will lead to delay and increase, and temperature reduces or operating voltage raising will lead to delay and reduce The data-bias of analog cmos imaging sensor, according to the opposite phase of the changing value of temperature and voltage modification accompanying clock and data Position；Knots modification=K of relative phase × temperature change value+P × voltage change value, K are Temperature affection factor, and P is voltage influence Coefficient；The power-supply system be FPGA, temperature sensor, photodiode, multipath A/D converter, load simulation circuit and Interface circuit power supply.
- 2. the simulator of cmos image sensor according to claim 1, which is characterized in that single in photodiode The signal that a photodiode receives can be used for simulating the output signal of full line or whole frame cmos image sensor.
- 3. the simulator of cmos image sensor according to claim 1, which is characterized in that the simulator has three Kind operating mode:The first operating mode: train mode exports fixed gray value of image；Second of operating mode: self-correcting mode, the self-correcting image of output gray level gradual change meet increasing or decreasing rule；The third operating mode: imaging pattern is exported with exterior light according to the image of linear change, and defeated by spi communication modification The biasing of image and yield value out；Gray value=biasing+gain × the exterior light for exporting image shines corresponding grey scale value, and exterior light passes through light according to corresponding grey scale value The analogue value of electric diode output obtains after multipath A/D converter is converted.
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| WO2020061813A1 (en) * | 2018-09-26 | 2020-04-02 | 深圳市大疆创新科技有限公司 | Image processing system and method |
| CN113126067A (en) * | 2019-12-26 | 2021-07-16 | 华为技术有限公司 | Laser safety circuit and laser safety equipment |
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