CN107257447A - The analogue means of cmos image sensor - Google Patents
The analogue means of cmos image sensor Download PDFInfo
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- CN107257447A CN107257447A CN201710285811.4A CN201710285811A CN107257447A CN 107257447 A CN107257447 A CN 107257447A CN 201710285811 A CN201710285811 A CN 201710285811A CN 107257447 A CN107257447 A CN 107257447A
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- image sensor
- cmos image
- analogue means
- cmos
- fpga
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
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- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
The analogue means of cmos image sensor, it is related to a kind of analogue means of cmos image sensor, the problem of solving to debug in existing cmos image sensor AEROSPACE APPLICATION and investigate problem hard, including FPGA, temperature sensor, photodiode, multipath A/D converter, load simulation circuit, interface circuit and power-supply system；Power-supply system is that FPGA, temperature sensor, photodiode, multipath A/D converter, load simulation circuit and interface circuit are powered.The analogue means of the present invention can substitute cmos image sensor completely and be operated.Analogue means internal module detect outside input operating voltage and work schedule it is normal after, export simulation cmos image signal；In train stage output verification data；During investigation problem, the accompanying clock of output data from DDR modes can be switched to SDR modes, and ensure the phase fixation of output image data and accompanying clock to facilitate debugging, the problem of carrying out the quick positioning of abnormal image, stripping hardware and software.
Description
Technical field
The present invention relates to a kind of analogue means of cmos image sensor, and in particular to a kind of high speed for AEROSPACE APPLICATION
The analogue means of the cmos image sensor of serial image data output.
Background technology
Compared with ccd image sensor, the drive circuit that cmos image sensor need not be complicated, small volume is low in energy consumption,
And can work at still higher frequencies；With the progress of its technology, its performance is lifted steadily, and having begun to should in space industry
With.
Cmos image sensor can be exported and be improved transfering clock by multichannel and realize high-speed camera, but common work
Mode is the relatively low clock of incoming frequency, and internal work is used as using the high frequency clock of frequency multiplication of phase locked loop acquisition in chip internal
Clock, while using the DDR accompanying clocks after high frequency clock two divided-frequency as output image data.Due to the figure of the output of each passage
As there is delay between data, and output image data and accompanying clock phase electric on every time are inconsistent, relative phase also with
The change of operating voltage and temperature and change, for collect reliable and stable image, it is necessary to carry out bit check and word verification.For
The FPGA device of low side, internal not integrated IODELAY and BITSLIP modules are, it is necessary to realize relative phase using such as DCM resources
The adjustment of position.When occurring the image abnormity of certain data channel in debugging process, hardly possible carries out the stripping of hardware and software problem, asks
Inscribe location difficulty.In addition, when the operating voltage overrate or electrifying timing sequence of cmos image sensor are abnormal, all existing and burning
The risk ruined；Cmos image sensor number of pins is more, and the device dismounting of straight cutting encapsulation is difficult, dismantles the cmos image sensing burnt
Device can also influence the reliability of wiring board AEROSPACE APPLICATION.
The content of the invention
The present invention for solve the problem of debugging and investigation problem hard in existing cmos image sensor AEROSPACE APPLICATION there is provided
A kind of analogue means of cmos image sensor.
The analogue means of cmos image sensor, including FPGA, temperature sensor, photodiode, multichannel modulus turn
Parallel operation, load simulation circuit, interface circuit and power-supply system；
The interface circuit as analogue means and cmos imaging circuit board interface, on the interface circuit welding with
The test probe of the identical number of pins of cmos image sensor, analogue means and cmos imaging circuit board are realized by testing probe
Connection；
The photodiode receives the luminous energy of outside input, and outside luminous energy is converted into analog voltage signal is transmitted in
Multipath A/D converter；Analog voltage signal is converted to and is sent to after data signal by the multipath A/D converter
Data signal is sent to outside by FPGA, the FPGA by interface circuit；
The supply voltage and driver' s timing signal of the feeding of the multipath A/D converter receiving interface circuit transmission, and
The electric sequence of supply voltage and CMOS driver' s timing signals is detected；
The load simulation circuit is directed to the power supply of cmos image sensor, is entered using resistance and electric capacity and MOSFET
The simulation of row cmos image sensor power supply state, examines the power supply performance of cmos imaging circuit board；
Temperature information the feeding FPGA, FPGA of the temperature sensor collection are passed according to current temperature simulation cmos image
The data-bias of sensor, the relative phase of accompanying clock and data is changed according to the changing value of temperature；
The power-supply system is FPGA, temperature sensor, photodiode, multipath A/D converter, load simulation electricity
Road and interface circuit are powered.
Beneficial effects of the present invention：
First, the analogue means of cmos image sensor of the present invention can substitute cmos image sensor completely and carry out work
Make.Analogue means internal module detect outside input operating voltage and work schedule it is normal after, output simulation CMOS figure
As signal；In train stage output verification data；, can be the accompanying clock of output data from DDR side during investigation problem
Formula switches to SDR modes, and the phase fixation of guarantee output image data and accompanying clock carries out abnormal image to facilitate debugging
Quick positioning, peel off hardware and software the problem of.
2nd, the multipath A/D converter of the present invention power supply of receiving interface circuit feeding and during driving simultaneously
Sequential signal, the electric sequence of supply voltage and power supply and CMOS driver' s timing signals to power supply is detected, is carried
Preceding discovery electrifying timing sequence mistake, it is to avoid burn cmos image sensor.
3rd, analogue means of the present invention is conducive to carrying out the stripping of software and hardware problem in experimentation, soon
Speed carries out the detection of wiring board, accelerates problem investigation speed；
4th, the related screening experiment of wiring board can be carried out before detector welding；Improve success rate；Reduce on wiring board
The risk of socket is dismantled, the reliability of AEROSPACE APPLICATION is improved；
5th, the debugging and experiment of correlation can be carried out in the case of without cmos image sensor, is speeded up the work.
Brief description of the drawings
Fig. 1 is the theory diagram of the analogue means of cmos image sensor of the present invention；
Power supplies and electric sequence overhaul flow chart of the Fig. 2 for the analogue means of cmos image sensor of the present invention；
Fig. 3 is the structure chart that cmos image sensor power supply state of the present invention is simulated.
Embodiment
Embodiment one, illustrate present embodiment with reference to Fig. 1 and Fig. 3, the analogue means of cmos image sensor, bag
Include FPGA, temperature sensor, photodiode, multipath A/D converter, load simulation circuit, interface circuit and power supply system
System；
The interface circuit as analogue means and cmos imaging circuit board interface, on the interface circuit welding with
The test probe of the identical number of pins of cmos image sensor, analogue means and cmos imaging circuit board are realized by testing probe
Connection；
The photodiode receives the luminous energy of outside input, and outside luminous energy is converted into analog voltage signal is transmitted in
Multipath A/D converter；Analog voltage signal is converted to and is sent to after data signal by the multipath A/D converter
Data signal is sent to cmos image sensor by FPGA, the FPGA by interface circuit；
The supply voltage and driver' s timing signal of the feeding of the multipath A/D converter receiving interface circuit transmission, and
The electric sequence of supply voltage and CMOS driver' s timing signals is detected；
The load simulation circuit is directed to the power supply of cmos image sensor, is entered using resistance and electric capacity and MOSFET
The simulation of row cmos image sensor power supply state, examines the power supply performance of cmos imaging circuit board；
Temperature information the feeding FPGA, FPGA of the temperature sensor collection are passed according to current temperature simulation cmos image
The data-bias of sensor, the relative phase of accompanying clock and data is changed according to the changing value of temperature；
The power-supply system is FPGA, temperature sensor, photodiode, multipath A/D converter, load simulation electricity
Road and interface circuit are powered.
In present embodiment, multipath A/D converter receiving interface circuit is sent into simultaneously supply voltage and driver' s timing
Signal, the electric sequence of supply voltage and power supply and CMOS driver' s timing signals to power supply is detected.Work as confession
The deviation of electric supply voltage is no more than 5%, and the not delayed driver' s timing signal of electric sequence of each power supply, it is believed that power supply
It is normal with electric sequence, error condition indication signal is otherwise provided, associative operation is waited without what simulated image data was exported.
Analogue means described in present embodiment is communicated by spi, can be worked under three kinds of mode of operations：
(1) train patterns, export fixed image intensity value；
(2) self-correcting pattern, the self-correcting image of output gray level gradual change, meets the rules such as increasing or decreasing；
(3) normal imaging mode, is exported with image of the exterior light according to linear change, and can pass through spi communication modification outputs
The biasing of image and yield value.
Gray value=biasing+gain × exterior light of output image shines corresponding grey scale value.Exterior light is logical according to corresponding grey scale value
Cross photodiode output the analogue value changed through multipath A/D converter after acquisition.
The test probe of the upper number of pins identical with cmos image sensor of interface circuit welding described in present embodiment, leads to
The connection that pressing test probe realizes analogue means and cmos imaging circuit board, convenient dismounting are crossed, and does not influence successive image to pass
Welding of the sensor in cmos imaging circuit board.
Load simulation circuit described in present embodiment is directed to the power supply of cmos image sensor, using resistance and electricity
Appearance and MOSFET carry out the simulation of cmos image sensor power supply state,
Electric current static resistance value R2=supply voltages ÷；
Resistance value R1=(operating current of supply voltage ÷ stable states)-R2；Capacitance C1 is the electricity of cmos image sensor
The equivalent capacitance value of source capsule pin；MOSFET to open cycle and service time identical with the working condition of cmos image sensor.
Described static electric current does not carry out the operating current of SPI configurations just to have been powered up in cmos image sensor；The work electricity of stable state
Flow to carry out SPI with postponing in cmos image sensor power-up, proceed by the average current of camera work.
The view data of analogue means output described in present embodiment can be with cmos image sensor identical form, companion
It is DDR modes with clock；Or investigation hardware problem, accompanying clock is revised as SDR modes；Also exportable accompanying clock and
The phase fixed data form of output data.
Present embodiment is adopted by temperature sensor to the collection of operating temperature and by interface circuit to operating voltage
Collection, can all cause delay increase, temperature reduction or operating voltage, which are improved, can all cause according to temperature rise or operating voltage reduction
Delay reduces the data-bias of analog cmos imaging sensor, and accompanying clock and data are changed according to the changing value of temperature and voltage
Relative phase.
Knots modification=K of relative phase × temperature change value+P × voltage change value, K is Temperature affection factor, and P is voltage
Influence coefficient.
Illustrate with reference to Fig. 3 in present embodiment, load simulation circuit, when control signal control is in MOSFETQ1
During shut-off, then only resistance R2 accesses power supply VCC, forms static working current；When control signal control makes MOSFET
When Q1 is on, then resistance R1 and R2 and electric capacity C1 accesses power supply VCC simultaneously, forms dynamic duty electric current.
FPGA described in present embodiment uses the device XC6VLX240T-2FFG1156C of Xilinx companies；Simulation
Cmos image sensor is many spectral coverage cmos image sensor GL1216 of Chang Guangchen cores company；The power-supply system uses LDO
Power supply chip；The load simulation circuit uses wire-wound resistor, ceramic disc capacitor and MOSFET, described multipath A/D converter
Using AD7718；Described photodiode is using the common photodiode of in the market；Described temperature sensor is used
DS18B20。
Claims (5)
- The analogue means of 1.CMOS imaging sensors, including FPGA, temperature sensor, photodiode, multichannel analog-to-digital conversion Device, load simulation circuit, interface circuit and power-supply system；The interface circuit is as analogue means and the interface of cmos imaging circuit board, welding and CMOS on the interface circuit The test probe of the identical number of pins of imaging sensor, the company of analogue means and cmos imaging circuit board is realized by testing probe Connect；The photodiode receives the luminous energy of outside input, and outside luminous energy is converted to analog voltage signal and is transmitted in leads to more Road analog-digital converter；The multipath A/D converter, which is converted to analog voltage signal, is sent to FPGA after data signal, institute State FPGA and data signal is sent to by outside by interface circuit；The supply voltage and driver' s timing signal of the feeding of the multipath A/D converter receiving interface circuit transmission, and to supplying The electric sequence of piezoelectric voltage and CMOS driver' s timing signals is detected；The load simulation circuit is directed to the power supply of cmos image sensor, is carried out using resistance and electric capacity and MOSFET The simulation of cmos image sensor power supply state, examines the power supply performance of cmos imaging circuit board；The temperature information feeding FPGA of the temperature sensor collection, FPGA is according to current temperature simulation cmos image sensor Data-bias, the relative phase of accompanying clock and data is changed according to the changing value of temperature；The power-supply system be FPGA, temperature sensor, photodiode, multipath A/D converter, load simulation circuit and Interface circuit is powered.
- 2. the analogue means of cmos image sensor according to claim 1, it is characterised in that in photodiode, single The signal that individual photodiode is received can be used for the output signal of simulation full line or whole frame cmos image sensor.
- 3. the analogue means of cmos image sensor according to claim 1, it is characterised in that the multichannel modulus turns Parallel operation is detected to the electric sequence of supply voltage and CMOS driver' s timing signals, when the deviation of supply voltage is less than or equal to 5%, and the not delayed driver' s timing signal of electric sequence of each power supply, then judge that power supply is normal with electric sequence, otherwise gives Make mistake condition indicative signal.
- 4. the analogue means of cmos image sensor according to claim 1, it is characterised in that the analogue means has three Plant mode of operation：The first mode of operation：Train patterns, export fixed image intensity value；Second of mode of operation：Self-correcting pattern, the self-correcting image of output gray level gradual change, meets increasing or decreasing rule；The third mode of operation：Imaging pattern, is exported with image of the exterior light according to linear change, and defeated by spi communication modifications Go out biasing and the yield value of image；Gray value=biasing+gain × exterior light of output image shines corresponding grey scale value, and exterior light passes through light according to corresponding grey scale value The analogue value of electric diode output is obtained after being changed through multipath A/D converter.
- 5. the analogue means of cmos image sensor according to claim 1, it is characterised in that the temperature sensor pair The collection of operating temperature and the collection by interface circuit to operating voltage, the FPGA is according to the change of temperature change value and voltage Change value changes the relative phase of accompanying clock and data；Knots modification=K × temperature change value+P × voltage change of relative phaseWherein, K is Temperature affection factor, and P is voltage influence coefficient.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201710285811.4A CN107257447B (en) | 2017-04-27 | 2017-04-27 | The simulator of cmos image sensor |
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| CN201710285811.4A CN107257447B (en) | 2017-04-27 | 2017-04-27 | The simulator of cmos image sensor |
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| CN107257447B CN107257447B (en) | 2019-11-29 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110771159A (en) * | 2018-09-26 | 2020-02-07 | 深圳市大疆创新科技有限公司 | Image processing system and image processing method |
| CN113126067A (en) * | 2019-12-26 | 2021-07-16 | 华为技术有限公司 | Laser safety circuit and laser safety equipment |
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| CN113126067A (en) * | 2019-12-26 | 2021-07-16 | 华为技术有限公司 | Laser safety circuit and laser safety equipment |
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| CN107257447B (en) | 2019-11-29 |
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