CN107256834A - 一种基于钯铜线的半导体键合工艺 - Google Patents
一种基于钯铜线的半导体键合工艺 Download PDFInfo
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- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 title claims abstract description 129
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 title claims abstract description 83
- 229910052802 copper Inorganic materials 0.000 title claims abstract description 76
- 239000010949 copper Substances 0.000 title claims abstract description 76
- 229910052763 palladium Inorganic materials 0.000 title claims abstract description 60
- 238000000034 method Methods 0.000 title claims abstract description 44
- 239000004065 semiconductor Substances 0.000 title claims abstract description 33
- 238000003466 welding Methods 0.000 claims abstract description 50
- 229910000679 solder Inorganic materials 0.000 claims abstract description 48
- 238000005476 soldering Methods 0.000 claims abstract description 17
- 239000007789 gas Substances 0.000 claims abstract description 15
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 12
- 230000001681 protective effect Effects 0.000 claims abstract description 8
- 239000001257 hydrogen Substances 0.000 claims abstract description 7
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 7
- 238000007747 plating Methods 0.000 claims abstract description 7
- 239000000203 mixture Substances 0.000 claims abstract description 6
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 6
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 24
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 15
- 229910052737 gold Inorganic materials 0.000 claims description 15
- 239000010931 gold Substances 0.000 claims description 15
- 229910052751 metal Inorganic materials 0.000 claims description 14
- 239000002184 metal Substances 0.000 claims description 14
- 229910052759 nickel Inorganic materials 0.000 claims description 12
- 239000011324 bead Substances 0.000 claims description 11
- 229910052782 aluminium Inorganic materials 0.000 claims description 8
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 8
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 7
- 229910052709 silver Inorganic materials 0.000 claims description 7
- 239000004332 silver Substances 0.000 claims description 7
- 239000004411 aluminium Substances 0.000 claims description 5
- 230000005611 electricity Effects 0.000 claims description 4
- 241000251468 Actinopterygii Species 0.000 claims description 3
- 238000005520 cutting process Methods 0.000 claims description 2
- 125000004435 hydrogen atom Chemical class [H]* 0.000 claims 1
- 241000218202 Coptis Species 0.000 abstract description 13
- 235000002991 Coptis groenlandica Nutrition 0.000 abstract description 13
- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 abstract description 8
- 230000009286 beneficial effect Effects 0.000 abstract description 4
- 229960004643 cupric oxide Drugs 0.000 abstract description 4
- 150000002431 hydrogen Chemical class 0.000 abstract description 4
- 230000000694 effects Effects 0.000 abstract description 3
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 abstract description 2
- 239000000758 substrate Substances 0.000 description 9
- 241000196324 Embryophyta Species 0.000 description 7
- 229910000570 Cupronickel Inorganic materials 0.000 description 4
- 238000005538 encapsulation Methods 0.000 description 4
- BBKFSSMUWOMYPI-UHFFFAOYSA-N gold palladium Chemical compound [Pd].[Au] BBKFSSMUWOMYPI-UHFFFAOYSA-N 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000005336 cracking Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 239000008246 gaseous mixture Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- UIFOTCALDQIDTI-UHFFFAOYSA-N arsanylidynenickel Chemical group [As]#[Ni] UIFOTCALDQIDTI-UHFFFAOYSA-N 0.000 description 1
- 238000010009 beating Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000009514 concussion Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000007717 exclusion Effects 0.000 description 1
- 235000003642 hunger Nutrition 0.000 description 1
- 229910000765 intermetallic Inorganic materials 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052752 metalloid Inorganic materials 0.000 description 1
- 150000002738 metalloids Chemical class 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
- 239000010979 ruby Substances 0.000 description 1
- 229910001750 ruby Inorganic materials 0.000 description 1
- 230000037351 starvation Effects 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 230000005619 thermoelectricity Effects 0.000 description 1
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Abstract
本发明涉及一种基于钯铜线的半导体键合工艺,包括:A. 劈刀移至芯片焊盘的位置,使用表面镀钯的纯铜线构成的焊线线材制作第一个焊点的焊球;B. 拉线弧,焊线线材被拉起到设定的高度后,从最高点移动到第二个焊点的位置,完成焊接线材的走线;C. 劈刀移至PCB板的焊盘的位置,使用焊线线材焊接第二个焊点;其中,制作第一个焊点和第二个焊点时,使用保护气体充盈劈刀及劈刀的周边,保护气体的成分为:95%~99%氮气和1%~5%的氢气,重量百分比。钯铜线的价格只有不到金线价格的10%,可以节约大量的成本;在键合过程中,使用氢气作为保护气,可以将铜从氧化铜里面还原出来;键合工艺参数范围变宽,非常有利于调整到最佳的工艺参数,获得优良的键合效果。
Description
技术领域
本发明涉及半导体封装技术领域,尤其涉及一种基于钯铜线的半导体键合工艺。
背景技术
目前封装行业还是以金线键合为主,金线键合一直在封装工艺中占据着主导地位。随着封装产品价格的下行,金线价格已成为封装行业的不能承受之重,降低封装的成本是市场的迫切要求。
近年来,铜作为金线键合的替代材料已经快速取得了稳固的地位,它的优势包括比金有更高的导电性和导热性,较少形成IMC(Inter-metallic Compound,是指金属与金属、金属与类金属之间,以金属键或者共价键形式结合而成的化合物),同时具有更好的机械稳定性。
然而,铜线极易氧化,表面生成的氧化铜,氧化铜会导致键合工艺的失效。因此在键合过程中,必须配置保护气,以防止铜线的氧化。因此,对比金线,铜线键合存在工艺更复杂,难度更高,焊接工艺参数范围窄等问题。
发明内容
针对上述现有技术存在的不足,本发明的目的在于提供成本更低的、工艺相对简单的、操作难度更小的、焊接工艺参数范围较宽的基于钯铜线的半导体键合工艺。
一种基于钯铜线的半导体键合工艺,包括:
A. 劈刀移至芯片焊盘的位置,使用表面镀钯的纯铜线构成的焊线线材制作第一个焊点的焊球;
B. 拉线弧,焊头带动劈刀往上抬起,焊线线材被拉起到设定的高度后,从最高点移动到PCB板第二个焊点的位置,完成焊接线材的走线;
C. 劈刀移至PCB板的焊盘的位置,使用焊线线材焊接第二个焊点;
其中,制作第一个焊点和第二个焊点时,使用保护气体充盈劈刀及劈刀的周边,保护气体的成分为:95%~99%氮气和1%~5%的氢气,重量百分比。
优选的,芯片焊盘为铝焊盘或金焊盘,第一个焊点的焊球大小为芯片焊盘的大小的80%~95%。
优选的,PCB板的焊盘包括从下而上的三层金属:铜层、镍层和银层,或铜层、镍层和金层,其中,铜层的厚度为500~800 μm,镍层的厚度为150~250 μm,银层的厚度为60~120μm,金层的厚度为1~5 μm。
优选的,制作第一个焊点的焊球时,包括预烧球阶段获得预烧球;
预烧球阶段:打火杆尖端与露出劈刀的焊接线材之间放电形成一个完整的电流回路,电流回路的电流为25~35 mA。(EFO电流越大,钯元素融入FAB内部越多,造成FAB硬度越大,进而会导致焊接过程芯片焊盘的开裂或脱落。控制钯元素融入FAB的比例,使用特制劈刀)
优选的,预烧球的直径的3/4以内,钯元素所占重量比例低于10%。
优选的,预烧球阶段:使用环形喷嘴从下向上吹向焊接线材的端部的周侧,从下向上吹,使钯元素少向预烧球的内部扩散。
优选的,焊接线材的直径为0.6~0.8 mil。
优选的,焊接线材的直径为0.8 mil,钯金属层的厚度为4~8 μm;制作第一个焊点时,预烧球阶段电子打火后线尾烧结形成的小球的直径为1.6~2 mil,焊接压力为30~50 g,焊接的功率为120~150 mv,焊接时间为10~16 ms。
优选的,焊接第二个焊点时,预烧球阶段电子打火后线尾烧结形成的小球的直径为1.8~2.2 mil,焊接压力为70~90 g,切鱼尾的焊接功率为120~150 mv。
优选的,步骤A之前,还包括:
A1:在PCB板的焊盘的位置种球,种球包括种球预烧球阶段和烧球阶段,种球预烧球阶段电子打火后线尾烧结形成的小球的直径为1.8~2.2 mil,烧球阶段,打火杆尖端与露出劈刀的焊接线材之间放电形成一个完整的电流回路,形成直径为1.8~2.2 mil的预植球;预植球成为第二个焊点。
优选的,在焊接第二个焊点时,键合温度设置为140℃~170℃,焊焊接时间设置为10~16 ms,焊接功率为65~95 mw。
名词解释:
键合(Wire Bonding)-半导体封装中用金属导线将芯片(IC或LED)的电极与外部引脚相连接的工艺,即完成芯片与封装外引脚之间的电流通路。
超声波焊接-借助超声波的机械震荡使得接触面加热到高塑性状态,然后施加压力焊接。
在裸铜线外镀上一层厚度为0.1-0.2μm的钯金属后,其抗氧化性变强,铜线在氮气柜内储存期只有6个月,而钯铜线在一般防潮柜内即可以存放半年以上。
Forming Gas-保护气,为了防止钯铜线在键合过程氧化,需要使用混合气(95~99%的N2和1~5%的H2)来做保护。
PCB板:印制电路板{PCB线路板},又称印刷电路板,是电子元器件电气连接的提供者。
基板:PCB板中的一种,是线路更精细的PCB板。
本发明的有益效果为:一种基于钯铜线的半导体键合工艺,包括:A. 劈刀移至芯片焊盘的位置,使用表面镀钯的纯铜线构成的焊线线材制作第一个焊点的焊球;B. 拉线弧,焊头带动劈刀往上抬起,焊线线材被拉起到设定的高度后,从最高点移动到PCB板第二个焊点的位置,完成焊接线材的走线;C. 劈刀移至PCB板的焊盘的位置,使用焊线线材焊接第二个焊点;其中,制作第一个焊点和第二个焊点时,使用保护气体充盈劈刀及劈刀的周边,保护气体的成分为:95%~99%氮气和1%~5%的氢气,重量百分比。钯铜线的价格只有不到金线价格的10%,因此可以节约大量的成本。在键合过程中,使用保护气可以杜绝钯铜线的氧化问题,即使钯铜线有轻微氧化,混合气里面的氢气可以将铜从氧化铜里面还原出来。同时,钯铜线的键合工艺参数范围变宽,非常有利于工艺工程师调整到最佳的工艺参数,获得优良的键合效果。
附图说明
图1是本发明一种基于钯铜线的半导体键合工艺的实施例一的步骤一的结构示意图。
图2是本发明一种基于钯铜线的半导体键合工艺的实施例一的步骤二的结构示意图。
图3是本发明一种基于钯铜线的半导体键合工艺的实施例一的步骤三的结构示意图。
图4是本发明一种基于钯铜线的半导体键合工艺的实施例一的步骤四的结构示意图。
图5是本发明一种基于钯铜线的半导体键合工艺的实施例一的步骤五的结构示意图。
图6是本发明一种基于钯铜线的半导体键合工艺的实施例二的步骤一的结构示意图。
图7是本发明一种基于钯铜线的半导体键合工艺的实施例二的步骤三的结构示意图。
图8是本发明一种基于钯铜线的半导体键合工艺的实施例二的步骤四的结构示意图。
图9是本发明一种基于钯铜线的半导体键合工艺的实施例二的步骤五的结构示意图。
图10是本发明一种基于钯铜线的半导体键合工艺的实施例二的步骤六的结构示意图。
图11是本发明一种基于钯铜线的半导体键合工艺的实施例三的流程图。
图中:
11-预烧球;12-镀钯铜线;13-劈刀内腔;14-劈刀;21-基板;211-基板焊盘;22-粘接胶;23-芯片(IC);24-芯片焊垫;25-第一焊球;31-PCB板;311-板焊盘;4-预植球。
具体实施方式
以下结合附图对本发明的实施例进行详细说明,但是本发明可以由权利要求限定和覆盖的多种不同方式实施。
如图1至图11所示,
实施例一
本实施例提供的一种基于钯铜线的半导体键合工艺,它包括:
步骤1:烧球,EFO (EFO,Electronic Flame Offs,由打火盒产生的高压电通过打火电缆传导至打火杆尖端,与露出劈刀的金属线之间放电形成一个完整的电流回路。)过后形成预烧球11(预烧球,FAB ,Free Air Ball,即引线键合预烧球阶段电子打火后线尾烧结形成的小球。)预烧球11的大小为1.6-2.0mil,其中11为预烧球,12为焊接线材,13为劈刀空腔,14为劈刀。见图1。
步骤2:1焊焊接(第一个焊点的焊接),劈刀14移动到1焊芯片焊垫24位置,在设定的功率、压力和温度的作用下,完成1焊焊接。芯片焊垫24位于芯片23上,芯片23通过粘接胶22粘接在基板21上。此过程在芯片焊垫24上形成均匀而薄的金钯铜IMC(芯片焊垫24为金时,芯片焊垫24也叫芯片焊盘)或铝钯铜IMC(芯片焊垫24为铝时),第一焊球25的直径为芯片焊垫24大小的80%~95%,第一焊球25过小会造成芯片焊垫24产生孔洞,第一焊球25过大会造成芯片焊垫24的金属挤出从而出现短路现象。见图2。
步骤3:拉线弧,焊头带动劈刀14往上抬起,焊接线材12被拉起到设定的高度后,线夹关闭,见图3。
步骤4:焊头从最高点移动到基板21二焊位置(基板焊盘211),探测高度后松开线夹,焊头继续往下移动,劈刀14和基板焊盘211接触后,在设定的功率、压力和温度的作用下完成二焊焊接。此过程中在基板21二焊功能区形成了均匀而薄的铜镍金钯铜IMC(基板焊盘表面为镍金时)或铜镍银钯铜IMC(基板焊盘表面为镍银时),见图4。
步骤5:焊头带动劈刀14往上移动,线夹关闭,线尾被拉断,见图5。回到步骤1,循环往复。完成多个焊点之间的引线键合。
实施例二:
本实施例提供的一种基于钯铜线的半导体键合工艺,它包括:
步骤1:先在PCB板31的板焊盘311(二焊功能区311)制作预植球4,预烧球大小设置为1.8-2.2 mil。此过程中在二焊功能区311形成了均匀而薄的铜镍金钯铜IMC(板焊盘311为铜、镍、金三层)或铜镍银钯铜IMC(板焊盘311为铜、镍、银三层),见图6。
步骤2:烧球,EFO (EFO,Electronic Flame Offs,由打火盒产生的高压电通过打火电缆传导至打火杆尖端,与露出劈刀的金属线之间放电形成一个完整的电流回路。)过后形成预烧球11(预烧球,FAB ,Free Air Ball,即引线键合预烧球阶段电子打火后线尾烧结形成的小球。)预烧球11的大小为1.6-2.0mil,其中11为预烧球,12为焊接线材,13为劈刀空腔,14为劈刀。见图1。
步骤3:1焊焊接(第一个焊点的焊接),劈刀14移动到1焊芯片焊垫24位置,在设定的功率、压力和温度的作用下,完成1焊焊接。芯片焊垫24位于芯片23上,芯片23通过粘接胶22粘接在基板21上。此过程在芯片焊垫24上形成均匀而薄的金钯铜IMC(芯片焊垫24为金时,芯片焊垫24也叫芯片焊盘)或铝钯铜IMC(芯片焊垫24为铝时),第一焊球25的直径为芯片焊垫24大小的80%~95%,第一焊球25过小会造成芯片焊垫24产生孔洞,第一焊球25过大会造成芯片焊垫24的金属挤出从而出现短路现象。参阅图7。
步骤4:拉线弧,焊头带动劈刀14往上抬起,焊接线材12被拉起到设定的高度后,线夹关闭,见图8。
步骤5:焊头从最高点移动到PCB板31二焊位置(预植球4),探测高度后松开线夹,焊头继续往下移动,劈刀14和预植球4接触后,在设定的功率、压力和温度的作用下完成二焊焊接。见图9。
步骤6:焊头带动劈刀14往上移动,线夹关闭,线尾被拉断。见图10。回到步骤1,循环往复。完成多个焊点之间的引线键合。
本实施例中,PCB板31为LED基板。
本发明技术方案带来的有益效果:
本发明提供一种LED钯铜线键合工艺,同时提供一整套钯铜线的工艺参数。
①:钯铜线价格不到金线的1/10,可以极大地降低LED封装的成本;
②:与金线相比,钯铜线有更高的导电性,电导率约高出25%,金电导率为0.42(μΩ.cm)-1,铜的为0.62(μΩ.cm)-1),可以更有效地降低封装系统的阻抗;
③: 与金线相比,钯铜线有更高的导热性,金的热导率为317W(m.k),铜的为400 W(m.k),可以更好的导出芯片的热量,能有效降低芯片的结温,从而可以提升芯片的发光效率;
④:与金线相比,钯铜线有更高的拉伸强度,金的拉伸强度为11kgf/mm-2,铜的拉伸强度为20kgf/mm-2;
⑤:相比金线焊点,铜线焊点中IMC的生长速度慢,从而提升了引线键合的强度,具有极好的机械稳定性。
⑥:相比金线,铜线的电阻和产热低,此外,电阻随时间增加量也低,具有极佳的可靠性。
实施例三
见图11。
一种基于钯铜线的半导体键合工艺,包括:
A. 劈刀移至芯片焊盘的位置,使用表面镀钯的纯铜线构成的焊线线材制作第一个焊点的焊球;
B. 拉线弧,焊头带动劈刀往上抬起,焊线线材被拉起到设定的高度后,从最高点移动到PCB板第二个焊点的位置,完成焊接线材的走线;
C. 劈刀移至PCB板的焊盘的位置,使用焊线线材焊接第二个焊点;
其中,制作第一个焊点和第二个焊点时,使用保护气体充盈劈刀及劈刀的周边,保护气体的成分为:95%~99%氮气和1%~5%的氢气,重量百分比。
95~99%的N2和1~5%的H2混和合气通过焊线机打火杆,充盈劈刀及周边,在键合的过程中制造隔绝氧气的氛围,达到防止钯铜线氧化的目的。
本实施例中,选用红宝石粗化的劈刀,其硬度加大,耐磨性更佳。
本实施例中,芯片焊盘为铝焊盘或金焊盘,第一个焊点的焊球大小为芯片焊盘的大小的80%~95%。(铝焊盘或金焊盘的厚度为120~250 μm)
本实施例中,PCB板的焊盘包括从下而上的三层金属:铜层、镍层和银层,或铜层、镍层和金层,其中,铜层的厚度为500~800 μm,镍层的厚度为150~250 μm,银层的厚度为60~120μm,金层的厚度为1~5 μm。
本实施例中,制作第一个焊点的焊球时,包括预烧球阶段获得预烧球;
预烧球阶段:EFO电流为25~35 mA(EFO电流越大,钯元素融入FAB内部越多,造成FAB硬度越大,进而会导致焊接过程芯片焊盘的开裂或脱落。)
本实施例中,预烧球的直径的3/4以内,钯元素所占重量比例低于10%。
本实施例中,预烧球阶段:使用环形喷嘴吹向焊接线材的端部的周侧,使钯元素少向预烧球的内部扩散。
本实施例中,焊接线材的直径为0.8 mil,钯金属层的厚度为4~8 μm,镀钯金属将纯铜线芯和空气隔绝起来,由于钯金抗氧化性强,镀钯铜线在一般的环境下可以存放1年。制作第一个焊点时,预烧球阶段电子打火后线尾烧结形成的小球的直径为1.6~2 mil,焊接压力为30~50 g,焊接的功率为120~150 mv,焊接时间为10~16 ms。
本实施例中,焊接第二个焊点时,预烧球阶段电子打火后线尾烧结形成的小球的直径为1.8~2.2 mil,焊接压力为70~90 g,切鱼尾的焊接功率为120 mw~150 mv。
本实施例中,步骤A之前,还包括:
A1:在PCB板的焊盘的位置种球,种球包括种球预烧球阶段和烧球阶段,种球预烧球阶段电子打火后线尾烧结形成的小球的直径为1.8~2.2 mil,烧球阶段,打火杆尖端与露出劈刀的焊接线材之间放电形成一个完整的电流回路,形成直径为1.8~2.2 mil的预植球。
本实施例中,在焊接第二个焊点时,键合温度设置为140℃~170℃,焊焊接时间设置为10~16 ms,焊接功率为65~95 mw。
以上所述仅为本发明的优选实施例,并非因此限制本本发明的专利范围,凡是利用本本发明说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本发明的专利保护范围内。
Claims (10)
1.一种基于钯铜线的半导体键合工艺,其特征在于,包括:
A. 劈刀移至芯片焊盘的位置,使用表面镀钯的纯铜线构成的焊线线材制作第一个焊点的焊球;
B. 拉线弧,焊头带动劈刀往上抬起,所述焊线线材被拉起到设定的高度后,从最高点移动到PCB板第二个焊点的位置,完成所述焊接线材的走线;
C. 劈刀移至PCB板的焊盘的位置,使用所述焊线线材焊接第二个焊点;
其中,制作第一个焊点和第二个焊点时,使用保护气体充盈所述劈刀及劈刀的周边,所述保护气体的成分为:95%~99%氮气和1%~5%的氢气,重量百分比。
2.如权利要求1所述基于钯铜线的半导体键合工艺,其特征在于,所述芯片焊盘为铝焊盘或金焊盘,所述第一个焊点的焊球大小为所述芯片焊盘的大小的80%~95%。
3. 如权利要求1所述基于钯铜线的半导体键合工艺,其特征在于,所述PCB板的焊盘包括从下而上的三层金属:铜层、镍层和银层,或铜层、镍层和金层,其中,所述铜层的厚度为500~800 μm,所述镍层的厚度为150~250 μm,所述银层的厚度为60~120 μm,所述金层的厚度为1~5 μm。
4.如权利要求1所述基于钯铜线的半导体键合工艺,其特征在于,制作所述第一个焊点的焊球时,包括预烧球阶段获得预烧球;
所述预烧球阶段:打火杆尖端与露出劈刀的所述焊接线材之间放电形成一个完整的电流回路,所述电流回路的电流为25~35 mA。
5.如权利要求4所述基于钯铜线的半导体键合工艺,其特征在于,所述预烧球的直径的3/4以内,所述钯元素所占重量比例低于10%。
6.如权利要求5所述基于钯铜线的半导体键合工艺,其特征在于,所述预烧球阶段:使用环形喷嘴从下向上吹向所述焊接线材的端部的周侧,使所述钯元素少向所述预烧球的内部扩散。
7. 如权利要求1所述基于钯铜线的半导体键合工艺,其特征在于,所述焊接线材的直径为0.6~1 mil,所述钯金属层的厚度为4~8 μm;制作第一个焊点时,预烧球阶段电子打火后线尾烧结形成的小球的直径为1.6~2 mil,焊接压力为30~50 g,焊接的功率为120~150mv,焊接时间为10~16 ms。
8. 如权利要求1所述基于钯铜线的半导体键合工艺,其特征在于,所述焊接第二个焊点时,预烧球阶段电子打火后线尾烧结形成的小球的直径为1.8~2.2 mil,焊接压力为70~90 g,切鱼尾的焊接功率为120 ~150 mv。
9.如权利要求1所述基于钯铜线的半导体键合工艺,其特征在于,所述步骤A之前,还包括:
A1:在PCB板的焊盘的位置种球,种球包括种球预烧球阶段和烧球阶段,所述种球预烧球阶段电子打火后线尾烧结形成的小球的直径为1.8~2.2 mil,所述烧球阶段,打火杆尖端与露出劈刀的所述焊接线材之间放电形成一个完整的电流回路,形成直径为1.8~2.2 mil的预植球;
所述预植球成为第二个焊点。
10. 如权利要求9所述基于钯铜线的半导体键合工艺,其特征在于,在所述焊接第二个焊点时,键合温度设置为140℃~170℃,焊焊接时间设置为10~16 ms,焊接功率为65~95 mw。
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