CN107241076A - A kind of power amplifier limiter - Google Patents
A kind of power amplifier limiter Download PDFInfo
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- CN107241076A CN107241076A CN201710421187.6A CN201710421187A CN107241076A CN 107241076 A CN107241076 A CN 107241076A CN 201710421187 A CN201710421187 A CN 201710421187A CN 107241076 A CN107241076 A CN 107241076A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G11/00—Limiting amplitude; Limiting rate of change of amplitude ; Clipping in general
- H03G11/02—Limiting amplitude; Limiting rate of change of amplitude ; Clipping in general by means of diodes
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Abstract
The invention discloses a kind of power amplifier limiter, including amplification clipping unit, overdriving protection location；Amplifying clipping unit includes wave filter, amplification amplitude limiter circuit etc.; overdriving protection location includes PNP triode, four-way PIN diode attenuator etc.; after signal enters amplification clipping unit through connector X1; exported through connector X2; connector X2 is connected with connector X3; signal enters through connector X3 overdrives protection location, is exported through connector X4.The access after amplification clipping unit of the limiter of the present invention overdrives protection device, input signal can be prevented excessive, the overshoot of pulse signal reaches the effect of amplitude limit.
Description
Technical field
The present invention relates to limiter field, more particularly to a kind of power amplifier limiter.
Background technology
Due to the development of science and technology, people are to basic physicses, and the research of light source and superconduction deepens continuously, with all solid state
Power amplifier is in the extensive use in the high-power field such as electron accelerator, lasing light emitter, and the power grade of solid state power amplifier constantly carries
It is high.According to the special applications of solid state power amplifier, in order to improve the use reliability of solid state power amplifier and the stability of power output.Need
Power amplifier limiter is added between the input of high power solid state power amplifier and continuous wave signal and the output of pulse signal, come the company of limitation
The output amplitude of continuous ripple signal and pulse signal, makes amplitude output signal keep stable.
The content of the invention
In order to overcome the above-mentioned deficiencies of the prior art, the purpose of the present invention be limit continuous wave signal output amplitude make it is defeated
Going out signal amplitude holding stabilization, there is provided a kind of power amplifier limiter.
For achieving the above object, the technical scheme is that：A kind of power amplifier limiter, including amplification amplitude limit list
Member, overdriving protection location；
The amplification clipping unit, signal is accessed by connector X1, and connector X1 connections resistance R2, resistance R2 two ends pass through respectively
It is sequentially connected after ground wire after resistance R1, resistance R2, resistance R2 connections electric capacity C1, electric capacity C1 connection wave filter V1, wave filter V1
Electric capacity C2, electric capacity C3, electric capacity C3 connections wave filter V2, wave filter V2 connection electric capacity C4, electric capacity C4 connection connector X2；Resistance
Ground capacity C5, ground capacity C6 are respectively equipped with before and after R4 connection 12V positive sources, resistance R4, resistance R4 is parallel with first and put
Big amplitude limiter circuit, second method amplitude limiter circuit；First amplification amplitude limiter circuit connection electric capacity C2, the second amplification amplitude limiter circuit connection electricity
Hold C4；
It is described first amplification amplitude limiter circuit include Low dropout regulator V3, Low dropout regulator V3 input port Vi with
Resistance R4 connections, are respectively equipped with ground capacity C7, ground capacity C8, ground capacity C9, low pressure between input port Vi and resistance R4
Poor linear regulator V3 delivery outlet Vo connections resistance R5, Low dropout regulator V3 the ground connection mouthful adjustable ground connection of VGND connections
Resistance R6, delivery outlet Vo, ground connection mouth VGND are connected by resistance R7, and resistance R5 connections inductance L1, resistance R5 is in parallel with inductance L1
There are ground capacity C10, ground capacity C11, ground capacity C12, inductance L1 is connected to electric capacity C2；
The second amplification amplitude limiter circuit is identical with the described first amplification amplitude limiter circuit structure, including Low dropout regulator
V3 ', resistance R4 ', ground capacity C7 ', ground capacity C8 ', ground capacity C9 ', resistance R5 ', adjustable grounding resistance R6 ', resistance
R7 ', inductance L1 ', ground capacity C10 ', ground capacity C11 ', ground capacity C12 ', inductance L1 ' are connected to electric capacity C4；
The overdriving protection location, connector X3 is sequentially connected resistance R8, electric capacity C13, connector X4 connection electric capacity C14, electricity
Grounding resistance R9, grounding resistance R10, the electric capacity C13, electric capacity C14, which are respectively equipped with, before and after resistance R8 is respectively connecting to four-way PIN
Diode attenuator V3 input and output pin V3-1, V3-3, four-way PIN diode attenuator V3 bias pin V3-2 connects successively
Connecting resistance R11, ground capacity C15, resistance R12, ground capacity C16, resistance R13, ground capacity C17, ground capacity C18, electricity
Hinder after R14, be connected to PNP triode V4 colelctor electrode C, four-way PIN diode attenuator V3 branch bias pin V3-4,
V3-5 difference earth electric capacity C19, resistance R20, two resistance R20 connect resistance R21, ground capacity C20, grounding resistance simultaneously
R22, resistance R21 are connected to the additional ground capacity C21 electric power supplys of 12V；
The emitter E of the PNP triode V4 is connected to 12V power supplys by adjustable resistance R15, and PNP triode V4 base stage B leads to
Cross resistance R16 to be connected with emitter E, PNP triode V4 base stage B is also connected with resistance R17, and resistance R17 is connected to NPN triode
V5 colelctor electrode C ', NPN triode V5 emitter E ' it is grounded, NPN triode V5 base stage B ' connects resistance R18, connect respectively
Ground electric capacity C17, grounding resistance R19, resistance 18 connect ground capacity C18, Schottky diode V6 negative pole, Schottky respectively
Diode V6 positive poles connect another Schottky diode V7 positive poles, Schottky diode V7 negative poles connection connector X5；
The connector X3 is also associated with resistance R23, and resistance R23 connects grounding resistance R24, grounding resistance R25, electric capacity respectively
C22, electric capacity C22 are connected to wave detector N1 RFIN pin, and wave detector N1 SREF pin, PWON pin, COMM pin are grounded respectively, VPOS
Pin is connected with IREF pin and is connected to FLTR pin by electric capacity C23, and VPOS pin are connected two ground capacities simultaneously with IREF pin
C24, and 5V power supplys are connected, while by resistance R26 connection 12V power supplys, resistance R26 two ends set ground capacity C25, VPOS respectively
Pin is connected to voltage-regulator diode V8 negative pole, voltage-regulator diode V8 plus earth with IREF pin simultaneously；
The VRMS pin of the wave detector N1 are connected to bidirectional trigger diode V9 positive pole, while connecting test port TP1, two-way
Another plus earths of diac V9, bidirectional trigger diode V9 negative pole connects grounding resistance R27, ground capacity respectively
C26, test port TP2, and it is connected to amplifier A1 in-phase input end；
The inverting input of the amplifier A1 is by resistance R29 connection amplifier A1 output ends, and resistance R29 two ends are set respectively to be connect
Ground resistance R28, amplifier A1 output end connecting tests port TP3, resistance R30, resistance R30 connection grounding resistance R31 connect simultaneously
Be connected to amplifier A2 in-phase input ends, the connection of amplifier A2 reverse input ends include resistance R32, adjustable resistance R33, resistance R34,
The match circuit of grounding resistance R35,12V power supply；Amplifier A2 output end connecting tests port TP4, resistance R36, resistance R36 connect
It is connected to six inverter buffer A3, six inverter buffer A3 and connects ground capacity C27, trigger A4 A4-S0 pin respectively；
The A4-R0 pin of the trigger A4, A4-R1 pin, A4-R2 pin, A4-R3 pin, the series connection of A4-EN pin, and it is connected to parallel connection
Resistance R37, diode V10 positive pole, connector X7, on FET V11 source class S, a 12V power supplys pass sequentially through resistance
The inverter buffer A5 of R38 six, six inverter buffer A6 are connected to diode V10 negative pole, and resistance R37 is connected to 12V power supplys；Touch
Send out device A4 A4-Q0 pin connection buffer A7, buffer A7 connects resistance R39, resistance R40, Schottky diode V6 respectively
It is connected after positive pole, resistance R40 series resistances R41 with connector X6；
The drain S ground connection of the FET V11, grid G connects resistance R42, grounding resistance R43 respectively, and resistance R42 is connected to
Connector X8；
After signal enters amplification clipping unit through connector X1, export, connector X2 is connected with connector X3, believe through connector X2
Number through connector X3 enter overdrive protection location, through connector X4 export.
Beneficial effects of the present invention：The access after amplification clipping unit of the limiter of the present invention overdrives protection device, can
To prevent input signal excessive, the overshoot of pulse signal reaches the effect of amplitude limit.
Brief description of the drawings
Fig. 1 is schematic structural view of the invention；
Fig. 2 is amplification clipping unit circuit connection diagram of the invention；
Fig. 3 is overdriving protection location circuit connection diagram of the invention.
Embodiment
The technical scheme in the embodiment of the present invention is clearly and completely described below in conjunction with accompanying drawing.
As shown in Figure 1, 2, 3, a kind of power amplifier limiter of the invention, including amplification clipping unit, overdriving protection location；
The amplification clipping unit, signal is accessed by connector X1, and connector X1 connections resistance R2, resistance R2 two ends pass through respectively
It is sequentially connected after ground wire after resistance R1, resistance R2, resistance R2 connections electric capacity C1, electric capacity C1 connection wave filter V1, wave filter V1
Electric capacity C2, electric capacity C3, electric capacity C3 connections wave filter V2, wave filter V2 connection electric capacity C4, electric capacity C4 connection connector X2；Resistance
Ground capacity C5, ground capacity C6 are respectively equipped with before and after R4 connection 12V positive sources, resistance R4, resistance R4 is parallel with first and put
Big amplitude limiter circuit, second method amplitude limiter circuit；First amplification amplitude limiter circuit connection electric capacity C2, the second amplification amplitude limiter circuit connection electricity
Hold C4；
It is described first amplification amplitude limiter circuit include Low dropout regulator V3, Low dropout regulator V3 input port Vi with
Resistance R4 connections, are respectively equipped with ground capacity C7, ground capacity C8, ground capacity C9, low pressure between input port Vi and resistance R4
Poor linear regulator V3 delivery outlet Vo connections resistance R5, Low dropout regulator V3 the ground connection mouthful adjustable ground connection of VGND connections
Resistance R6, delivery outlet Vo, ground connection mouth VGND are connected by resistance R7, and resistance R5 connections inductance L1, resistance R5 is in parallel with inductance L1
There are ground capacity C10, ground capacity C11, ground capacity C12, inductance L1 is connected to electric capacity C2；
The second amplification amplitude limiter circuit is identical with the described first amplification amplitude limiter circuit structure, including Low dropout regulator
V3 ', resistance R4 ', ground capacity C7 ', ground capacity C8 ', ground capacity C9 ', resistance R5 ', adjustable grounding resistance R6 ', resistance
R7 ', inductance L1 ', ground capacity C10 ', ground capacity C11 ', ground capacity C12 ', inductance L1 ' are connected to electric capacity C4；
The overdriving protection location, connector X3 is sequentially connected resistance R8, electric capacity C13, connector X4 connection electric capacity C14, electricity
Grounding resistance R9, grounding resistance R10, the electric capacity C13, electric capacity C14, which are respectively equipped with, before and after resistance R8 is respectively connecting to four-way PIN
Diode attenuator V3 input and output pin V3-1, V3-3, four-way PIN diode attenuator V3 bias pin V3-2 connects successively
Connecting resistance R11, ground capacity C15, resistance R12, ground capacity C16, resistance R13, ground capacity C17, ground capacity C18, electricity
Hinder after R14, be connected to PNP triode V4 colelctor electrode C, four-way PIN diode attenuator V3 branch bias pin V3-4,
V3-5 difference earth electric capacity C19, resistance R20, two resistance R20 connect resistance R21, ground capacity C20, grounding resistance simultaneously
R22, resistance R21 are connected to the additional ground capacity C21 electric power supplys of 12V；
The emitter E of the PNP triode V4 is connected to 12V power supplys by adjustable resistance R15, and PNP triode V4 base stage B leads to
Cross resistance R16 to be connected with emitter E, PNP triode V4 base stage B is also connected with resistance R17, and resistance R17 is connected to NPN triode
V5 colelctor electrode C ', NPN triode V5 emitter E ' it is grounded, NPN triode V5 base stage B ' connects resistance R18, connect respectively
Ground electric capacity C17, grounding resistance R19, resistance 18 connect ground capacity C18, Schottky diode V6 negative pole, Schottky respectively
Diode V6 positive poles connect another Schottky diode V7 positive poles, Schottky diode V7 negative poles connection connector X5；
The connector X3 is also associated with resistance R23, and resistance R23 connects grounding resistance R24, grounding resistance R25, electric capacity respectively
C22, electric capacity C22 are connected to wave detector N1 RFIN pin, and wave detector N1 SREF pin, PWON pin, COMM pin are grounded respectively, VPOS
Pin is connected with IREF pin and is connected to FLTR pin by electric capacity C23, and VPOS pin are connected two ground capacities simultaneously with IREF pin
C24, and 5V power supplys are connected, while by resistance R26 connection 12V power supplys, resistance R26 two ends set ground capacity C25, VPOS respectively
Pin is connected to voltage-regulator diode V8 negative pole, voltage-regulator diode V8 plus earth with IREF pin simultaneously；
The VRMS pin of the wave detector N1 are connected to bidirectional trigger diode V9 positive pole, while connecting test port TP1, two-way
Another plus earths of diac V9, bidirectional trigger diode V9 negative pole connects grounding resistance R27, ground capacity respectively
C26, test port TP2, and it is connected to amplifier A1 in-phase input end；
The inverting input of the amplifier A1 is by resistance R29 connection amplifier A1 output ends, and resistance R29 two ends are set respectively to be connect
Ground resistance R28, amplifier A1 output end connecting tests port TP3, resistance R30, resistance R30 connection grounding resistance R31 connect simultaneously
Be connected to amplifier A2 in-phase input ends, the connection of amplifier A2 reverse input ends include resistance R32, adjustable resistance R33, resistance R34,
The match circuit of grounding resistance R35,12V power supply；Amplifier A2 output end connecting tests port TP4, resistance R36, resistance R36 connect
It is connected to six inverter buffer A3, six inverter buffer A3 and connects ground capacity C27, trigger A4 A4-S0 pin respectively；
The A4-R0 pin of the trigger A4, A4-R1 pin, A4-R2 pin, A4-R3 pin, the series connection of A4-EN pin, and it is connected to parallel connection
Resistance R37, diode V10 positive pole, connector X7, on FET V11 source class S, a 12V power supplys pass sequentially through resistance
The inverter buffer A5 of R38 six, six inverter buffer A6 are connected to diode V10 negative pole, and resistance R37 is connected to 12V power supplys；Touch
Send out device A4 A4-Q0 pin connection buffer A7, buffer A7 connects resistance R39, resistance R40, Schottky diode V6 respectively
It is connected after positive pole, resistance R40 series resistances R41 with connector X6；
The drain S ground connection of the FET V11, grid G connects resistance R42, grounding resistance R43 respectively, and resistance R42 is connected to
Connector X8；
After signal enters amplification clipping unit through connector X1, export, connector X2 is connected with connector X3, believe through connector X2
Number through connector X3 enter overdrive protection location, through connector X4 export.
Described embodiment is only a part of embodiment of the invention, rather than whole embodiments.Based on the present invention
In embodiment, the every other implementation that those of ordinary skill in the art are obtained under the premise of creative work is not made
Example, belongs to the scope of protection of the invention.
Claims (1)
1. a kind of power amplifier limiter, it is characterised in that including amplification clipping unit, overdrive protection location；
The amplification clipping unit, signal is accessed by connector X1, and connector X1 connections resistance R2, resistance R2 two ends pass through respectively
It is sequentially connected after ground wire after resistance R1, resistance R2, resistance R2 connections electric capacity C1, electric capacity C1 connection wave filter V1, wave filter V1
Electric capacity C2, electric capacity C3, electric capacity C3 connections wave filter V2, wave filter V2 connection electric capacity C4, electric capacity C4 connection connector X2；Resistance
Ground capacity C5, ground capacity C6 are respectively equipped with before and after R4 connection 12V positive sources, resistance R4, resistance R4 is parallel with first and put
Big amplitude limiter circuit, second method amplitude limiter circuit；First amplification amplitude limiter circuit connection electric capacity C2, the second amplification amplitude limiter circuit connection electricity
Hold C4；
It is described first amplification amplitude limiter circuit include Low dropout regulator V3, Low dropout regulator V3 input port Vi with
Resistance R4 connections, are respectively equipped with ground capacity C7, ground capacity C8, ground capacity C9, low pressure between input port Vi and resistance R4
Poor linear regulator V3 delivery outlet Vo connections resistance R5, Low dropout regulator V3 the ground connection mouthful adjustable ground connection of VGND connections
Resistance R6, delivery outlet Vo, ground connection mouth VGND are connected by resistance R7, and resistance R5 connections inductance L1, resistance R5 is in parallel with inductance L1
There are ground capacity C10, ground capacity C11, ground capacity C12, inductance L1 is connected to electric capacity C2；
The second amplification amplitude limiter circuit is identical with the described first amplification amplitude limiter circuit structure, including Low dropout regulator
V3 ', resistance R4 ', ground capacity C7 ', ground capacity C8 ', ground capacity C9 ', resistance R5 ', adjustable grounding resistance R6 ', resistance
R7 ', inductance L1 ', ground capacity C10 ', ground capacity C11 ', ground capacity C12 ', inductance L1 ' are connected to electric capacity C4；
The overdriving protection location, connector X3 is sequentially connected resistance R8, electric capacity C13, connector X4 connection electric capacity C14, electricity
Grounding resistance R9, grounding resistance R10, the electric capacity C13, electric capacity C14, which are respectively equipped with, before and after resistance R8 is respectively connecting to four-way PIN
Diode attenuator V3 input and output pin V3-1, V3-3, four-way PIN diode attenuator V3 bias pin V3-2 connects successively
Connecting resistance R11, ground capacity C15, resistance R12, ground capacity C16, resistance R13, ground capacity C17, ground capacity C18, electricity
Hinder after R14, be connected to PNP triode V4 colelctor electrode C, four-way PIN diode attenuator V3 branch bias pin V3-4,
V3-5 difference earth electric capacity C19, resistance R20, two resistance R20 connect resistance R21, ground capacity C20, grounding resistance simultaneously
R22, resistance R21 are connected to the additional ground capacity C21 electric power supplys of 12V；
The emitter E of the PNP triode V4 is connected to 12V power supplys by adjustable resistance R15, and PNP triode V4 base stage B leads to
Cross resistance R16 to be connected with emitter E, PNP triode V4 base stage B is also connected with resistance R17, and resistance R17 is connected to NPN triode
V5 colelctor electrode C ', NPN triode V5 emitter E ' it is grounded, NPN triode V5 base stage B ' connects resistance R18, connect respectively
Ground electric capacity C17, grounding resistance R19, resistance 18 connect ground capacity C18, Schottky diode V6 negative pole, Schottky respectively
Diode V6 positive poles connect another Schottky diode V7 positive poles, Schottky diode V7 negative poles connection connector X5；
The connector X3 is also associated with resistance R23, and resistance R23 connects grounding resistance R24, grounding resistance R25, electric capacity respectively
C22, electric capacity C22 are connected to wave detector N1 RFIN pin, and wave detector N1 SREF pin, PWON pin, COMM pin are grounded respectively, VPOS
Pin is connected with IREF pin and is connected to FLTR pin by electric capacity C23, and VPOS pin are connected two ground capacities simultaneously with IREF pin
C24, and 5V power supplys are connected, while by resistance R26 connection 12V power supplys, resistance R26 two ends set ground capacity C25, VPOS respectively
Pin is connected to voltage-regulator diode V8 negative pole, voltage-regulator diode V8 plus earth with IREF pin simultaneously；
The VRMS pin of the wave detector N1 are connected to bidirectional trigger diode V9 positive pole, while connecting test port TP1, two-way
Another plus earths of diac V9, bidirectional trigger diode V9 negative pole connects grounding resistance R27, ground capacity respectively
C26, test port TP2, and it is connected to amplifier A1 in-phase input end；
The inverting input of the amplifier A1 is by resistance R29 connection amplifier A1 output ends, and resistance R29 two ends are set respectively to be connect
Ground resistance R28, amplifier A1 output end connecting tests port TP3, resistance R30, resistance R30 connection grounding resistance R31 connect simultaneously
Be connected to amplifier A2 in-phase input ends, the connection of amplifier A2 reverse input ends include resistance R32, adjustable resistance R33, resistance R34,
The match circuit of grounding resistance R35,12V power supply；Amplifier A2 output end connecting tests port TP4, resistance R36, resistance R36 connect
It is connected to six inverter buffer A3, six inverter buffer A3 and connects ground capacity C27, trigger A4 A4-S0 pin respectively；
The A4-R0 pin of the trigger A4, A4-R1 pin, A4-R2 pin, A4-R3 pin, the series connection of A4-EN pin, and it is connected to parallel connection
Resistance R37, diode V10 positive pole, connector X7, on FET V11 source class S, a 12V power supplys pass sequentially through resistance
The inverter buffer A5 of R38 six, six inverter buffer A6 are connected to diode V10 negative pole, and resistance R37 is connected to 12V power supplys；Touch
Send out device A4 A4-Q0 pin connection buffer A7, buffer A7 connects resistance R39, resistance R40, Schottky diode V6 respectively
It is connected after positive pole, resistance R40 series resistances R41 with connector X6；
The drain S ground connection of the FET V11, grid G connects resistance R42, grounding resistance R43 respectively, and resistance R42 is connected to
Connector X8；
After signal enters amplification clipping unit through connector X1, export, connector X2 is connected with connector X3, believe through connector X2
Number through connector X3 enter overdrive protection location, through connector X4 export.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710421187.6A CN107241076B (en) | 2017-06-07 | 2017-06-07 | Power amplifier amplitude limiter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710421187.6A CN107241076B (en) | 2017-06-07 | 2017-06-07 | Power amplifier amplitude limiter |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107241076A true CN107241076A (en) | 2017-10-10 |
| CN107241076B CN107241076B (en) | 2020-07-31 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710421187.6A Active CN107241076B (en) | 2017-06-07 | 2017-06-07 | Power amplifier amplitude limiter |
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Cited By (1)
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| CN110190817A (en) * | 2019-05-24 | 2019-08-30 | 上海辰光医疗科技股份有限公司 | A kind of magnetic resonance of PIN-based diode radio frequency amplifier linearity adjustment method |
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| CN110190817A (en) * | 2019-05-24 | 2019-08-30 | 上海辰光医疗科技股份有限公司 | A kind of magnetic resonance of PIN-based diode radio frequency amplifier linearity adjustment method |
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| Publication number | Publication date |
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| CN107241076B (en) | 2020-07-31 |
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