CN214591331U

CN214591331U - Overspeed protection amplifying circuit

Info

Publication number: CN214591331U
Application number: CN202120642101.4U
Authority: CN
Inventors: 郝春华
Original assignee: Qingdao Hantek Electronic Co ltd
Current assignee: Qingdao Hantek Electronic Co ltd
Priority date: 2021-03-30
Filing date: 2021-03-30
Publication date: 2021-11-02
Anticipated expiration: 2031-03-30

Abstract

The utility model discloses an overspeed protection amplifying circuit, include: an input circuit, a middle clamping circuit and an output circuit; the input circuit includes: a signal input terminal, a bypass input terminal, an offset input terminal and a current source input terminal; the middle clamping circuit comprises a common emitter amplifying circuit, the common emitter amplifying circuit comprises a triode VT1 and a triode VT2 which are coupled in common emitters, the output circuit is provided with a forward output end VSO + and a reverse output end VSO-, the forward output end VSO + and the reverse output end VSO-are both coupled with an over-drive protection circuit consisting of two diodes which are connected in reverse parallel, the input circuit has wide bandwidth and high input impedance, and the common emitter amplifying circuit can be efficiently used for applications which need wide signal bandwidth and high output current drive; the output circuit can obtain a flat band response across DC to 2GHz, has very low output impedance, and can be used for driving variable gain amplifiers with various input impedances.

Description

Overspeed protection amplifying circuit

Technical Field

The utility model relates to a measure technical field, specifically be an overspeed protection amplifier circuit.

Background

The signal processing generally needs to be firstly carried out the attenuation of the signal through an attenuation circuit, so as to avoid damaging subsequent circuit devices, the attenuated signal is convenient for the signal processing, and then the signal is amplified into the signal required by the circuit through an amplification circuit;

the existing amplifying circuit is small in bandwidth and insufficient in driving capability, and cannot drive subsequent gain devices.

The prior art can not meet the requirements of the amplifying circuit at the present stage, and the prior art needs to be reformed based on the current situation.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide an overspeed protection amplifier circuit to solve the problem that proposes among the above-mentioned background art.

The utility model provides a following technical scheme overspeed protection amplifier circuit, include: an input circuit, a middle clamping circuit and an output circuit;

the input circuit includes: a signal input terminal, a bypass input terminal, an offset input terminal and a current source input terminal;

the signal input end is coupled with a Jfet, a source end of the Jfet is coupled with a positive power supply end VS +, a drain end of the Jfet is coupled with a collector electrode of the triode through a divider resistor R1, and the Jfet can amplify an input signal without large signal power; the bypass input end is coupled with a 100K bypass resistor, and the resistance value of the bypass resistor R1 is adjusted by loading a large resistor or a small resistor;

the offset input end is coupled with an adjustable current source VS1, the adjustable current source VS1 is connected with a fixed current source VS2 in parallel, one end of the fixed current source is loaded with a reverse power supply end VS-, and the other end of the fixed current source is coupled with an emitter of the triode;

the middle clamping circuit comprises a common emitter amplifying circuit, the common emitter amplifying circuit comprises a triode VT1 and a triode VT2 which are coupled with each other in a common emitter mode, bases of the triode VT1 and the triode VT2 are respectively coupled with a battery No. 1 and a battery No. 2, and a negative electrode of the battery No. 1 and a positive electrode of the battery No. 2 are respectively coupled with a low-level control end CLL and a high-level control end CLH;

the output circuit is provided with a forward output end VSO + and a reverse output end VSO-, the forward output end VSO + and the reverse output end VSO-are both coupled with an over-drive protection circuit consisting of two diodes which are connected in reverse parallel, the other end of the over-drive protection circuit is coupled with a power supply end, the forward output end VSO + and the reverse output end VSO-are also coupled with a collector of a triode VT3 and a collector of a triode VT4 respectively, bases of a triode VT3 and a triode VT4 are coupled with a current source VS3 and a current source VS4 respectively, bases of a triode VT3 and a triode VT4 are also coupled with a triode VT5 and a triode VT6 respectively, the output circuit is also provided with a signal output end VOUT, and the signal output end is coupled with a VGA.

Advantageous effects

The input circuit has wide bandwidth and high input impedance, and can be efficiently used for applications requiring wide signal bandwidth and high output current drive; the common emitter amplifying circuit further amplifies signals transmitted by the input circuit, so that the amplification factor is effectively improved; the output circuit can obtain a flat band response across DC to 2GHz, has very low output impedance, and can be used for driving variable gain amplifiers with various input impedances.

Drawings

Fig. 1 is a circuit diagram of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the utility model provides a field ordinary skilled person does not make all other embodiments that obtain under the creative work prerequisite, all belong to the utility model discloses the scope of protection.

Referring to fig. 1, the utility model provides an overspeed protection amplifying circuit of following technical scheme, include: an input circuit, a middle clamping circuit and an output circuit;

the input circuit comprises a signal input end, a bypass input end, an offset input end and a current source input end, wherein the signal input end is coupled with a Jfet, a source end of the Jfet is coupled with a positive power supply end VS +, a drain end of the Jfet is coupled with a collector of the triode through a divider resistor R1, and the Jfet can amplify an input signal without large signal power; the bypass input end is coupled with a 100K bypass resistor, the resistance value of the bypass resistor R1 is adjusted by loading a large resistor or a small resistor, the offset input end is coupled with an adjustable current source VS1, the adjustable current source VS1 is connected with a fixed current source VS2 in parallel, when a signal deviates from a normal observation page, the signal is adjusted to the normal page by loading offset on the offset input end, one end of the fixed current source is loaded with a reverse power supply end VS-, and the other end of the fixed current source is coupled with an emitter of a triode; the adjustable current source VS1 and the fixed current source provide effective current for the input circuit, when the fixed current source can meet the requirement of the input circuit, only the fixed current source is used, and if the fixed current source cannot meet the current quantity of the input circuit, the current can be properly increased according to the actual requirement through the adjustable current source, so that the current requirement of the input circuit can be effectively met; the input circuit has wide bandwidth and high input impedance, and can be efficiently used for applications requiring wide signal bandwidth and high output current drive.

The middle clamping circuit comprises a common emitter amplifying circuit, the common emitter amplifying circuit comprises a triode VT1 and a triode VT2 which are coupled with each other in a common emitter mode, bases of the triode VT1 and the triode VT2 are respectively coupled with a battery No. 1 and a battery No. 2, and a negative electrode of the battery No. 1 and a positive electrode of the battery No. 2 are respectively coupled with a low-level control end CLL and a high-level control end CLH; the common emitter amplifying circuit further amplifies signals transmitted by the input circuit, and the amplification factor is effectively improved.

The output circuit is provided with a forward output end VSO + and a reverse output end VSO-, the forward output end VSO + and the reverse output end VSO-are both coupled with an over-drive protection circuit consisting of two diodes which are connected in reverse parallel, the other end of the over-drive protection circuit is coupled with a power supply end, the forward output end VSO + and the reverse output end VSO-are also coupled with a collector of a triode VT3 and a collector of a triode VT4 respectively, bases of a triode VT3 and a triode VT4 are coupled with a current source VS3 and a current source VS4 respectively, bases of a triode VT3 and a triode VT4 are also coupled with a triode VT5 and a triode VT6 respectively, the output circuit is also provided with a signal output end VOUT, and the signal output end is coupled with a VGA; the output circuit can obtain a frequency band response spanning from direct current to 2GHz, has very low output impedance, and can be used for driving variable gain amplifiers with various input impedances.

The overdrive protection circuit effectively prevents the continuous amplifying circuit in the input circuit and the intermediate clamping circuit from being overdriven, compared with the output circuit, the VGA is powered by low voltage to make the driving easier, the forward power supply end VS + and the reverse power supply end VS-of the input circuit are respectively powered by a +/-6V power supply, the VGA uses a +/-2.5V power supply to supply power, under the condition of input transient, the output circuit can be very close to VS + or VS-, thereby causing the VGA to obtain huge overspeed, because the overload voltage causes the recovery time of the VGA to be very long after the overload is cancelled, the input structure of the VGA can be damaged under serious conditions, in order to avoid the clamping function integrated in the intermediate clamping circuit, the CLH end and the CLL end determine the maximum allowable voltage of the output energy swing of the output circuit, the voltage of the signal output end VOUT swings to the maximum on the + ve side and is equal to the voltage on the CLH side, the swing on the-ve side is minimum and is equal to the voltage on the CLL side, and the maximum/minimum Vpeak of VOUT and the Vpeak of the voltage on CLH and CLL are respectively kept at least 1V, so that the recovery time of the VGA is effectively prolonged, and the structure of the VGA is protected from being damaged.

Although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that modifications may be made to the embodiments or portions thereof without departing from the spirit and scope of the invention.

Claims

1. An overspeed protection amplifying circuit, comprising: an input circuit, a middle clamping circuit and an output circuit;

the signal input end is coupled with a Jfet, a source end of the Jfet is coupled with a positive power supply end VS +, a drain end of the Jfet is coupled with a collector electrode of the triode through a divider resistor R1, the bypass input end is coupled with a 100K bypass resistor, the offset input end is coupled with an adjustable current source VS1, the adjustable current source VS1 is connected with a fixed current source VS2 in parallel, one end of the fixed current source is loaded with a reverse power supply end VS-, and the other end of the fixed current source is coupled with an emitter electrode of the triode;

the middle clamping circuit comprises a common emitter amplifying circuit, the common emitter amplifying circuit is provided with a triode VT1 and a triode VT2 which are coupled with each other in a common emitter mode, the base electrodes of the triode VT1 and the triode VT2 are respectively coupled with a battery No. 1 and a battery No. 2, and the negative electrode of the battery No. 1 and the positive electrode of the battery No. 2 are respectively coupled with a low-level control end CLL and a high-level control end CLH;

the output circuit is provided with a forward output end VSO + and a reverse output end VSO-, the forward output end VSO + and the reverse output end VSO-are both coupled with an over-drive protection circuit consisting of two diodes which are connected in reverse parallel, the other end of the over-drive protection circuit is coupled with a power supply end, the forward output end VSO + and the reverse output end VSO-are also coupled with a collector of a triode VT3 and a collector of a triode VT4 respectively, bases of a triode VT3 and a triode VT4 are coupled with a current source VS3 and a current source VS4 respectively, bases of a triode VT3 and a triode VT4 are also coupled with a triode VT5 and a triode VT6 respectively, the output circuit is also provided with a signal output end VOUT, and the signal output end VOUT is coupled with a VGA.

2. An overspeed protection amplifying circuit according to claim 1, characterized in that: the positive power supply end VS + and the reverse power supply end VS-of the input circuit are respectively supplied with power by a +/-6V power supply, and the VGA uses a +/-2.5V power supply for supplying power.

3. An overspeed protection amplifying circuit according to claim 1, characterized in that: the CLH terminal and the CLL terminal determine the maximum allowable voltage that the output of the output circuit can swing to, and the voltage of the signal output terminal VOUT swings to the maximum at the + ve side and is equal to the voltage at the CLH side, and swings to the minimum at the-ve side and is equal to the voltage at the CLL side.

4. An overspeed protection amplifying circuit according to claim 1, characterized in that: the maximum/minimum Vpeak of VOUT is maintained at least 1V from Vpeak of the voltages on CLH and CLL, respectively.