JP2006217362A - Limiter circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a limiter circuit which enlarges an insertion loss at a time of a restriction mode without enlarging an insertion loss during a non-restriction mode, in an operation change of the non-restriction mode and the restriction mode for an RF signal entered to the limiter circuit of a radar system. <P>SOLUTION: After insertion of a capacitor for DC blocking in a branched output of a distributor formed in the RF signal line, the circuit is provided with pin diodes in parallel connection, a detection diode connected in a forward direction to another branched output of the distributor, an amplifier which amplifies the detected output, a distribution resistor which adjusts the amplified detected output, an inductor which connects between the distribution resistor and the pin diode as a return circuit, and a capacitor for DC blocking formed in an output terminal side. Further, the circuit reduces high frequency resistance of the pin diode by making the amplified detection output as a forward direction current of the pin diode. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

The present invention relates to a limiter circuit for protecting a high-frequency receiver mounted on a radar system, and more particularly to a limiter circuit using a PIN diode.

As is well known, a radar system includes a transmission / reception common antenna installed in a base station, a transmitter that radiates large high-frequency power to a target, a receiver that receives weak radio waves from the target, and the like. Although the transmission circuit and the reception circuit are separated via a transmission / reception switch, an isolator having high accuracy is required. Further, since the transmission source is pulse oscillation using a high power semiconductor amplifier, a magnetron, or the like, the influence of the reflected wave generated by the transmission / reception common antenna and unnecessary radiation on the receiver is large.

As a means for protecting a receiver installed in a radar system, there is a limiter circuit using a pin diode or the like. For example, in FIG. 2 of Japanese Patent Laid-Open No. 5-226990 (see Patent Document 1), a voltage translator circuit 30, a current amplifier circuit 32, and a time are provided on the anode side of the PIN diode 36 in order to protect an RF receiver in the radar system. A pin diode driver circuit for connecting a driver circuit 22 composed of a delay circuit 34 and controlling a PIN diode is disclosed.

Further, in FIG. 1 of Japanese Patent Application Laid-Open No. 2004-40173 (see Patent Document 2), a plurality of limiter element circuits 1a and 1b including PIN diodes provided in parallel to an input high-frequency signal are approximately 1/4. The limiter element circuits 1a and 1b are connected in series via the wavelength transmission line 2, and are provided so that the power limit start levels of the limiter element circuits 1a and 1b are sequentially lowered from the first stage to the second and subsequent stages of the limiter circuit. And a bias circuit 4 for detecting and rectifying the high-frequency signal of the coupling circuit 3 and supplying it to the PIN diodes after the first stage 1b. There has been disclosed a limiter circuit that can appropriately obtain a wide range of power limiting characteristics by adjustment.

JP-A-5-226990 (FIG. 2)

Japanese Patent Laid-Open No. 2004-40173 (FIG. 1)

However, since the active limiter circuit provided with the driver circuit that operates in synchronization with a series of pulses of the oscillator is disclosed in Patent Document 1, a high-power RF signal is input in the reception state. In some cases, the receiver may not be adequately protected.

Moreover, in the thing of patent document 2, since a coupler is attached in the front | former stage of a PIN diode, the RF signal taken out from the coupler is detected with a detection diode, and a PIN diode is driven with the detected power. Since the threshold value is changed according to the amount, it is necessary to increase the coupling amount in order to obtain a very high insertion loss in the limit mode. Accordingly, the insertion loss in the non-restricted mode also increases. When the insertion loss in the non-restricted mode increases, the NF of the radar system deteriorates and the radar system performance cannot be obtained. On the other hand, if the insertion loss in the non-restricted mode is reduced in order to satisfy the performance of the radar system, the insertion loss in the restricted mode is also reduced, and the RF receiver may not be protected.

The present invention has been made to solve the above problems, and in order to realize both the performance of the radar system and the protection of the RF receiver, the RF signal incident on the limiter circuit of the radar system is provided. An object of the present invention is to provide a limiter circuit that increases the insertion loss in the limited mode without increasing the insertion loss in the non-restricted mode by switching the operation between the non-restricted mode and the limited mode.

A limiter circuit according to a first aspect of the present invention includes a distributor provided in a high-frequency signal line, a forward output connected to one branch output of the distributor via a first DC blocking means, and one end of the signal line. The other end of the pin diode is grounded, the detecting means forward-connected to the other branch output of the distributor, the amplifier for amplifying the detecting output of the detecting means, and the amplifier Adjusting means for adjusting the detection output; high-frequency blocking means interposed between the adjusting means and one end of the pin diode; and second DC blocking means provided on the output terminal side of the signal line, By using the detection output amplified by the amplifier as the forward current of the pin diode, the high frequency resistance of the pin diode is lowered.

According to a second aspect of the present invention, there is provided a limiter circuit comprising: a distributor provided in a high-frequency signal line; and one branch output of the distributor connected in a forward direction via a first DC blocking means, one end of which is a signal line. A first pin diode, the other end of which is grounded, detection means connected in the forward direction to the other branch output of the distributor, and a first amplifier for amplifying the detection output of the detection means, A first adjustment unit that adjusts the detection output amplified by the first amplifier, and a part of the detection output branched from the first adjustment unit, and between the one end of the first pin diode. A first high frequency blocking means interposed between the first pin diode, the impedance converter connected in series to the output side of the one end of the first pin diode via a second DC blocking means, and a third output connected to the output of the impedance converter. Through the DC blocking means A second pin diode having a direction connection, one end disposed on the signal line and the other end grounded, a second amplifier for amplifying a part of the detection output branched from the first adjustment means, A second adjusting means for adjusting the detection output amplified by the second amplifier; a second high-frequency blocking means interposed between the second adjusting means and one end of the second pin diode; And a fourth direct current blocking means provided on the output terminal side of the line. The detection output amplified by the first amplifier is used as the forward current of the first pin diode, and the detection amplified by the second amplifier. By making the output the forward current of the second pin diode, the high-frequency resistance of the first pin diode and the second pin diode is lowered.

According to a third aspect of the present invention, there is provided a limiter circuit comprising: a first distributor provided in a high-frequency signal line; and a forward connection to one branch output of the first distributor via a first DC blocking means. A first pin diode having one end disposed on the signal line and the other end grounded, a first detector connected in a forward direction to the other branch output of the first distributor, and the first detector A first amplifier for amplifying the detection output of the detection means; a first adjustment means for adjusting the detection output amplified by the first amplifier; and the one end of the first adjustment means and the first pin diode. A first high frequency blocking means interposed between the first pin diode, an impedance converter connected in series to the output side of the one end of the first pin diode via a second DC blocking means, and an output of the impedance converter Second distributor provided on the signal line of A second pin diode connected in the forward direction to one branch output of the second distributor via a third DC blocking means, having one end disposed on the signal line and the other end grounded, 2nd detection means forward-connected to the other branch output of the 2 distributors, a second amplifier for amplifying the detection output of the second detection means, and a detection output amplified by the second amplifier A second adjusting means for adjusting the second adjusting means, a second high-frequency blocking means interposed between the second adjusting means and one end of the second pin diode, and a second provided on the output terminal side of the signal line. 4 DC blocking means, the detection output amplified by the first amplifier is the forward current of the first pin diode, and the detection output amplified by the second amplifier is the forward direction of the second pin diode. By setting the current, the first pin diode and the second pin diode It is intended to reduce the high frequency resistance of the emission diode.

As described above, according to the first aspect of the present invention, a part of the input power from the high-frequency signal line is detected, the rectified current is amplified, and feedback control is performed as the forward current of the pin diode. A large insertion loss can be obtained and the coupling degree of the detection output taken out from the distributor may be small, so that the input signal can be transmitted efficiently even in the non-restricted mode.

According to the second aspect of the present invention, different amplified rectification currents can be allowed to flow through each of the multistage-connected pin diodes, so that it is possible to control the broadband power levels in the non-limit mode and the limit mode. is there.

According to the third aspect of the present invention, since the current flowing through the PIN diode can be sequentially changed in accordance with the power level incident on the limiter, insertion in the limit mode with respect to the power level set in a wider band. Loss can be kept large.

Embodiment 1 FIG.
Embodiment 1 of the present invention will be described below with reference to FIG. FIG. 1 is a configuration diagram of a main part of a radar system according to a first embodiment. 1 is an antenna for transmitting and receiving a high-frequency signal such as a microwave, 2 is a transmission / reception switch composed of a circulator, and 3 is a fixed one. A limiter (limiter circuit) that operates automatically when high frequency (RF) power exceeding a threshold is incident, 4 is a receiver that receives and processes power from the limiter circuit 3, and 5 is a high frequency pulse that oscillates at a constant PWR interval. Transmitter.

FIG. 2 is a circuit configuration diagram of the limiter circuit 3. In FIG. 2, 10 is a DC blocking capacitor (DC blocking means) provided on the signal line, 11 is a pin diode (PIN diode) that changes the high-frequency resistance of the limiter circuit 3 by forward current (IF), and 12 is feedback. High-frequency blocking means comprising a circuit and using an inductance or impedance conversion circuit, 13 is a DC blocking capacitor (DC blocking means) provided on the output side of the signal line, and 20 is a directional coupler for branching the input signal A divider circuit 21 includes a driver circuit 21, an amplifier 21 a that amplifies the current, a detection diode (detection means) 21 b that uses a Schottky diode that detects and rectifies the branch output from the divider, and the like. It comprises adjustment means such as distribution resistors 21c and 21d provided on the output side. In the drawings, the same reference numerals indicate the same or corresponding parts.

Next, the operation will be described. In FIG. 2, the RF input signal (incident power) incident from the input terminal is branched by the distributor 20, and the branch output is rectified by the detector diode 21b. When this detection current is input to the amplifier 21a, a bias current for driving the PIN diode 11 is supplied from the power supply voltage Vcc. The bias current for driving the PIN diode 11 is controlled by the distribution resistors 21c and 21d, fed back from the high frequency blocking inductance 12, and flows as a forward current to the PIN diode 11, whereby the PIN diode 11 becomes conductive. Alternatively, the high frequency resistance is decreased by increasing the forward current flowing through the PIN diode 11 by adjusting the distribution resistors 21c and 21d.

The adjusting means for the distribution resistors 21c and 21d is described as a fixed resistor in FIG. 2, but may be a variable resistor, or a digital resistor or a potentiometer that is variably set according to input power in advance.

As described above, since the current for driving the PIN diode 11 is supplied after being amplified by the amplifier 21a incorporated in the driver circuit 21, the branch output of the distributor 20 can be minimized. Accordingly, it is possible to reduce the insertion loss in the non-restricted mode. Further, when increasing the insertion loss in the limited mode, it is only necessary to increase the gain of the amplifier 21a of the driver circuit 21 without increasing the coupling degree of the branch output of the distributor 20, and the insertion loss in the non-restricted mode can be reduced. Since the increase can also be prevented, there is an effect of improving the electric performance in both the non-restricted mode and the restricted mode.

Embodiment 2. FIG.
In the first embodiment, the driver circuit 21 mounted on the limiter circuit 3 is a single unit, but the case where the driver circuit 21 is cascade-connected will be described in the second embodiment.

FIG. 3 is a circuit configuration diagram for explaining the limiter circuit 3 according to the second embodiment of the present invention, and reference numeral 14 denotes a quarter-wavelength line for impedance matching with the limiter circuit of the next stage connected to the first-stage limiter circuit. Impedance converter). As constituent elements of the limiter circuit of the next stage, 15 is a DC blocking capacitor (DC blocking means) provided on the signal line, and 16 is a pin diode (PIN) that changes the high frequency resistance of the limiter circuit by a forward current (IF). (Diodes), 17 constitutes a feedback circuit, high-frequency blocking means using an inductance or impedance conversion circuit, 18 is a DC blocking capacitor (DC blocking means) provided on the output side of the signal line, and 22 is a driver circuit The amplifier 22a amplifies a part of the detection current (output) output from the adjusting means of the first-stage limiter circuit, and the distribution resistors 22c and 22d provided on the output side of the amplifier 22a. In the figure, the same reference numerals as those in FIG. 2 denote the same or corresponding parts.

Next, the operation will be described. A part of the bias current for driving the first-stage PIN diode 11 supplied by the power supply voltage Vcc is supplied as a drive signal for the next-stage (second-stage) driver circuit 22. In the case of the present embodiment, the drive current of the second-stage PIN diode 16 is supplied by amplifying the branch output of the distributor 20 by the detection diode 21b and then amplifying it twice through the amplifier 21a and the amplifier 22a. It becomes larger than the drive current of the first stage PIN diode 11.

From the above, until the input power of the limiter circuit 3 reaches a certain threshold value, the first-stage PIN diode 11 is non-conductive and the second-stage PIN diode 16 is conductive. When the input power further increases and exceeds a certain threshold value, the first-stage PIN diode 11 is also brought into conduction after the second-stage PIN diode 16, so that the high-frequency resistance of the PIN diode according to the power input to the limiter circuit 3. Therefore, an appropriate insertion loss can be obtained for a wide range of input power even in the non-restricted mode.

Embodiment 3 FIG.
FIG. 4 is a diagram for explaining a circuit configuration of a limiter circuit 3 according to another embodiment. In FIG. 4, the same reference numerals as those in FIG. 2 or FIG. FIG. 4A shows a case where the limiter circuit described in the first embodiment is connected in two stages in series via a substantially ¼ wavelength line 14. In FIG. 4A, reference numeral 22b denotes a detection diode incorporated in the second-stage driver circuit 22. In this circuit configuration, the gain relationship between the amplifier 21a and the amplifier 22a is 21a <22a.

FIG. 4B shows a circuit configuration in which the limiter circuit self-biased via the substantially quarter-wave line 14 and the limiter circuit 3 described in the first embodiment are connected in series. In this configuration, when the coupling amounts of the dividers 20 provided at the input portions of the first-stage limiter circuit and the second-stage limiter circuit that are self-biased are equal, the rectified current of the PIN diode 16 is increased by the gain of the amplifier 22a. Since it can be set large, it is possible to obtain the optimum insertion loss in the non-restricted mode with the self-biased limiter circuit.

Similarly, even if a part of the self-bias current of the self-biased limiter circuit shown in FIG. 4C is input as the pre-amplifier signal of the second-stage limiter circuit, a corresponding effect can be obtained.

In the second and third embodiments of the present invention, the limiter circuit connected in two stages has been described. However, in the case of the limiter circuit 3 having a large number of stages, the next stage of the limiter circuit connected in series in a plurality of stages. Subsequent detection input before amplification uses a part of the detection output amplified by the first-stage amplifier as the input of the amplifier of the next-stage limiter circuit. The loss control of the limiter circuit 3 in the unrestricted mode and the limited mode over a wider range can be performed by using a part of the detection output amplified by the amplifier of No. 5 as an input of the amplifier of the subsequent limiter circuit.

It is a block diagram of a radar system. It is a circuit block diagram of the limiter circuit in Embodiment 1 of this invention. It is a circuit block diagram of the limiter circuit in Embodiment 2 of this invention. It is a circuit block diagram of the limiter circuit in Embodiment 3 of this invention.

Explanation of symbols

1 antenna, 2 transmission / reception switch, 3 limiter circuit, 4 receiver, 5 transmitter, 10 DC blocking capacitor (DC blocking means), 11 pin diode, 12 inductance (high frequency blocking means), 13 DC blocking capacitor (DC blocking means) ), 14 1/4 wavelength line (impedance converter), 15 DC blocking capacitor (DC blocking means), 16 pin diode, 17 inductance (high frequency blocking means), 18 DC blocking capacitor (DC blocking means), 20 distributor, 21 driver circuit, 21a amplifier, 21b detection diode (detection means), 21c distribution resistor (adjustment means), 21d distribution resistor (adjustment means), 22a amplifier, 22b detection diode (detection means), 22c distribution resistor (adjustment) Means), 22d distribution resistor (adjustment means).

Claims (3)

A distributor provided on the high-frequency signal line and one branch output of the distributor are connected in a forward direction via the first DC blocking means, one end is disposed on the signal line, and the other end is grounded Pin diode, detection means forward-connected to the other branch output of the distributor, an amplifier for amplifying the detection output of the detection means, an adjustment means for adjusting the detection output amplified by the amplifier, and the adjustment High-frequency blocking means interposed between the first diode and one end of the pin diode, and second DC blocking means provided on the output terminal side of the signal line, and the detection output amplified by the amplifier is the pin diode A limiter circuit that reduces the high-frequency resistance of the pin diode by using a forward current of. A distributor provided on the high-frequency signal line and one branch output of the distributor are connected in a forward direction via the first DC blocking means, one end is disposed on the signal line, and the other end is grounded A first pin diode; detection means forward-connected to the other branch output of the distributor; a first amplifier for amplifying the detection output of the detection means; and a detection output amplified by the first amplifier. A first high-frequency blocking unit that receives a part of the detection output branched from the first adjusting unit and is interposed between the one end of the first pin diode; An impedance converter connected in series via the second DC blocking means to the output side of the one end of the first pin diode, and forward connected to the output of the impedance converter via the third DC blocking means. , One end is placed on the signal line A second pin diode whose other end is grounded, a second amplifier for amplifying a part of the detection output branched from the first adjustment means, and a detection output amplified by the second amplifier. Second adjusting means for adjusting, second high-frequency blocking means interposed between the second adjusting means and one end of the second pin diode, and a fourth provided on the output terminal side of the signal line DC detection means, and the detection output amplified by the first amplifier is the forward current of the first pin diode, and the detection output amplified by the second amplifier is the forward current of the second pin diode. Thus, the limiter circuit reduces the high frequency resistance of the first pin diode and the second pin diode. A first distributor provided in a high-frequency signal line, and one branch output of the first distributor connected in a forward direction via a first DC blocking means, one end being disposed in the signal line; A first pin diode whose other end is grounded, a first detector connected in the forward direction to the other branch output of the first distributor, and a first amplifier for amplifying the detection output of the first detector An amplifier, first adjusting means for adjusting the detection output amplified by the first amplifier, and a first high-frequency blocking unit interposed between the first adjusting means and the one end of the first pin diode. Means, an impedance converter connected in series to the output side of the one end of the first pin diode via a second DC blocking means, and a second distribution provided on the signal line of the output of the impedance converter And one branch output of this second distributor Forward connection via the third DC blocking means, forward connection to the second pin diode, one end of which is disposed on the signal line and the other end is grounded, and the other branch output of the second distributor The second detection means, the second amplifier for amplifying the detection output of the second detection means, the second adjustment means for adjusting the detection output amplified by the second amplifier, and the second First high-frequency blocking means interposed between the adjusting means and one end of the second pin diode, and fourth DC blocking means provided on the output terminal side of the signal line, and a first amplifier The detection output amplified in step 1 is the forward current of the first pin diode, and the detection output amplified by the second amplifier is the forward current of the second pin diode. The high frequency resistance of the pin diode Limiter circuit.

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