CN107195672B - 一种薄膜晶体管及其控制方法 - Google Patents
一种薄膜晶体管及其控制方法 Download PDFInfo
- Publication number
- CN107195672B CN107195672B CN201710393405.XA CN201710393405A CN107195672B CN 107195672 B CN107195672 B CN 107195672B CN 201710393405 A CN201710393405 A CN 201710393405A CN 107195672 B CN107195672 B CN 107195672B
- Authority
- CN
- China
- Prior art keywords
- thin film
- film transistor
- drain electrode
- main channel
- channel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 97
- 238000000034 method Methods 0.000 title claims abstract description 31
- 239000000758 substrate Substances 0.000 claims abstract description 36
- 238000009413 insulation Methods 0.000 claims abstract description 5
- 239000004973 liquid crystal related substance Substances 0.000 description 10
- 230000002950 deficient Effects 0.000 description 7
- 238000012423 maintenance Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 4
- 239000010909 process residue Substances 0.000 description 4
- 239000000969 carrier Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000002159 abnormal effect Effects 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000002923 metal particle Substances 0.000 description 2
- 238000004458 analytical method Methods 0.000 description 1
- 239000000356 contaminant Substances 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 239000003344 environmental pollutant Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 231100000719 pollutant Toxicity 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/13624—Active matrix addressed cells having more than one switching element per pixel
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136259—Repairing; Defects
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
- H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/13624—Active matrix addressed cells having more than one switching element per pixel
- G02F1/136245—Active matrix addressed cells having more than one switching element per pixel having complementary transistors
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136259—Repairing; Defects
- G02F1/136268—Switch defects
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Ceramic Engineering (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
- Manufacturing & Machinery (AREA)
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
本发明提供了一种薄膜晶体管及其控制方法。所述薄膜晶体管包括:基板;栅极,设置于基板上;栅极绝缘层,覆盖于栅极和基板的表面;有源层,设置于栅极绝缘层上;源极与漏极,设置于有源层上,源极包括为两个源极电极,漏极包括两个漏极电极,两个漏极电极平行设置在两个源极电极之间,源极电极与相邻的漏极电极之间形成主沟道,两个漏极电极之间形成副沟道;当任一主沟道出现短路时,切断出现短路的主沟道对应的漏极电极,切断的漏极电极作为出现短路的主沟道对应的源极电极的一部分使用,将两个漏极电极之间形成的副沟道作为新主沟道使用,控制操作对薄膜晶体管的性能影响不大,控制操作后薄膜晶体管对应的像素点仍可以使用。
Description
技术领域
本发明涉及显示技术领域,特别是涉及一种薄膜晶体管及其控制方法。
背景技术
薄膜晶体管型液晶显示器(TFT-LCD,Thin Film Transistor-LiquidCrystalDisplay)主要由彩膜基板、阵列基板以及位于上述两基板之间的液晶层所构成,通过控制阵列基板上的像素电极和彩膜基板上的公共电极之间的电场,来控制液晶层中液晶分子的偏转,达到所需的显示效果。TFT-LCD因具有亮度高、对比度高、功耗低、寿命长和重量小等优点而被广泛使用。
阵列基板上形成有多个薄膜晶体管(TFT),液晶层中每一液晶分子都是由集成在其后的薄膜晶体管来驱动。TFT由栅极、源极和漏极等结构组成,当源极和漏极之间的沟道间产生电流时,电流的存在使得源极和漏极导通,TFT开始工作。
但是,在TFT的制作过程中,常会因为沟道回刻蚀工艺残留以及漏极与源极沟道工艺残留等问题,薄膜晶体管在制作完成后,沟道中仍有一些金属微粒或者导电污染物的残留,导电残留物的存在使得源极和漏极间形成导通桥,导致TFT不良,无法正常使用。
基于TFT中沟道的不同结构,可以将TFT分为多种,如U型沟道TFT,而U型沟道TFT又可以分为多种,如图1所示的单U型沟道TFT和图2所示的双U型沟道TFT,图2所示的双U型沟道TFT是图1所示的单U型沟道TFT的组合。图1所示的单U型沟道TFT中,a为漏极,b为源极,源极b包括第一源极电极b1和第二源极电极b2,漏极a与第一源极电极b1之间形成一主沟道,漏极a与第二源极电极b2之间形成另一主沟道。
不良TFT的维修结果,直接影响最终显示器的判级和TFT基板生产的良率。针对上述U型沟道TFT,当TFT中的一个U型沟道出现不良时,现有的处理方法是切断该不良沟道对应的源极电极与数据线的连接,停止该TFT工作,将该TFT控制的像素点灭掉,将该像素点做成暗点,不参与显示,但是当不良像素点数目较多时,会大大降低维修后的TFT基板的良率。
发明内容
本发明要解决的技术问题是提供一种薄膜晶体管,当任一主沟道出现短路时,切断出现短路的主沟道对应的漏极电极,控制操作对薄膜晶体管的性能影响不大,控制操作后薄膜晶体管对应的像素点仍可以使用,本方法有效提高了维修后的TFT基板的良率。
一方面,提供了一种薄膜晶体管,所述薄膜晶体管包括:
基板;
栅极,设置于所述基板上;
栅极绝缘层,覆盖于所述栅极和所述基板的表面;
有源层,设置于所述栅极绝缘层上;
源极与漏极,设置于所述有源层上,所述源极包括两个源极电极,所述漏极包括两个漏极电极,所述两个漏极电极平行设置在所述两个源极电极之间,所述源极电极与相邻的漏极电极之间形成主沟道,所述两个漏极电极之间形成副沟道;所述主沟道被配置为当其出现短路时,与其对应的漏极电极被切断。
进一步地,所述两个源极电极与所述两个漏极电极之间形成的两个主沟道的宽长比相同;
所述副沟道的宽长比与任一所述主沟道的宽长比相同,切断后的薄膜晶体管的宽长比保持不变。
进一步地,任一所述主沟道的宽长比与所述副沟道的宽长比之和大于另一主沟道的宽长比。
进一步地,所述源极在所述栅极上的正投影与所述栅极部分重合。
进一步地,所述源极在所述栅极上的正投影与所述栅极完全重合。
进一步地,所述漏极为U型结构或双I结构;
所述源极为U型结构。
另一方面,还提供了一种阵列基板,包括上述的薄膜晶体管。
另一方面,还提供了一种显示装置,包括上述的阵列基板。
另一方面,还提供了上述的薄膜晶体管的控制方法,所述方法包括:
检测所述薄膜晶体管的主沟道是否发生短路;
当检测到所述薄膜晶体管的某一主沟道发生短路时,切断出现短路的主沟道对应的漏极电极,将两个漏极电极之间形成的副沟道作为新主沟道使用。
进一步地,任一所述主沟道的宽长比与所述副沟道的宽长比之和大于另一主沟道的宽长比。
与现有技术相比,本发明包括以下优点:
本发明提供了一种薄膜晶体管及其控制方法,本发明提供的薄膜晶体管中源极包括两个源极电极,漏极包括两个漏极电极,两个漏极电极平行设置在两个源极电极之间,源极电极与相邻的漏极电极之间形成主沟道,两个漏极电极之间形成副沟道,当任一主沟道出现短路时,切断出现短路的主沟道对应的漏极电极,将切断的漏极电极作为出现短路的主沟道对应的源极电极的一部分使用,将两个漏极电极之间形成的副沟道作为新主沟道使用,控制操作对薄膜晶体管的性能影响不大,控制操作后薄膜晶体管对应的像素点仍可以使用,本方法有效提高了维修后的TFT基板的良率。
本发明实施例中优选地,两个源极电极与两个漏极电极之间形成的两个主沟道的宽长比相同,副沟道的宽长比与任一主沟道的宽长比相同,在保持TFT开关的宽长比W/L不变的情况下,修复该问题TFT,完成对不良像素点的修复,维修后的TFT基板的性能基本保持不变,对应像素点可以正常显示。
附图说明
图1是传统的一种薄膜晶体管的结构示意图;
图2是传统的另一种薄膜晶体管的结构示意图;
图3是本发明实施例提供的一种薄膜晶体管的结构示意图;
图4是本发明实施例提供的另一种薄膜晶体管的结构示意图;
图5是图3-图4所示的薄膜晶体管的控制方法的流程图。
附图标记说明:
a、漏极 b、源极 b1、第一源极电极 b2、第二源极电极
1、漏极 11、第一漏极电极 12、第二漏极电极
2、源极 21、第一源极电极 22、第二源极电极
3、数据线 4、扫描线 5、栅极
1′、漏极 11′、第一漏极电极 12′、第二漏极电极
2′、源极 21′、第一源极电极 22′、第二源极电极
3′、数据线 4′、扫描线 5′、栅极
具体实施方式
为使本发明的上述目的、特征和优点能够更加明显易懂,下面结合附图和具体实施方式对本发明作进一步详细的说明。
在本发明的描述中,除非另有说明,“多个”的含义是两个或两个以上;术语“上”、“下”、“左”、“右”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本发明和简化描述,而不是指示或暗示所指的机或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本发明的限制。
在本发明的描述中,需要说明的是,除非另有明确的规定和限定,术语“安装”、“相连”、“连接”应做广义理解,例如,可以是固定连接,也可以是可拆卸连接,或一体地连接;可以是机械连接,也可以是电连接;可以是直接相连,也可以通过中间媒介间接相连。对于本领域的普通技术人员而言,可以具体情况理解上述术语在本发明中的具体含义。
下面结合附图和实施例对本发明的具体实施方式作进一步详细描述。以下实施例用于说明本发明,但不用来限制本发明的范围。
图3是本发明实施例提供的一种薄膜晶体管的结构示意图,图3所示的薄膜晶体管包括:基板、栅极、栅极绝缘层、有源层、漏极1和源极2,其中,栅极设置于基板上;栅极绝缘层覆盖于栅极和基板的表面;有源层设置于栅极绝缘层上;漏极1和源极2设置于有源层上。形成漏极1和源极2时,先在有源层上形成金属层,再对金属层进行构图工艺处理,形成漏极1和源极2,构图工艺后的漏极1和源极2之间形成沟道,沟道位于栅极5的上方。
漏极1包括两个漏极电极,第一漏极电极11和第二漏极电极12,源极2包括两个漏极电极,第一源极电极21和第二源极电极22,两个漏极电极平行设置在两个源极电极之间,源极电极与相邻的漏极电极之间形成主沟道,两个漏极电极之间形成副沟道,也就是说图3中,第一漏极电极11和第一源极电极21之间形成一主沟道,第二漏极电极12和第二源极电极22之间形成另一主沟道,第一漏极电极11和第二漏极电极12之间形成副沟道。主沟道被配置为当其出现短路时,与其对应的漏极电极被切断。
当薄膜晶体管处于正常工作状态下,两个主沟道工作,两个主沟道中有载流子通过,副沟道不工作,副沟道中无载流子通过。
当图3所示的薄膜晶体管的任一主沟道出现短路时,控制该薄膜晶体管的方法为:切断出现短路的主沟道对应的漏极电极,具体切断出现短路的主沟道对应的漏极电极与另一漏极电极的连接,以及切断出现短路的主沟道对应的漏极电极与薄膜晶体管显示器中像素电极的连接,将出现短路的主沟道对应的漏极电极作为源极电极的一部分使用。处理后的薄膜晶体管工作时,第一漏极电极11和第二漏极电极12之间的副沟道作为新主沟道使用,与剩余的另一原始主沟道一起工作。
例如,当第一漏极电极11和第一源极电极21之间形成一主沟道出现短路时,切断第一漏极电极11与第二漏极电极12的连接,以及切断第一漏极电极11与像素电极(未画出)的连接,将第一漏极电极11作为第一源极电极21的一部分使用。处理后的薄膜晶体管工作时,第一漏极电极11和第二漏极电极12之间的副沟道作为新主沟道使用,与剩余的另一原始主沟道一起工作。
基于以上分析可知,与背景技术相比,本发明提供的薄膜晶体管在控制后由于将两个漏极电极之间的副沟道作为新主沟道使用,因此控制后的薄膜晶体管的沟道的宽长比变化较小,控制操作对薄膜晶体管的性能影响不大,所得产品的维修良率得到提高。
实现本发明实施例提供的薄膜晶体管的结构设计无需工艺制程上的变更,只需更改Mask图形即可完成,更改操作简单,便于实施。
图4是本发明实施例提供的另一种薄膜晶体管的结构示意图。图4与图3相比,漏极和源极的相对结构及相对位置相同,不同仅在于源极与栅极层的相对位置。图3中的源极2左侧位于栅极5所在区域内,而图4中的源极2′左侧位于栅极5′所在区域外。
图3所示的源极2在栅极5上的正投影与栅极5全部重合,该种结构的优势在于栅极5尺寸较大,沟道全部被栅极5遮挡,薄膜晶体管不会因光照造成漏电流异常增大。图4所示的源极2′在栅极5′上的正投影与栅极5′部分重合,该种结构的优势在于栅极5′宽度较小、薄膜晶体管的开口率较高。可以根据需要对源极与栅极层的相对位置进行设置。
由于图4所示的薄膜晶体管中源极和漏极的相对结构及相对位置与图3相同,因此当图4所示薄膜晶体管中任一主沟道出现短路时,可以采用上述控制图3所示薄膜晶体管的方法,对图4所示的薄膜晶体管进行控制处理。图4中,1′为漏极,11′为第一漏极电极,12′为第二漏极电极,2′为源极,21′为第一源极电极,3′为数据线,4′为扫描线,5′为栅极。
薄膜晶体管中两个主沟道的宽长比(W/L)可以相同也可以不同,主沟道的宽长比与副沟道的宽长比可以相同也可以不同,可以根据实际需要进行设置。
实际结构中,两个源极电极与两个漏极电极之间形成的两个主沟道的宽长比可以相同,副沟道的宽长比与任一主沟道的宽长比可以相同,在上述结构下,切断后的薄膜晶体管的宽长比保持不变,在保持TFT开关的宽长比W/L不变的情况下,修复该问题TFT,完成对不良像素点的修复,维修后的TFT基板的性能保持不变,对应像素点正常显示,维修产品的良率得到提高。
实际维修U型薄膜晶体管的过程中,当某一沟道发生短路时,如果切断发生短路的沟道对应的源极的方法对TFT进行维修,则维修后TFT的沟道的宽长比会减小一半,对应像素点会出现过暗或过亮等不良现象,从而大大降低了TFT的性能。
为保证采用本发明实施例提供的方法维修后的TFT的性能,防止控制后的薄膜晶体管的沟道的宽长比过小,本发明实施例优选地,薄膜晶体管中,任一主沟道的宽长比与副沟道的宽长比之和大于另一主沟道的宽长比,这样薄膜晶体管在维修后,其沟道仍具有较大的宽长比,TFT仍具有较好性能。
本发明实施例提供薄膜晶体管可以应用于薄膜晶体管液晶显示器中;还可以应用于具有薄膜晶体管的其他显示器中。
基于图3所示的薄膜晶体管液晶显示器的结构,薄膜晶体管中的漏极1可以与薄膜晶体管液晶显示器的像素电极连接。薄膜晶体管中的源极2可以与薄膜晶体管液晶显示器的数据线3连接。薄膜晶体管中的栅极5与薄膜晶体管液晶显示器的扫描线4连接。本发明实施例中,漏极1可以为U型结构或双I结构,当漏极1为U型结构时,第一漏极电极11和第二漏极电极12可以为U型漏极的两个平行侧壁。漏极1需要与像素电极连接,如果像素电极和数据线3是同层设置,则像素电极可以直接与漏极1连接,而无需通过过孔与漏极1连接,则漏极1为双I型结构较好,双I型结构可以提高薄膜晶体管的开口率;如果像素电极和数据线3不是同层设置,则像素电极需要通过过孔与漏极1连接,因为使用U型漏极1可以减少过孔数量,所以漏极1为U型结构较好,但是开口率相对较低。
源极2可以为U型结构。如图3和图4所示,U型漏极2设置在U型源极2的U型开口内,U型漏极1的两个侧壁分别与U型源极2的两个侧壁平行。漏极1和源极2除上述结构外,还可以是其他适用结构,本发明在此不做限制。
本发明实施例还提供了一种阵列基板,包括本发明实施例提供的薄膜晶体管。
本发明实施例还提供了一种显示装置,包括本发明实施例提供的阵列基板。内置上述阵列基板的显示装置可以为多种,如液晶显示装置、发光二极管显示装置、有机发光二极管显示装置等。
本发明实施例还提供了一种上述薄膜晶体管的控制方法。图5是图3-图4所示的薄膜晶体管的控制方法的流程图,图5所示的薄膜晶体管的控制方法包括:
步骤101、检测所述薄膜晶体管的主沟道是否发生短路。
本发明实施例提供的薄膜晶体管包括基板、栅极、栅极绝缘层、有源层、源极和漏极,其中,栅极设置于基板上;栅极绝缘层负载于栅极和基板的表面;有源层设置于栅极绝缘层上,并位于栅极的上方;源极包括两个源极电极,第一源极电极和第二源极电极,漏极包括两个漏极电极,第一漏极电极和第二漏极电极,两个漏极电极平行设置在两个源极电极之间,源极电极与相邻的漏极电极之间形成主沟道,两个漏极电极之间形成副沟道。
当薄膜晶体管处于正常工作状态下,两个主沟道工作,两个主沟道中有载流子通过,副沟道不工作,无载流子通过。
由于在薄膜晶体管的制作过程中,常会因为沟道回刻蚀工艺残留以及源极与漏极沟道工艺残留等问题,薄膜晶体管在制作完成后,沟道中仍有一些金属微粒或者导电污染物的残留,导电残留物的存在使得源极和漏极间形成导通桥,导致TFT不良,无法正常使用。
因此当薄膜晶体管出现问题无法正常工作,维修处理薄膜晶体管时,可以检测薄膜晶体管的主沟道是否发生短路。检测主沟道是否发生短路的方法有多种,如自动图形检测方法,通过镜头扫描进行灰度对比,确定出短路的位置;又如电学检测方法,通过加电学信号后,出现短路的像素在模拟显示中会有异常,从而确定出短路的位置。
步骤102、当检测到所述薄膜晶体管的某一主沟道发生短路时,切断出现短路的主沟道对应的漏极电极,将两个漏极电极之间形成的副沟道作为新主沟道使用。
当检测到薄膜晶体管的某一主沟道发生短路时,对该薄膜晶体管进行控制,具体控制方法为:切断出现短路的主沟道对应的漏极电极,具体切断出现短路的主沟道对应的漏极电极与另一漏极电极的连接,以及切断出现短路的主沟道对应的漏极电极与薄膜晶体管显示器中像素电极的连接,将出现短路的主沟道对应的漏极电极作为源极电极的一部分使用。处理后的薄膜晶体管工作时,两个漏极电极之间的副沟道作为新主沟道使用,与剩余的另一原始主沟道一起工作。
与背景技术相比,本发明提供的薄膜晶体管在控制后由于将两个漏极电极之间的副沟道作为新主沟道使用,因此控制操作对薄膜晶体管的性能影响不大,维修后的薄膜晶体管仍可以工作,对应的像素点仍可以工作。
本发明提供了一种薄膜晶体管及其控制方法,本发明提供的薄膜晶体管中源极包括两个源极电极,漏极包括两个漏极电极,两个漏极电极平行设置在两个源极电极之间,源极电极与相邻的漏极电极之间形成主沟道,两个漏极电极之间形成副沟道,当任一主沟道出现短路时,切断出现短路的主沟道对应的漏极电极,将切断的漏极电极作为出现短路的主沟道对应的源极电极的一部分使用,将两个漏极电极之间形成的副沟道作为新主沟道使用,控制操作对薄膜晶体管的性能影响不大,控制操作后薄膜晶体管对应的像素点仍可以使用,本方法有效提高了维修后的TFT基板的良率。
本发明实施例中优选地,两个源极电极与两个漏极电极之间形成的两个主沟道的宽长比相同,副沟道的宽长比与任一主沟道的宽长比相同,在保持TFT开关的宽长比W/L不变的情况下,修复该问题TFT,完成对不良像素点的修复,维修后的TFT基板的性能基本保持不变,对应像素点可以正常显示。
本说明书中的各个实施例均采用递进的方式描述,每个实施例重点说明的都是与其他实施例的不同之处,各个实施例之间相同相似的部分互相参见即可。
以上对本发明所提供的薄膜晶体管及其控制方法进行了详细介绍,本文中应用了具体个例对本发明的原理及实施方式进行了阐述,以上实施例的说明只是用于帮助理解本发明的方法及其核心思想;同时,对于本领域的一般技术人员,依据本发明的思想,在具体实施方式及应用范围上均会有改变之处,综上所述,本说明书内容不应理解为对本发明的限制。
Claims (10)
1.一种薄膜晶体管,其特征在于,所述薄膜晶体管包括:
基板;
栅极,设置于所述基板上;
栅极绝缘层,覆盖于所述栅极和所述基板的表面;
有源层,设置于所述栅极绝缘层上;
源极与漏极,设置于所述有源层上,所述源极包括两个源极电极,所述漏极包括两个漏极电极,所述两个漏极电极平行设置在所述两个源极电极之间,所述源极电极与相邻的漏极电极之间形成主沟道,所述两个漏极电极之间形成副沟道;所述主沟道被配置为当其出现短路时,与其对应的漏极电极被切断,所述被切断的漏极电极作为出现短路的所述主沟道对应的源极电极的一部分,两个漏极电极之间形成的副沟道作为新主沟道。
2.根据权利要求1所述的薄膜晶体管,其特征在于,所述两个源极电极与所述两个漏极电极之间形成的两个主沟道的宽长比相同;
所述副沟道的宽长比与任一所述主沟道的宽长比相同,切断后的薄膜晶体管的宽长比保持不变。
3.根据权利要求1所述的薄膜晶体管,其特征在于,任一所述主沟道的宽长比与所述副沟道的宽长比之和大于另一主沟道的宽长比。
4.根据权利要求1所述的薄膜晶体管,其特征在于,所述源极在所述栅极上的正投影与所述栅极部分重合。
5.根据权利要求1所述的薄膜晶体管,其特征在于,所述源极在所述栅极上的正投影与所述栅极完全重合。
6.根据权利要求1所述的薄膜晶体管,其特征在于:
所述漏极为U型结构或双I结构;
所述源极为U型结构。
7.一种阵列基板,其特征在于,包括权利要求1~6任一项所述的薄膜晶体管。
8.一种显示装置,其特征在于,包括权利要求7所述的阵列基板。
9.一种如权利要求1~6任一项所述的薄膜晶体管的控制方法,其特征在于,所述方法包括:
检测所述薄膜晶体管的主沟道是否发生短路;
当检测到所述薄膜晶体管的某一主沟道发生短路时,切断出现短路的主沟道对应的漏极电极,将所述被切断的漏极电极作为出现短路的所述主沟道对应的源极电极的一部分使用,将两个漏极电极之间形成的副沟道作为新主沟道使用。
10.根据权利要求9所述的控制方法,其特征在于,任一所述主沟道的宽长比与所述副沟道的宽长比之和大于另一主沟道的宽长比。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201710393405.XA CN107195672B (zh) | 2017-05-27 | 2017-05-27 | 一种薄膜晶体管及其控制方法 |
US16/322,793 US20190187505A1 (en) | 2017-05-27 | 2018-05-10 | Thin film transistor, control method therefor, array substrate, and display device |
PCT/CN2018/086296 WO2018219110A1 (zh) | 2017-05-27 | 2018-05-10 | 薄膜晶体管及其控制方法、阵列基板和显示装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201710393405.XA CN107195672B (zh) | 2017-05-27 | 2017-05-27 | 一种薄膜晶体管及其控制方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN107195672A CN107195672A (zh) | 2017-09-22 |
CN107195672B true CN107195672B (zh) | 2019-12-10 |
Family
ID=59875625
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201710393405.XA Active CN107195672B (zh) | 2017-05-27 | 2017-05-27 | 一种薄膜晶体管及其控制方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US20190187505A1 (zh) |
CN (1) | CN107195672B (zh) |
WO (1) | WO2018219110A1 (zh) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107195672B (zh) * | 2017-05-27 | 2019-12-10 | 京东方科技集团股份有限公司 | 一种薄膜晶体管及其控制方法 |
CN109148598B (zh) * | 2018-08-20 | 2022-04-26 | Tcl华星光电技术有限公司 | 薄膜晶体管及其制备方法 |
CN111628004A (zh) * | 2020-05-18 | 2020-09-04 | 深圳市华星光电半导体显示技术有限公司 | 低延时薄膜晶体管、阵列基板及显示面板 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101252087B1 (ko) * | 2005-12-30 | 2013-04-12 | 엘지디스플레이 주식회사 | 평판표시장치 및 그 제조방법 |
WO2007097068A1 (ja) * | 2006-02-24 | 2007-08-30 | Sharp Kabushiki Kaisha | アクティブマトリクス基板、表示装置、テレビジョン受像機 |
US7688392B2 (en) * | 2006-04-06 | 2010-03-30 | Chunghwa Picture Tubes, Ltd. | Pixel structure including a gate having an opening and an extension line between the data line and the source |
JP2007292879A (ja) * | 2006-04-21 | 2007-11-08 | Hitachi Displays Ltd | 液晶表示装置 |
KR20080028640A (ko) * | 2006-09-27 | 2008-04-01 | 삼성전자주식회사 | 박막 트랜지스터 제조용 마스크, 이에 의해 제조된 박막트랜지스터 기판 및 이를 이용한 박막 트랜지스터 기판의제조방법 |
TWI344025B (en) * | 2006-10-11 | 2011-06-21 | Chunghwa Picture Tubes Ltd | Pixel structure and repair method thereof |
US8558960B2 (en) * | 2010-09-13 | 2013-10-15 | Semiconductor Energy Laboratory Co., Ltd. | Liquid crystal display device and method for manufacturing the same |
CN103489923B (zh) * | 2013-10-16 | 2017-02-08 | 京东方科技集团股份有限公司 | 薄膜晶体管及其制作方法、修复方法和阵列基板 |
JP6518466B2 (ja) * | 2015-03-11 | 2019-05-22 | 株式会社ジャパンディスプレイ | 薄膜トランジスタ |
CN107195672B (zh) * | 2017-05-27 | 2019-12-10 | 京东方科技集团股份有限公司 | 一种薄膜晶体管及其控制方法 |
-
2017
- 2017-05-27 CN CN201710393405.XA patent/CN107195672B/zh active Active
-
2018
- 2018-05-10 WO PCT/CN2018/086296 patent/WO2018219110A1/zh active Application Filing
- 2018-05-10 US US16/322,793 patent/US20190187505A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
US20190187505A1 (en) | 2019-06-20 |
CN107195672A (zh) | 2017-09-22 |
WO2018219110A1 (zh) | 2018-12-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100298995B1 (ko) | 액정 표시 장치 및 그 검사 방법 | |
US6839099B2 (en) | Liquid crystal display device and deficiency correcting method thereof | |
US8665251B2 (en) | Display device and method of manufacturing the same | |
CN107195672B (zh) | 一种薄膜晶体管及其控制方法 | |
KR102195180B1 (ko) | 리던던시 트랜지스터 구조를 갖는 표시장치 | |
US20110304790A1 (en) | Flat Panel Display and Fabricating Method Thereof | |
CN102301407B (zh) | 图像显示设备和用于修复短路故障的方法 | |
CN106941135B (zh) | 一种有机发光显示面板的修补方法及有机发光显示面板 | |
KR100759283B1 (ko) | 표시장치 및 표시장치의 결함 복구 방법 | |
CN100502051C (zh) | 薄膜晶体管阵列及其修补方法 | |
US7742115B2 (en) | Pixel structure having notch on capacitor electrode and contact opening above the notch connecting pixel electrode above passivation layer with the capacitor electrode | |
CN105405852A (zh) | 阵列基板及其制造方法、显示装置 | |
US11143926B2 (en) | Active matrix substrate and display apparatus | |
US20030214248A1 (en) | Dim-out method for organic EL panel | |
CN106405951B (zh) | 显示基板及其制作方法、显示装置及其维修方法 | |
US7053977B2 (en) | Laser repair structure of liquid crystal display device and method thereof | |
US20070290205A1 (en) | Dual-channel thin film transistor | |
KR102449066B1 (ko) | 표시장치용 어레이기판 및 그 제조방법 | |
CN107132712A (zh) | 阵列基板修补方法、阵列基板及液晶显示器 | |
US20110205249A1 (en) | Display and method for fabricating the same | |
KR100695614B1 (ko) | 레이저 화학증착장비를 이용한 원 픽셀 리페어 방법 및 이를 이용하여 리페어된 액정표시소자의 기판 | |
CN107797344A (zh) | 阵列基板、显示面板及其制造方法 | |
JP2007241183A (ja) | 表示装置および表示装置の修復方法 | |
US9170462B2 (en) | Array substrate and liquid crystal display panel | |
KR100719916B1 (ko) | 라인 오픈 및 층간 쇼트 리페어용 수단이 구비된 박막트랜지스터 액정표시장치 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |