CN107170802B - Short-circuit anode SOI LIGBT - Google Patents

Short-circuit anode SOI LIGBT Download PDF

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CN107170802B
CN107170802B CN201710439235.4A CN201710439235A CN107170802B CN 107170802 B CN107170802 B CN 107170802B CN 201710439235 A CN201710439235 A CN 201710439235A CN 107170802 B CN107170802 B CN 107170802B
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CN107170802A (en
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罗小蓉
赵哲言
邓高强
黄琳华
孙涛
张波
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University of Electronic Science and Technology of China
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7394—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET on an insulating layer or substrate, e.g. thin film device or device isolated from the bulk substrate

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Thin Film Transistor (AREA)

Abstract

The invention belongs to the technical field of power semiconductors, and relates to a short-circuit anode SOI LIGBT with an alternating NP (sodium-phosphorus) voltage-resistant buffer layer structure. Compared with the conventional short-circuit anode LIGBT, the invention has no high-concentration field stop layer, and introduces N-type island regions and P-type island regions which are alternately distributed in the anode region. When the forward blocking is performed, the P-type island region is completely exhausted, and the N-type island region which is not completely exhausted can play a role of field cut-off. When the device is conducted in a unipolar mode, the device is blocked by an electron barrier of the P-type island region, electron current in the drift region flows through the N-type island region and the high-resistance drift region between the island region and the anode structure, and finally the electron current is collected by the N + anode. Compared with the traditional LIGBT, the power-off protection circuit has the advantages that the power-off protection circuit has higher turn-off speed and loss; compared with the conventional short anode LIGBT with a continuous field stop layer, the invention eliminates the voltage folding phenomenon under the smaller longitudinal cell size.

Description

Short-circuit anode SOI LIGBT
Technical Field
The invention belongs to the technical field of power semiconductors, and relates to a short-circuited anode SOI LIGBT (laterally insulated Gate Bipolar Transistor).
Background
The IGBT has the characteristics of high-speed switching and voltage driving of a field effect transistor, and also has the characteristics of a low saturation voltage of a bipolar transistor and the ability of easily realizing a large current. Lateral IGBTs (LIGBTs) are easy to integrate in a power integrated circuit, particularly SOI-based LIGBTs can completely eliminate hole electron pair injection of a bulk silicon LIGBT substrate, and the SOI technology adopting dielectric isolation is easy to realize complete electrical isolation of devices, so that the SOI LIGBTs are promoted to be widely applied to high and new technology industries such as power electronics, industrial automation, aerospace and the like.
When the IGBT is in an off state, the electron barrier of the anode region forces the carriers stored in the drift region to disappear through recombination, so that the turn-off speed of the IGBT is reduced. In the short-circuit anode technology, an N-type anode region is introduced into an anode end, a large number of electrons stored in a drift region can be rapidly extracted through the N-type anode region, the current trailing time is shortened, the turn-off speed is accelerated, the turn-off loss of the N-type anode region is reduced, and the good compromise of the turn-on voltage drop and the turn-off loss is further obtained. However, due to the introduction of the short-circuit anode structure, when the device is in a unipolar mode, the current flowing through the drift region is all electron current, and the electron current is collected by the N-type collector region to form a MOSFET conduction mode. When the voltage between the collector and the emitter of the device is increased to turn on a collector PN junction (a PN junction formed by a P-type collector region and an N-type field stop region), a large number of holes are injected into the drift region to generate a conductance modulation effect, the forward conduction voltage of the device is greatly reduced, and an IGBT conduction mode is formed. Due to the conductance modulation effect brought by the conversion from the MOSFET mode to the IGBT mode, a voltage folding effect is brought to the device, and the uniformity of the current distribution of the device is influenced. The invention provides a novel short-circuit anode structure which can eliminate the voltage folding effect under the small cell size and simultaneously obtain low conduction voltage drop and low turn-off loss.
Disclosure of Invention
The present invention is directed to solving the above problems and providing a short anode SOI LIGBT with an alternating NP dielectric buffer structure.
The technical scheme of the invention is as follows:
a short-circuit anode SOI LIGBT comprises a P substrate 1, a buried oxide layer 2 and a top semiconductor layer which are sequentially stacked from bottom to top; along the transverse direction of the device, the top semiconductor layer is sequentially provided with a cathode structure, a P well region 4, an N drift region 3 and an anode structure from one side of the device to the other side of the device; the cathode structure comprises a P + body contact region 6 and an N + cathode region 5, the bottom of the P + body contact region 6 is in contact with the buried oxide layer 2, the N + cathode region 5 is positioned on the upper layer of the P well region 4, the N + cathode region 5 is in contact with the P + body contact region 6 and the P well region 4, and the P + body contact region 6 is in contact with the P well region 4; the common leading-out end of the P + body contact region 6 and the N + cathode region 5 is a cathode; the P well region 4 is in contact with the N drift region 3; a grid structure is arranged on the upper surface of the P well region 4 between the N + cathode region 5 and the N drift region 3; the grid structure comprises a grid dielectric 7 and grid polysilicon 8 covering the grid dielectric 7, and the leading-out end of the grid polysilicon 8 is a grid electrode; the anode structure comprises P + anode regions 9 and N + anode regions 10 which are alternately arranged along the longitudinal direction of the device, the P + anode regions 9 and the N + anode regions 10 are in contact with the N drift region 3 and the buried oxide layer 2, and the common leading-out end of the P + anode regions 9 and the N + anode regions 10 is an anode;
the buried oxide semiconductor device is characterized by further comprising an N-type island region 11 and a P-type island region 12, wherein the N-type island region 11 and the P-type island region 12 are located on one sides, close to the cathode structure, of the P + anode region 9 and the N + anode region 10, the N-type island region 11 and the P-type island region 12 are arranged alternately in the longitudinal direction of the device, and the bottoms of the N-type island region 11 and the P-type island region 12 are in contact with the buried oxide layer 2.
In the above solution, the transverse direction of the device and the longitudinal direction of the device are on the same horizontal plane and perpendicular to each other, and form a three-dimensional rectangular coordinate system with the vertical direction of the device, corresponding to fig. 1, the transverse direction of the device corresponds to the X axis, the vertical direction of the device corresponds to the Y axis, and the longitudinal direction of the device corresponds to the Z axis.
Further, the N-type island region 11 and the P-type island region 12 are laterally spaced from the P + anode region 9 and the N + anode region 10 by the N drift region 3.
Further, the N-type island region 11 and the P-type island region 12 are laterally in contact with the P + anode region 9 or the N + anode region 10.
Further, the P-type islands 12 in the anode structure are equal in width in the device longitudinal direction.
Further, the P-type islands 12 are not equal in width in the longitudinal direction of the device, and the longitudinal pitch thereof is larger closer to the N + anode region 10.
Compared with the traditional LIGBT, the power-off protection circuit has the advantages that the power-off protection circuit has higher turn-off speed and loss; compared with the traditional short-circuit anode LIGBT with the continuous field stop layer, the invention eliminates the voltage folding phenomenon under smaller longitudinal cell size, is easy to be compatible with the high-low voltage device process of a power integrated circuit and has low manufacturing cost.
Drawings
FIG. 1 is a schematic diagram of a cellular structure according to embodiment 1 of the present invention;
FIG. 2 is a schematic diagram of a cellular structure according to embodiment 2 of the present invention;
FIG. 3 is a schematic diagram of a cell structure according to embodiment 3 of the present invention;
fig. 4 is a schematic diagram of a cell structure according to embodiment 4 of the present invention.
Detailed Description
The technical scheme of the invention is described in detail in the following with reference to the accompanying drawings and embodiments:
example 1
As shown in fig. 1, the structure of this example includes a P substrate 1, a buried oxide layer 2, and a top semiconductor layer stacked in this order from bottom to top; along the transverse direction of the device, the top semiconductor layer is sequentially provided with a cathode structure, a P well region 4, an N drift region 3 and an anode structure from one side of the device to the other side of the device; the cathode structure comprises a P + body contact region 6 and an N + cathode region 5, the bottom of the P + body contact region 6 is in contact with the buried oxide layer 2, the N + cathode region 5 is positioned on the upper layer of the P well region 4, the N + cathode region 5 is in contact with the P + body contact region 6 and the P well region 4, and the P + body contact region 6 is in contact with the P well region 4; the common leading-out end of the P + body contact region 6 and the N + cathode region 5 is a cathode; the P well region 4 is in contact with the N drift region 3; a grid structure is arranged on the upper surface of the P well region 4 between the N + cathode region 5 and the N drift region 3; the grid structure comprises a grid dielectric 7 and grid polysilicon 8 covering the grid dielectric 7, and the leading-out end of the grid polysilicon 8 is a grid electrode; the anode structure comprises P + anode regions 9 and N + anode regions 10 which are alternately arranged along the longitudinal direction of the device, the P + anode regions 9 and the N + anode regions 10 are in contact with the N drift region 3 and the buried oxide layer 2, and the common leading-out end of the P + anode regions 9 and the N + anode regions 10 is an anode; the N-type island region 11 and the P-type island region 12 are positioned on one sides, close to the cathode structure, of the P + anode region 9 and the N + anode region 10, the N-type island region 11 and the P-type island region 12 are arranged alternately along the longitudinal direction of the device, and the bottoms of the N-type island region 11 and the P-type island region 12 are in contact with the buried oxide layer 2; the P-type islands 12 are equal in width in the device longitudinal direction in this example.
The working principle of the embodiment is as follows:
the device shown in the embodiment has no high-concentration field stop layer, and the N-type island region and the P-type island region which are alternately distributed are introduced into the anode region, so that the NP alternating structure not only plays a role of field stop, but also redistributes an electron current path, increases the anode distributed resistance, enables the device to enter a bipolar mode under a small current, and effectively inhibits the voltage folding phenomenon.
Example 2
As shown in fig. 2, this example is different from the structure of embodiment 1 in that the P-type islands 12 in this example have unequal widths in the device longitudinal direction, and the snapback effect can be eliminated at a smaller longitudinal cell size.
Example 3
As shown in fig. 3, this example is different from the structure of embodiment 1 in that the N-type island region 11 and the P-type island region 12 are in contact with the P + anode region 9 and the N + anode region 10.
Example 4
As shown in fig. 4, this example is different from the structure of embodiment 2 in that the N-type island region 11 and the P-type island region 12 are in contact with the P + anode region 9 and the N + anode region 10 and the P-type island region 12 is not equal in width in the device longitudinal direction. Compared with embodiment 3, the present embodiment can eliminate the snapback effect at a smaller longitudinal cell size.

Claims (4)

1. A short-circuit anode SOILIGBT with an alternating NP (non-P) withstand voltage buffer layer structure comprises a P substrate (1), a buried oxide layer (2) and a top semiconductor layer which are sequentially stacked from bottom to top; the top semiconductor layer is provided with an N drift region (3), one side of the N drift region (3) is provided with a P well region (4), and the other side of the N drift region (3) is of an anode structure; the N + cathode region (5) and the P + body contact region (6) are positioned on the upper surface of the P well region (4), the N + cathode region (5) is positioned on one side close to the anode structure, the N + cathode region (5) and the P + body contact region (6) are in mutual contact, and the common leading-out end is a cathode; the upper surface of a P well region (4) between the N + cathode region (5) and the N drift region (3) is of a grid structure; the grid structure comprises a grid dielectric layer (7) and grid polysilicon (8) covered on the grid dielectric layer (7), and the leading-out end of the grid polysilicon (8) is a grid electrode; the anode structure comprises P + anode regions (9) and N + anode regions (10) which are alternately arranged along the longitudinal direction of the device, the P + anode regions (9) and the N + anode regions (10) are positioned on the upper layer of the oxygen buried layer (2), and the common leading-out end of the P + anode region (9) and the N + anode region (10) is an anode;
the anode structure is characterized by further comprising an N-type island region (11) and a P-type island region (12), wherein the N-type island region (11) and the P-type island region (12) are located on one side, close to the cathode structure, of the P + anode region (9) and the N + anode region (10), the N-type island region (11) and the P-type island region (12) are alternately arranged along the longitudinal direction of the device, and the bottoms of the N-type island region (11) and the P-type island region (12) are in contact with the buried oxide layer (2); the N-type island region (11) and the P-type island region (12) are laterally in contact with the P + anode region (9) or the N + anode region (10).
2. The shorted anode soiigbt with alternating NP voltage buffer structure according to claim 1, characterized in that between the N-type (11) and P-type (12) islands and the P + anode (9) and N + anode (10) regions is an N-drift region (3).
3. A shorted anode soiigbt with alternating NP voltage buffer structure according to claim 1 wherein the P-type islands (12) in the anode structure are all equal in width in the device longitudinal direction.
4. The shorted anode soi igbt with alternating NP voltage buffer structure as claimed in claim 1 wherein the P-type islands (12) in the anode structure are of unequal width in the longitudinal direction of the device and have a larger longitudinal pitch closer to the N + anode region (10).
CN201710439235.4A 2017-06-07 2017-06-07 Short-circuit anode SOI LIGBT Active CN107170802B (en)

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CN110444590B (en) * 2019-09-05 2021-01-22 电子科技大学 Super junction LIGBT power device
CN111326576B (en) * 2020-02-14 2023-03-14 重庆邮电大学 SA-LIGBT device with longitudinal separation anode

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5355003A (en) * 1992-08-05 1994-10-11 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having stable breakdown voltage in wiring area

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CN104425579B (en) * 2013-08-28 2017-09-29 无锡华润上华半导体有限公司 Silicon-on-insulator reverse-conducting lateral insulated gate bipolar transistor and preparation method thereof
CN105552109B (en) * 2015-12-15 2018-04-13 电子科技大学 A kind of short circuit anode landscape insulation bar double-pole-type transistor
CN106206679B (en) * 2016-08-31 2019-08-23 电子科技大学 A kind of inverse conductivity type IGBT

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5355003A (en) * 1992-08-05 1994-10-11 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having stable breakdown voltage in wiring area

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