CN107154381B - Display substrate, manufacturing method thereof and display device - Google Patents

Display substrate, manufacturing method thereof and display device Download PDF

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Publication number
CN107154381B
CN107154381B CN201710331274.2A CN201710331274A CN107154381B CN 107154381 B CN107154381 B CN 107154381B CN 201710331274 A CN201710331274 A CN 201710331274A CN 107154381 B CN107154381 B CN 107154381B
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sub
shielding layer
substrate
shielding
layer
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CN107154381A (en
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王玲
盖翠丽
张保侠
李全虎
林奕呈
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BOE Technology Group Co Ltd
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BOE Technology Group Co Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/126Shielding, e.g. light-blocking means over the TFTs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays

Abstract

The invention discloses a display substrate, a manufacturing method thereof and a display device, and belongs to the technical field of display. The display substrate includes: the device comprises a substrate, a shielding layer arranged on the substrate, and a top gate thin film transistor arranged on one side of the shielding layer far away from the substrate; the shielding layer comprises a plurality of sub shielding layers which are arranged in an overlapping mode, and any two adjacent sub shielding layers are made of different non-metal materials, so that the sub shielding layers can effectively absorb and shield ambient light. In addition, each sub shielding layer is made of a non-metal material, so that parasitic capacitance of the thin film transistor cannot be generated, the shielding layer can be larger in area, and the shading effect of the shielding layer can be further improved on the premise that the parasitic capacitance of the transistor is not increased.

Description

Display substrate, manufacturing method thereof and display device
Technical Field
The invention relates to the technical field of display, in particular to a display substrate, a manufacturing method of the display substrate and a display device.
Background
With the development of display technology, Organic Light Emitting Diodes (OLEDs) are increasingly used in high performance display fields due to their characteristics of self-luminescence, fast response, wide viewing angle, etc. as a current type Light Emitting device.
In the related art, a display substrate of an OLED generally includes a Thin Film Transistor (TFT) formed on a substrate, an anode, a light emitting layer, and a cathode, and the TFT in the OLED display substrate generally adopts a top gate structure. However, in the TFT with the top gate structure, the gate electrode is formed on the side of the active layer away from the substrate, and in order to avoid the influence of ambient light on the performance of the TFT, a layer of metal material needs to be deposited on the side of the active layer close to the substrate as a shielding layer.
However, since the shielding layer formed of a metal material increases the parasitic capacitance of the TFT, the area of the shielding layer is generally small, and the light shielding effect is also poor.
Disclosure of Invention
The invention provides a display substrate, a manufacturing method thereof and a display device, aiming at solving the problem that a shading effect of a shading layer in the related art is poor. The technical scheme is as follows:
in a first aspect, a display substrate is provided, which includes:
the device comprises a substrate, a shielding layer arranged on the substrate, and a top gate thin film transistor arranged on one side of the shielding layer far away from the substrate;
the shielding layer comprises a plurality of sub shielding layers which are arranged in an overlapped mode, any two adjacent sub shielding layers are made of different non-metal materials, and the orthographic projection of each sub shielding layer on the substrate is not overlapped with the opening area of any pixel unit in the display substrate.
Optionally, the display substrate further includes: the electroluminescent unit is arranged on one side, far away from the substrate, of the top gate thin film transistor;
the orthographic projection of each sub-shielding layer on the substrate coincides with the orthographic projection of the pixel defining layer in the electroluminescent unit on the substrate.
Optionally, one surface of each sub-shielding layer, which is away from the substrate base plate and is in contact with other sub-shielding layers, is provided with a gully.
Optionally, the plurality of sub-shielding layers include at least one first sub-shielding layer and at least one second sub-shielding layer;
each of the first sub shielding layers is formed of an insulating material, and each of the second sub shielding layers is formed of a semiconductor material.
Optionally, the thickness of each second sub-shielding layer is greater than the thickness of each first sub-shielding layer, and the shielding layer in contact with the top-gate thin film transistor is the second sub-shielding layer.
In a second aspect, there is provided a method of manufacturing a display substrate, the method comprising:
providing a substrate base plate;
forming a plurality of sub-shielding layers on the substrate by adopting a non-metal material, wherein the plurality of sub-shielding layers are formed into shielding layers, any two adjacent sub-shielding layers are formed by adopting different non-metal materials, and the orthographic projection of each sub-shielding layer on the substrate is not overlapped with the opening area of any pixel unit in the display substrate;
and forming a top gate thin film transistor on the substrate with the shielding layer.
Optionally, the method further includes:
forming an electroluminescent unit on the substrate on which the top-gate thin film transistor is formed;
each sub-shielding layer and the pixel defining layer in the electroluminescent unit are formed by the same mask plate.
Optionally, a surface of each sub-shielding layer, which is away from the substrate base plate and is in contact with other sub-shielding layers, is formed with ravines.
Optionally, the forming a plurality of sub-shielding layers on the substrate by using a non-metal material includes:
forming at least one first sub-shielding layer by using an insulating material;
and forming at least one second sub-shielding layer by using a semiconductor material, wherein the second sub-shielding layer and the first sub-shielding layer are alternately formed.
In a third aspect, there is provided a display device, the device comprising:
a display substrate as claimed in the first aspect.
The technical scheme provided by the invention has the beneficial effects that:
the invention provides a display substrate, a manufacturing method thereof and a display device. In addition, each sub shielding layer is made of a non-metal material, so that parasitic capacitance of the thin film transistor cannot be generated, the shielding layer can be larger in area, and the shading effect of the shielding layer can be further improved on the premise that the parasitic capacitance of the transistor is not increased.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a display substrate according to an embodiment of the present invention;
FIG. 2 is a schematic structural diagram of another display substrate according to an embodiment of the present invention;
FIG. 3 is a top view of a display substrate and its components according to an embodiment of the present invention;
FIG. 4 is a schematic view of a barrier layer according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of an energy band structure near the interface of a sub-shielding layer and an active layer according to an embodiment of the present invention;
fig. 6 is a flowchart of a method for manufacturing a display substrate according to an embodiment of the invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of a display substrate according to an embodiment of the present invention, and referring to fig. 1, the display substrate may include:
the thin film transistor comprises a substrate base plate 10, a shielding layer 20 arranged on the substrate base plate, and a top gate thin film transistor 30 arranged on one side, far away from the substrate base plate 10, of the shielding layer 20.
The shielding layer 20 may include a plurality of sub-shielding layers arranged in an overlapping manner, any two adjacent sub-shielding layers are formed of different non-metallic materials, and an orthographic projection of each sub-shielding layer on the substrate does not overlap with an opening region of any pixel unit in the display substrate. The opening area refers to an effective display area of the pixel unit, and the orthographic projection of each sub-shielding layer on the substrate is not overlapped with the opening area, so that the influence on the aperture ratio of the pixel unit can be avoided.
For example, the shielding layer 20 shown in fig. 1 includes four sub-shielding layers arranged in an overlapping manner: sub-shielding layers 21 to 24. In which the sub-shielding layers 21 and 23 are formed using one non-metallic material (e.g., silicon dioxide) and the sub-shielding layers 22 and 24 are formed using another non-metallic material (e.g., amorphous silicon).
In summary, in the display substrate provided in the embodiments of the present invention, the shielding layer includes a plurality of sub-shielding layers that are overlapped, and adjacent sub-shielding layers are formed of different non-metallic materials, and because different metallic materials have different refractive indexes for ambient light, each sub-shielding layer can effectively absorb and shield the ambient light. In addition, each sub shielding layer is made of a non-metal material, so that parasitic capacitance of the thin film transistor cannot be generated, the shielding layer can be larger in area, and the shading effect of the shielding layer can be further improved on the premise that the parasitic capacitance of the transistor is not increased.
It should be noted that, in the embodiment of the present invention, a non-metallic material used for at least one of the sub-shielding layers should have a property of blocking light or absorbing light. For example, it may be formed using a non-transparent non-metallic material.
Fig. 2 is a schematic structural diagram of another display substrate provided in an embodiment of the present invention, and referring to fig. 2, the display substrate may further include: an electroluminescent unit 40 disposed on a side of the top-gate thin film transistor 30 away from the substrate 10; the orthographic projection of each of the sub-shielding layers on the substrate coincides with the orthographic projection of a Pixel Defining Layer (PDL) in the electroluminescent cell 40 on the substrate. That is, when the shielding layer is formed, each sub-shielding layer in the shielding layer can be formed by using a mask for forming the pixel defining layer, so that the additional increase of the mask in the manufacturing process can be avoided, and the manufacturing cost of the display substrate is reduced.
Fig. 3 is a top view of a display substrate and its components according to an embodiment of the present invention, and as can be seen from fig. 3, in the display substrate 00, the shape of the shielding layer 20 is identical to that of the pixel defining layer 401, that is, the shielding layer 20 almost completely covers the non-opening area of each pixel unit. The covering area of the shielding layer 20 is large, so that the shielding layer can effectively shield ambient light and prevent the performance of the top gate thin film transistor from being influenced by illumination.
In addition, as can also be seen from fig. 3, the top-gate thin film transistor may specifically include an active layer 301, a gate electrode 302, and source and drain electrodes 303. The electroluminescent unit may specifically comprise an anode layer 402, a pixel defining layer 401, a light emitting layer (not shown in fig. 3) and a cathode layer (not shown in fig. 3). Referring to fig. 3, the shielding layer 20 has a much larger coverage area than the active layer 301, so that the ambient light incident on the active layer 301 can be effectively shielded.
Fig. 4 is a schematic view of a shielding layer according to an embodiment of the present invention, and referring to fig. 4, a surface of each sub-shielding layer away from the substrate base plate 10 and in contact with other sub-shielding layers may have many ravines. For example, as shown in fig. 4, the shielding layer 20 includes four sub-shielding layers 21 to 24, wherein a plurality of ravines 210 are formed on the surfaces of the sub-shielding layer 21, the sub-shielding layer 22 and the sub-shielding layer 23 away from the substrate 10, and since the surface of the sub-shielding layer 24 away from the substrate 10 is in contact with the active layer 301 of the top gate tft, the surface of the sub-shielding layer 24 away from the substrate 10 may not need to be formed with ravines.
The trenches 210 in each sub-shielding layer can be formed by a rough treatment technique such as dry etching or plasma etching. The corrugations make the interface between adjacent sub-shielding layers rough, which can effectively reflect incident ambient light.
Optionally, the plurality of sub-shielding layers may include at least one first sub-shielding layer and at least one second sub-shielding layer; wherein each first sub shielding layer is formed of an insulating material, and each second sub shielding layer is formed of a semiconductor material.
For example, as shown in fig. 4, among the four sub-shielding layers 21 to 24, two first sub-shielding layers may be included: sub-shielding layers 21 and 23, and two second sub-shielding layers: sub-shielding layers 22 and 24. The first sub-shielding layers 21 and 23 may be formed of silicon dioxide, and the second sub-shielding layers 22 and 24 may be formed of amorphous silicon.
It should be noted that, in the embodiment of the present invention, the first sub-shielding layer and the second sub-shielding layer may also be formed by two different types of semiconductor materials, or may also be formed by two different types of insulating materials, which is not specifically limited in the embodiment of the present invention.
Further, the thickness of each second sub-shielding layer is greater than that of each first sub-shielding layer, and the shielding layer 20 in contact with the top-gate thin film transistor is the second sub-shielding layer. Since the second sub-shielding layer is made of a semiconductor material, and the effect of absorbing ambient light by the second sub-shielding layer made of the semiconductor material is better, the thickness of the second sub-shielding layer can be set to be thicker, and the topmost layer (i.e., the side away from the substrate base plate 10) of the shielding layer 20 can be set as the second sub-shielding layer, so as to ensure that light which may enter the active layer 301 is effectively absorbed.
Illustratively, as can be seen from fig. 4, the sub-shielding layers 22 and 24 formed of amorphous silicon are thick, while the sub-shielding layers 21 and 22 formed of silicon dioxide are thin, and in contact with the active layer 301 is the second sub-shielding layer 24. After the ambient light enters from the side of the substrate 10 far away from the shielding layer 20, part of the light can be reflected by the rough interface of the sub-shielding layers 21 and 22, the light which is not reflected enters the sub-shielding layer 22 and is further absorbed, the rest of the light can be further reflected by the rough interface of the sub-shielding layers 22 and 23, and after multiple reflections and absorption, the light which enters the active layer 301 can be significantly reduced, so that the influence of the ambient light on the performance of the top gate thin film transistor can be effectively reduced.
FIG. 5 is an illustration of an energy band structure near the interface of a sub-shield layer and an active layer according to an embodiment of the present inventionIt is intended that the active layer in the top-gate thin film transistor is assumed to be formed of Indium Gallium Zinc Oxide (IGZO), and the sub-blocking layer in contact with the active layer is formed of amorphous silicon (a-Si). The band structures of the sub-shielding layer formed of a-Si and the active layer formed of IGZO are shown in FIG. 5, respectively, where EFAt the fermi level, Ec is the conduction band bottom energy, Ev is the valence band top energy. The electron barrier q ψ shown in FIG. 5 can be formed at the interface of the sub-shielding layer and the active layer due to the difference in the forbidden band width and the Fermi levelbiThe electron barrier makes it difficult for an electron channel to be formed at the back interface (i.e., the side of the active layer close to the substrate) of the top-gate thin film transistor, so that the performance of the top-gate thin film transistor is not affected by the buffer layer (generally disposed between the blocking layer and the active layer) or the process at the back interface.
In summary, in the display substrate provided in the embodiments of the present invention, the shielding layer includes a plurality of sub-shielding layers that are overlapped, and adjacent sub-shielding layers are formed of different non-metallic materials, so that each sub-shielding layer can effectively absorb and shield ambient light. In addition, each sub shielding layer is made of a non-metal material, so that parasitic capacitance of the thin film transistor cannot be generated, the shielding layer can be larger in area, and the shading effect of the shielding layer can be further improved on the premise that the parasitic capacitance of the transistor is not increased. In addition, the shielding layer formed by the non-metallic material is adopted, so that an electronic channel is difficult to form on one surface of the active layer close to the substrate, the probability of negative threshold voltage of the top gate thin film transistor is effectively reduced, and the performance of the top gate thin film transistor is ensured.
Fig. 6 is a flowchart of a method for manufacturing a display substrate according to an embodiment of the present invention, and referring to fig. 6, the method may include:
step 101, providing a substrate.
102, forming a plurality of sub-shielding layers on the substrate by using a non-metal material, wherein the plurality of sub-shielding layers are formed as shielding layers, any two adjacent sub-shielding layers are formed by using different non-metal materials, and an orthographic projection of each sub-shielding layer on the substrate does not overlap with an opening region of any pixel unit in the display substrate.
And 103, forming a top gate thin film transistor on the substrate with the shielding layer.
In summary, embodiments of the present invention provide a method for manufacturing a display substrate, in which a shielding layer includes a plurality of sub-shielding layers that are overlapped, and adjacent sub-shielding layers are formed of different non-metallic materials, so that each sub-shielding layer can effectively absorb and shield ambient light. In addition, each sub shielding layer is made of a non-metal material, so that parasitic capacitance of the thin film transistor cannot be generated, the shielding layer can be larger in area, and the shading effect of the shielding layer can be further improved on the premise that the parasitic capacitance of the transistor is not increased.
Further, referring to fig. 6, after the step 103, the method may further include:
and 104, forming an electroluminescent unit on the substrate with the top-gate thin film transistor.
Each sub-shielding layer and the pixel defining layer in the electroluminescent unit can be formed by the same mask plate, so that additional new mask plates can be avoided in the manufacturing process, and the manufacturing cost is effectively reduced.
Optionally, in step 102, after each sub-shielding layer is formed and before a next sub-shielding layer is formed, a surface of the sub-shielding layer may be roughened, for example, as shown in fig. 4, a plurality of trenches 210 may be formed by dry etching or plasma etching, so as to improve roughness of an interface between two adjacent sub-shielding layers, and further improve an effect of reflecting ambient light by the interface.
Optionally, in the step 102, the process of forming a plurality of sub-shielding layers on the substrate by using a non-metal material may specifically include:
forming at least one first sub-shielding layer by using an insulating material; and forming at least one second sub-shielding layer by using a semiconductor material, wherein the second sub-shielding layer and the first sub-shielding layer are alternately formed. That is, an insulating material and a semiconductor material may be alternately deposited on the base substrate 10, thereby forming at least one first sub-shielding layer and at least one second sub-shielding layer.
In summary, embodiments of the present invention provide a method for manufacturing a display substrate, in which a shielding layer includes a plurality of sub-shielding layers that are overlapped, and adjacent sub-shielding layers are formed of different non-metallic materials, so that each sub-shielding layer can effectively absorb and shield ambient light. In addition, each sub shielding layer is made of a non-metal material, so that parasitic capacitance of the thin film transistor cannot be generated, the shielding layer can be larger in area, and the shading effect of the shielding layer can be further improved on the premise that the parasitic capacitance of the transistor is not increased. In addition, the shielding layer formed by the non-metallic material is adopted, so that an electronic channel is difficult to form on one surface of the active layer close to the substrate, the probability of negative threshold voltage of the top gate thin film transistor is effectively reduced, and the performance of the top gate thin film transistor is ensured.
An embodiment of the present invention provides a display device, which may include a display substrate as shown in any one of fig. 1 to 3, and the display substrate may include a shielding layer as shown in fig. 4. The display device provided by the embodiment of the invention can be as follows: the display device comprises any product or component with a display function, such as a liquid crystal panel, electronic paper, an OLED panel, an AMOLED panel, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.

Claims (9)

1. A display substrate, comprising:
the device comprises a substrate, a shielding layer arranged on the substrate, and a top gate thin film transistor arranged on one side of the shielding layer far away from the substrate;
the shielding layer comprises a plurality of sub shielding layers which are arranged in an overlapped mode, any two adjacent sub shielding layers are made of different non-metal materials, and the orthographic projection of each sub shielding layer on the substrate is not overlapped with the opening area of any pixel unit in the display substrate;
the display substrate further includes: the electroluminescent unit is arranged on one side, far away from the substrate, of the top gate thin film transistor;
the orthographic projection of each sub-shielding layer on the substrate coincides with the orthographic projection of a pixel defining layer in the electroluminescent unit on the substrate, and the shape of the shielding layer is the same as that of the pixel defining layer.
2. The display substrate of claim 1,
and gullies are arranged on one surface of each sub-shielding layer, which is far away from the substrate base plate and is in contact with other sub-shielding layers.
3. The display substrate according to claim 1 or 2,
the plurality of sub-shielding layers comprise at least one first sub-shielding layer and at least one second sub-shielding layer;
each of the first sub shielding layers is formed of an insulating material, and each of the second sub shielding layers is formed of a semiconductor material.
4. The display substrate of claim 3,
the thickness of each second sub-shielding layer is larger than that of each first sub-shielding layer, and the shielding layer in contact with the top gate thin film transistor is the second sub-shielding layer.
5. The display substrate of claim 1, wherein the top-gate thin film transistor comprises: the device comprises an active layer, a grid electrode and a source drain electrode, wherein the coverage area of the shielding layer is larger than that of the active layer.
6. A method of manufacturing a display substrate, the method comprising:
providing a substrate base plate;
forming a plurality of sub-shielding layers on the substrate by adopting a non-metal material, wherein the plurality of sub-shielding layers are formed into shielding layers, any two adjacent sub-shielding layers are formed by adopting different non-metal materials, and the orthographic projection of each sub-shielding layer on the substrate is not overlapped with the opening area of any pixel unit in the display substrate;
forming a top gate thin film transistor on the substrate with the shielding layer;
the method further comprises the following steps:
forming an electroluminescent unit on the substrate on which the top-gate thin film transistor is formed;
each sub-shielding layer and the pixel defining layer in the electroluminescent unit are formed by adopting the same mask plate, and the shape of the formed shielding layer is the same as that of the formed pixel defining layer.
7. The method of claim 6,
and gullies are formed on one surface of each sub-shielding layer, which is far away from the substrate base plate and is in contact with other sub-shielding layers.
8. The method according to claim 6 or 7, wherein the forming a plurality of sub-shielding layers on the substrate base plate by using the non-metal material comprises:
forming at least one first sub-shielding layer by using an insulating material;
forming at least one second sub-shielding layer by using a semiconductor material;
wherein the second sub-shielding layers are alternately formed with the first sub-shielding layers.
9. A display device, characterized in that the device comprises:
a display substrate according to any one of claims 1 to 5.
CN201710331274.2A 2017-05-11 2017-05-11 Display substrate, manufacturing method thereof and display device Active CN107154381B (en)

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Families Citing this family (3)

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Publication number Priority date Publication date Assignee Title
CN108878501B (en) * 2018-07-16 2021-04-06 成都京东方光电科技有限公司 Display substrate, manufacturing method thereof and display device
CN109860269A (en) * 2019-03-15 2019-06-07 云谷(固安)科技有限公司 Display panel and display device
CN113031174B (en) * 2021-04-08 2023-03-28 索尔思光电(成都)有限公司 TO-CAN module, transmitting assembly and optical module

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1638575A (en) * 2003-12-15 2005-07-13 Lg.菲利浦Lcd株式会社 Dual panel-type organic electroluminescent device and method for fabricating the same
CN103681693A (en) * 2013-12-05 2014-03-26 京东方科技集团股份有限公司 Array substrate, manufacturing method of array substrate and display device
CN103744556A (en) * 2014-01-13 2014-04-23 深圳莱宝高科技股份有限公司 Touch display panel and manufacturing method thereof
CN104658437A (en) * 2015-03-17 2015-05-27 京东方科技集团股份有限公司 Display panel and display device
CN105118808A (en) * 2015-08-10 2015-12-02 深圳市华星光电技术有限公司 Array baseplate and manufacturing method thereof
CN105336683A (en) * 2015-09-30 2016-02-17 武汉华星光电技术有限公司 LTPS array substrate and manufacturing method thereof and display device

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102057288B1 (en) * 2013-02-21 2019-12-19 삼성디스플레이 주식회사 Organic Light Emitting Display and Driving Method Thereof
KR20170039809A (en) * 2015-10-01 2017-04-12 삼성디스플레이 주식회사 Window substrate and display apparatus including the same

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1638575A (en) * 2003-12-15 2005-07-13 Lg.菲利浦Lcd株式会社 Dual panel-type organic electroluminescent device and method for fabricating the same
CN103681693A (en) * 2013-12-05 2014-03-26 京东方科技集团股份有限公司 Array substrate, manufacturing method of array substrate and display device
CN103744556A (en) * 2014-01-13 2014-04-23 深圳莱宝高科技股份有限公司 Touch display panel and manufacturing method thereof
CN104658437A (en) * 2015-03-17 2015-05-27 京东方科技集团股份有限公司 Display panel and display device
CN105118808A (en) * 2015-08-10 2015-12-02 深圳市华星光电技术有限公司 Array baseplate and manufacturing method thereof
CN105336683A (en) * 2015-09-30 2016-02-17 武汉华星光电技术有限公司 LTPS array substrate and manufacturing method thereof and display device

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