CN213845280U - Array substrate and display device - Google Patents
Array substrate and display device Download PDFInfo
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- CN213845280U CN213845280U CN202023069145.7U CN202023069145U CN213845280U CN 213845280 U CN213845280 U CN 213845280U CN 202023069145 U CN202023069145 U CN 202023069145U CN 213845280 U CN213845280 U CN 213845280U
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Abstract
The utility model discloses an array substrate and a display device, wherein the array substrate comprises a thin film transistor, a filter layer and a light reflection layer; the thin film transistor comprises a grid electrode, an active layer, a source electrode and a drain electrode, wherein the active layer is respectively connected with the source electrode and the drain electrode, a grid electrode insulating layer is arranged between the active layer and the grid electrode, a filter layer is arranged on one side, far away from the grid electrode, of the active layer, the projection of the active layer is located in the projection of the filter layer, the direction of the projection is perpendicular to the active layer, the filter layer is used for filtering light entering the active layer, the light reflection layer is arranged on the filter layer, the light reflection layer is located on one side, far away from the active layer, of the filter layer, the light reflection layer comprises a plurality of protrusions, and the light reflection layer is used for reflecting the light to the direction, far away from the active layer. According to the technical scheme, the light from different directions is reflected to the direction of the display screen, and the invasion of the light to the active layer is avoided.
Description
Technical Field
The utility model relates to a show technical field, especially relate to an array substrate and display device.
Background
The display device of the Organic Light Emitting Diode (OLED) has the characteristics of low power consumption, wide viewing angle, fast response speed, ultra-Light weight, thinness, good shock resistance and the like, can realize a plurality of advantages such as flexible display and large-area full-color display, and is considered as the display device with the most development potential by the industry. With the market demand and the improvement of visual and sensory effects of people, the display device of the transparent OLED is used as a display technology capable of displaying the background behind a picture, and the interactive demand between virtual display and a real environment is met.
The transparent OLED display device is based on a Thin Film Transistor (TFT), which is mostly made of metal oxide, for example, an active layer is mostly made of Indium Gallium Zinc Oxide (IGZO). Since various substrates in the transparent OLED display device use high transmittance materials, the active layer of IGZO is very sensitive to light. When the non-exposed active layer is irradiated by light with different wavelengths, the thin film transistor can be degraded to different degrees, such as: after the exposed active layer is irradiated by red light, the threshold voltage Vth offset of the thin film transistor is minimum; after the exposed active layer is irradiated by green light or blue light, the offset of the threshold voltage Vth of the thin film transistor is large; and under the same light intensity, the photon energy of blue light is stronger, and the degradation degree of the thin film transistor is the most serious. This affects the electron mobility of the thin film transistor, resulting in a problem that the luminance of the display device is not uniform when emitting light, and the screen is distorted.
SUMMERY OF THE UTILITY MODEL
Therefore, it is desirable to provide an array substrate and a display device, which solve the problem that the performance of the thin film transistor is unstable due to the influence of light on the thin film transistor.
In order to achieve the above object, the present application provides an array substrate including a thin film transistor, a filter layer, and a light reflection layer;
the thin film transistor comprises a grid electrode, an active layer, a source electrode and a drain electrode, wherein the active layer is respectively connected with the source electrode and the drain electrode, a grid electrode insulating layer is arranged between the active layer and the grid electrode, a filter layer is arranged on one side, far away from the grid electrode, of the active layer, the projection of the active layer is located in the projection of the filter layer, the direction of the projection is perpendicular to the active layer, the filter layer is used for filtering light entering the active layer, the light reflection layer is arranged on the filter layer, the light reflection layer is located on one side, far away from the active layer, of the filter layer, the light reflection layer comprises a plurality of protrusions, and the light reflection layer is used for reflecting the light to the direction, far away from the active layer.
Further, the buffer layer is also included;
the grid electrode is arranged on the substrate;
the grid electrode insulating layer is arranged on the grid electrode;
the active layer is disposed on the gate insulating layer;
the drain electrode is arranged on the active layer, the drain electrode is connected with one side of the active layer, the source electrode is arranged on the active layer, and the source electrode is connected with the other side of the active layer;
the buffer layer covers the active layer, the drain electrode and the source electrode, and the top of the buffer layer is used for arranging the filter layer.
Further, the etching device also comprises an etching barrier layer;
the source electrode and the drain electrode are respectively arranged on the active layer through the etching barrier layer, the etching barrier layer is provided with a first hole and a second hole, the drain electrode is connected with one side of the active layer through the first hole, and the source electrode is connected with the other side of the active layer through the second hole.
Further, the device also comprises a flat layer and an electrode layer;
the flat layer is arranged on the light reflecting layer and the thin film transistor;
the electrode layer is arranged on the flat layer and is connected with the source electrode or the drain electrode through the hole in the flat layer.
Further, the shape of the protrusion is a cone; or: the shape of the bulge is a cone, and the top of the cone is arc-shaped.
Furthermore, the included angle between the side wall of the protrusion and the active layer is a, and a is more than or equal to 15 degrees and less than or equal to 90 degrees.
Further, the whole surface of the light reflecting layer is arranged on the filter layer.
Further, the active layer is an active layer of an oxide semiconductor, and the substrate is a flexible substrate.
The present application further provides a display device including the array substrate according to any one of the above embodiments.
Different from the prior art, the light that will penetrate into the active layer is reflected through the light reflection layer to above-mentioned technical scheme, and then the filter layer further filters the light that is not reflected by the light reflection layer, for example filters blue light or green glow. Meanwhile, the filter layer can also filter certain light intensity. According to the technical scheme, the light from different directions is reflected to the direction of the display screen, the damage of the light to the active layer is avoided, the stability of the thin film transistor is ensured, the performance of the thin film transistor is improved, the area of the transparent area is increased, the light emitting brightness of the display device is increased, and the high-transparency display effect of the high-brightness display device is realized.
Drawings
FIG. 1 is a schematic cross-sectional view illustrating a gate and a gate insulating layer formed on a substrate according to the present embodiment;
FIG. 2 is a schematic cross-sectional view illustrating the fabrication of an active layer and an etch stop layer on a substrate according to the present embodiment;
FIG. 3 is a schematic cross-sectional view illustrating the fabrication of a source, a drain and a buffer layer on a substrate according to the present embodiment;
FIG. 4 is a schematic cross-sectional view illustrating the fabrication of a filter layer, a light reflective layer, a planarization layer and an electrode layer on a substrate according to the present embodiment;
fig. 5 is a schematic cross-sectional view of the filter layer and the light reflective layer of the present embodiment showing the cross-sectional structure of the reflected light.
Description of reference numerals:
1. a substrate;
2. a thin film transistor;
21. a gate electrode; 22. a gate insulating layer; 23. an active layer; 24. etching the barrier layer; 25. a drain electrode; 26. a source electrode;
3. a buffer layer;
4. a filter layer;
5. a light reflecting layer;
6. a planarization layer;
7. and an electrode layer.
Detailed Description
To explain technical contents, structural features, and objects and effects of the technical solutions in detail, the following detailed description is given with reference to the accompanying drawings in conjunction with the embodiments.
Referring to fig. 4 and 5, the present application provides an array substrate including a thin film transistor 2, a filter layer 4 and a light reflecting layer 5. The thin film transistor 2 comprises a gate electrode 21, an active layer 23, a source electrode 26 and a drain electrode 25, and the thin film transistor 2 is used as a switch to drive a pixel point, so that the characteristics of high speed, high brightness and high contrast can be achieved. The active layer is connected to the source electrode 26 and the drain electrode 25, respectively, and a gate insulating layer 22 is disposed between the active layer and the gate electrode 21. Note that the thin film transistor 2 may be a top gate structure or a bottom gate structure. The filter layer 4 is disposed on a side of the active layer 23 away from the gate electrode 21, a projection of the active layer 23 is located within a projection of the filter layer 4, the projection is perpendicular to the active layer 23, and the filter layer 4 is used for filtering light entering the active layer 23. The light reflecting layer 5 is disposed on the filter layer 4, the light reflecting layer 5 is located on a side of the filter layer 4 away from the active layer 23, the light reflecting layer 5 includes a plurality of protrusions, and the light reflecting layer 5 is used for reflecting light rays to a direction away from the active layer 23.
According to the technical scheme, the light which is to be emitted into the active layer is reflected through the light reflecting layer, and then the light which is not reflected by the light reflecting layer is further filtered by the filter layer, for example, blue light or green light is filtered. Meanwhile, the filter layer can also filter certain light intensity. According to the technical scheme, the light from different directions is reflected to the direction of the display screen, the damage of the light to the active layer is avoided, the stability of the thin film transistor is ensured, the performance of the thin film transistor is improved, the area of the transparent area is increased, the light emitting brightness of the display device is increased, and the high-transparency display effect of the high-brightness display device is realized.
In the present embodiment, the thickness of the filter layer is 0.1um (micrometer) to 0.3um (micrometer). Preferably, the filter layer has a thickness of 0.2um (micrometer). The filter layer may be fully opaque such that all light cannot pass through the filter layer to the active layer. The filter layer material is not limited to PET optical films, mixed organic films of carbonates and blue light absorbers. The material of the filter layer may also be a conductive light-shielding material or a non-conductive light-shielding material, and the non-conductive light-shielding material may be black resin, a light-shielding tape, or the like, and may also be selected according to the actual situation. The conductive light-shielding material may be an opaque metal material, such as copper, aluminum, etc.
In the present embodiment, the light reflecting layer 5 is formed by arranging a plurality of protrusions, and the structure is as shown in fig. 4 and 5. The distance between the centers of two adjacent bulges is 5 um-200 um, and the height of one bulge is 0.2 um-0.5 um. The plurality of protrusions of the light reflection layer 5 may be arranged in a continuous regular manner, or the intervals between two adjacent protrusions may be different. The light reflecting layer is made of nano SiNx and nano SiO2Nano Al2O3And the like, but not limited thereto. Preferably, the entire surface of the light reflecting layer is disposed on the filter layer, so that the filter layer is located in the reflection region of the light reflecting layer.
In the embodiment, the included angle between the side wall of the protrusion and the active layer is a, and a is more than or equal to 15 degrees and less than or equal to 90 degrees. The shape of the protrusion is a cone (such as a cone, a pyramid and the like), a cylinder (such as a triangular prism, a quadrangular prism, a pentagonal prism and the like) and the like. When the top of the projection is a sharp structure, the sharp structure is contacted with the upper film layer to easily form a puncture defect. It is preferable that the top of the protrusions is not a sharp structure, for example, when the protrusions are in the shape of a cone, and the top of the cone is an arc or a hemisphere, so that the light reflective layer and the film layer are stable, and the light reflective layer is more easily deposited on the microstructure layer.
In this embodiment, the thin film transistor has a bottom gate structure, and the structure is shown in fig. 4. The gate electrode 21 is disposed on the substrate 1. The substrate 1 may be a glass substrate, and the substrate 1 is used for supporting each film layer. The gate insulating layer 22 is disposed on the gate, and the gate insulating layer 22 serves to electrically connect the isolation gate and other metal film layers. The active layer 23 is disposed on the gate insulating layer 22. The drain electrode 25 and the source electrode 26 are disposed on the same layer, the drain electrode 25 is disposed on the active layer 23, the drain electrode 25 is connected to one side of the active layer 23, the source electrode 26 is disposed on the active layer 23, and the source electrode 26 is connected to the other side of the active layer 23. The source electrode 26 forms a schottky ohmic contact with the active layer 23, and the drain electrode forms a schottky ohmic contact with the active layer 23.
In the present embodiment, the material of the gate electrode may be, but is not limited to, a combination of Al/Mo, a combination of Cu/MoTi, and the like. If the material of the grid is the combination of Al/Mo, the film thickness of Al (aluminum) in the Al/Mo structure is 0.3um (micrometer) to 0.4um (micrometer). Preferably, the thickness of the Al (aluminum) film in the Al/Mo structure is 0.33 um. The thickness of the Mo (molybdenum) film layer in the Al/Mo structure is 0.02 (micrometer) to 0.08 (micrometer). Preferably, the thickness of the Mo (molybdenum) film layer in the Al/Mo structure is 0.06 um. If the material of the pole is a combination of Cu/MoTi, the film thickness of Cu (copper) in the Cu/MoTi structure is 0.4um (micrometer) to 0.6um (micrometer). Preferably, the film thickness of Cu (copper) in the Cu/MoTi structure is 0.42 um. The thickness of the film layer of MoTi in the Cu/MoTi structure is 0.2um (micrometer) to 0.4um (micrometer). Preferably, the thickness of the MoTi film layer in the Cu/MoTi structure is 0.3 um. It is noted that the source electrode 26 may be made of the same material as the gate electrode, and the drain electrode may be made of the same material as the gate electrode.
In this embodiment, the gate insulating layer is an insulating material such as, but not limited to, a nitride (silicon nitride or the like), an oxide (silicon oxide or the like), or the like. The thickness of the gate insulating layer is 0.2um (micrometers) to 0.4um (micrometers). Preferably, the thickness of the gate insulating layer is 0.3 um.
In the present embodiment, the thickness of the active layer is 0.03um (micrometers) to 0.06um (micrometers). Preferably, the thickness of the active layer is 0.04 um. The active layer is an active layer of an oxide semiconductor, that is, the material of the active layer is an oxide semiconductor, such as Indium Gallium Zinc Oxide (IGZO), Indium Zinc Tin Oxide (IZTO), Indium Gallium Zinc Titanium Oxide (IGZTO), and the like, but is not limited thereto.
When the material of the active layer is an oxide semiconductor, the substrate 1 is a flexible substrate, so that the array substrate can be applied to a flexible display device. The flexible display device such as an OLED display device has the characteristics of lightness, thinness, high brightness, low power consumption, quick response, high definition, good flexibility, high luminous efficiency and the like, and can meet the new requirements of consumers on display technology.
In the bottom gate structure, the active layer between the drain electrode and the source electrode is exposed, the active layer is very sensitive to light, and when the exposed active layer is irradiated by light with different wavelengths, the thin film transistor can be degraded to different degrees, for example: after the exposed active layer is irradiated by red light, the threshold voltage Vth offset of the thin film transistor is minimum; after the exposed active layer is irradiated by green light or blue light, the offset of the threshold voltage Vth of the thin film transistor is large; and under the same light intensity, the photon energy of blue light is stronger, and the degradation degree of the thin film transistor is the most serious. This affects the electron mobility of the thin film transistor, resulting in a problem that the luminance of the display device is not uniform when emitting light, and the screen is distorted.
In the bottom gate structure, an etching barrier layer 24 is further included, so that the thin film transistor is of an ESL etching barrier type, and the structure is as shown in fig. 4. The source electrode 26 and the drain electrode 25 are respectively disposed on the active layer through the etch stopper layer 24, the etch stopper layer 24 is provided with a first hole through which the drain electrode 25 is connected to one side of the active layer and a second hole through which the source electrode 26 is connected to the other side of the active layer. The etch stop layer is an insulating material such as, but not limited to, nitride (silicon nitride, etc.), oxide (silicon oxide, etc.), etc. The etch stop layer has a thickness in the range of 0.15um (micrometers) to 0.3um (micrometers). Preferably, the etch stop layer has a thickness of 0.2um (micrometers). In some embodiments, etch stop layer 24 may not be provided.
In the bottom gate structure, the exposed active layer is located on the upper portion of the thin film transistor, and the structure is as shown in fig. 4, so the filter layer 4 and the light reflection layer 5 are disposed above the thin film transistor, firstly, the light reflection layer 5 reflects the light to be emitted into the active layer, that is, when the incident light meets the contact surface of the protrusion of the light reflection layer 5 and the flat layer 6, the incident light will be totally reflected and form a reflected light, and the reflected light is reflected back to the direction far away from the substrate, the structure is as shown in fig. 5, and the arrow on fig. 5 represents the light. The filter layer 4 then further filters the light that is not reflected off the light reflecting layer 5, for example blue or green light. At the same time, the filter layer 4 may also filter a certain light intensity. The stability of the thin film transistor is guaranteed, the area of the transparent area is increased, the light emitting brightness of the OLED display device is increased, and the high-transparency display effect of the high-brightness OLED display device is achieved.
In some embodiments, the thin film transistor is a top gate structure, which is not shown in the figures. The active layer is disposed on the substrate, and a gate insulating layer is disposed on the active layer and provided with a gate electrode, a drain electrode and a source electrode. The drain and source electrodes are connected to the active layer through holes in the gate insulating layer, respectively. Since the active layer is located at a lower portion of the thin film transistor even at the bottom of the thin film transistor, the bottom of the active layer is exposed. The filter layer and the light reflecting layer may be disposed between the tft and the substrate, and the light reflecting layer reflects light incident from the substrate. Specifically, the light reflecting layer is firstly arranged on the substrate, and the bulge of the light reflecting layer faces the substrate. The top of the light reflecting layer is provided with a filter layer, and the top of the filter layer is provided with an active layer of the thin film transistor.
In this embodiment, in order to avoid the occurrence of electrical connection between the filter layer and the thin film transistor, a buffer layer 3 is further included, and the structure is as shown in fig. 4. The buffer layer 3 not only plays a role of isolation but also plays a role of buffering. The buffer layer 3 covers the active layer, the drain electrode and the source electrode, and the top of the buffer layer 3 is used for arranging the filter layer. The buffer layer is an insulating material such as, but not limited to, nitride (silicon nitride, etc.), oxide (silicon oxide, etc.), etc. The thickness of the buffer layer is 0.15um (micron) -0.3 um (micron). Preferably, the thickness of the buffer layer is 0.2 um.
In this embodiment, in order to fill up the uneven substrate, a planarization layer 6 is further included, and the structure is shown in fig. 4. The flat layer 6 is disposed on the light reflecting layer 5 and the thin film transistor 2, and the flat layer 6 covers a lower film layer. The planarization layer is an insulating material such as nitride (silicon nitride, etc.), oxide (silicon oxide, etc.), etc., and may be a single layer of nitride or oxide, or may be a stacked structure of nitride and oxide. Wherein the thickness of the nitride or oxide of one layer is 0.15um (micrometer) to 0.3um (micrometer). Preferably, the nitride or oxide of a layer has a thickness of 0.2 um.
In this embodiment, in order to connect the thin film transistor and the external device, an electrode layer 7 is further included, and the structure is shown in fig. 4. These external elements may be anodes, etc. The electrode layer 7 is arranged on the flat layer 6, and the electrode layer 7 is connected with a source electrode or a drain electrode through a hole on the flat layer 6. The electrode layer may be a metal oxide such as Indium Tin Oxide (ITO), and the thickness of the electrode layer is 0.06um (micrometers) to 0.08um (micrometers). Preferably, the thickness of the electrode layer is 0.075 um.
The present embodiment provides a display device, including the array substrate according to any one of the above embodiments. The display device can be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital camera or a navigator.
Referring to fig. 1 to 5, the present embodiment provides a method for manufacturing an array substrate, the manufacturing method is performed on a substrate 1, the substrate 1 may be a glass substrate, and the substrate 1 is used for supporting each film layer. If the substrate 1 is a flexible substrate, the display device may be an OLED display device. Taking a thin film transistor with a bottom gate structure as an example, the method for manufacturing the array substrate comprises the following steps: a gate electrode 21 is formed on the substrate 1, and the structure is shown in fig. 1. Specifically, a photoresist is coated on the substrate, and then the photoresist is exposed and developed to open the portion where the gate electrode 21 is to be formed, and then a gate metal is plated on the substrate, thereby forming the gate electrode 21 on the substrate. It is noted that the gate metal may be deposited by means of physical vapor deposition. After the gate 21 is formed, the photoresist is removed.
In the present embodiment, the material of the gate electrode may be, but is not limited to, a combination of Al/Mo, a combination of Cu/MoTi, and the like. If the material of the grid is the combination of Al/Mo, the film thickness of Al (aluminum) in the Al/Mo structure is 0.3um (micrometer) to 0.4um (micrometer). Preferably, the thickness of the Al (aluminum) film in the Al/Mo structure is 0.33 um. The thickness of the Mo (molybdenum) film layer in the Al/Mo structure is 0.02 (micrometer) to 0.08 (micrometer). Preferably, the thickness of the Mo (molybdenum) film layer in the Al/Mo structure is 0.06 um. If the material of the pole is a combination of Cu/MoTi, the film thickness of Cu (copper) in the Cu/MoTi structure is 0.4um (micrometer) to 0.6um (micrometer). Preferably, the film thickness of Cu (copper) in the Cu/MoTi structure is 0.42 um. The thickness of the film layer of MoTi in the Cu/MoTi structure is 0.2um (micrometer) to 0.4um (micrometer). Preferably, the thickness of the MoTi film layer in the Cu/MoTi structure is 0.3 um.
After the gate electrode 21 is formed, a gate insulating layer 22 is formed on the gate electrode 21 to isolate the gate electrode 21 from the active layer 23, and the structure is shown in fig. 1. Specifically, the gate electrode may be coated with an insulating material by plasma enhanced chemical vapor deposition and then etched to form the appropriate gate insulating layer 22. To achieve effective isolation, a gate insulating layer 22 covers the gate. Among them, the insulating material is, but not limited to, nitride (silicon nitride, etc.), oxide (silicon oxide, etc.), and the like. The thickness of the gate insulating layer is 0.2um (micrometers) to 0.4um (micrometers). Preferably, the thickness of the gate insulating layer is 0.3 um.
After the gate insulating layer 22 is formed, an active layer 23 is formed on the gate insulating layer 22, and the structure is shown in fig. 2. The thickness of the active layer is 0.03um (micrometer) to 0.06um (micrometer). Preferably, the thickness of the active layer is 0.04 um. The active layer is an active layer of an oxide semiconductor, that is, the material of the active layer is an oxide semiconductor, such as Indium Gallium Zinc Oxide (IGZO), Indium Zinc Tin Oxide (IZTO), Indium Gallium Zinc Titanium Oxide (IGZTO), and the like, but is not limited thereto.
After the active layer is manufactured, in order to prevent the active layer 23 from being damaged in the manufacturing process, an etching stop layer 24 is manufactured on the active layer 23, so that the thin film transistor is also of an ESL etching stop type, and the structure is shown in fig. 2. Specifically, the gate electrode may be coated with an insulating material by plasma enhanced chemical vapor deposition and then etched to provide a suitable etch stop layer 24. In order to provide effective protection, the etch stop layer 24 covers the active layer and may also cover the gate insulating layer. Among them, the insulating material is, but not limited to, nitride (silicon nitride, etc.), oxide (silicon oxide, etc.), and the like. The etch stop layer has a thickness in the range of 0.15um (micrometers) to 0.3um (micrometers). Preferably, the etch stop layer has a thickness of 0.2um (micrometers). In some embodiments, etch stop layer 24 may not be provided.
When the etch stopper layer is formed, a first hole for serving as a connection point of the drain electrode and the active layer and a second hole for serving as a connection point of the source electrode and the active layer may be formed in the etch stopper layer. Specifically, the step of coating the photoresist may be to open the portions of the etching barrier layer where the first hole and the second hole are to be formed by patterning, and then etch the etching barrier layer at the openings by using the photoresist as a mask to form the first hole and the second hole. The bottom of the first hole is an active layer, and the bottom of the second hole is an active layer. And after the first hole and the second hole are formed, removing the photoresist.
After the etching stop layer 24 is formed, the drain electrode 25 and the source electrode 26 are formed, and the structure is shown in fig. 3. Specifically, a photoresist is coated on a substrate, portions where the drain electrode 25 and the source electrode are to be formed are opened by patterning, and then a source-drain metal is plated on the substrate, so that the drain electrode 25 and the source electrode are formed on the substrate. The drain electrode 25 and the source electrode are disposed in the same layer, the drain electrode 25 is disposed on the active layer, the drain electrode 25 is connected to one side of the active layer through a first hole, the source electrode is disposed on the active layer, and the source electrode is connected to the other side of the active layer through a second hole. Note that the source electrode may be made of the same material as the gate electrode, and the drain electrode 25 may be made of the same material as the gate electrode. A schottky ohmic contact is formed between the source electrode and the active layer, and a schottky ohmic contact is formed between the drain electrode 25 and the active layer.
After the drain electrode 25 and the source electrode 26 are manufactured, in order to avoid electrical connection between the filter layer 4 and the thin film transistor 2, a buffer layer 3 is manufactured on the thin film transistor 2, and the structure is shown in fig. 3. Specifically, the source electrode, the drain electrode and the active layer can be coated with an insulating material by plasma enhanced chemical vapor deposition, and then a suitable etching barrier layer can be obtained by etching. The insulating material is, but not limited to, nitride (silicon nitride, etc.), oxide (silicon oxide, etc.), or the like. The buffer layer 3 not only plays a role of isolation but also plays a role of buffering. The buffer layer 3 covers the active layer, the drain electrode and the source electrode, and the filter layer 4 is disposed on the top of the buffer layer 3. The thickness of the buffer layer is 0.15um (micron) -0.3 um (micron). Preferably, the thickness of the buffer layer is 0.2 um.
After the buffer layer 3 is manufactured, the filter layer 4 is manufactured on the buffer layer 3, and the filter layer 4 is used for filtering light entering the active layer, and the structure is as shown in fig. 4. The projection of the active layer is located within the projection of the filter layer 4, the direction of the projection is perpendicular to the active layer, i.e. the lateral width of the filter layer 4 is greater than the lateral width of the active layer. The filter layer has a thickness of 0.1um (micrometer) to 0.3um (micrometer). Preferably, the filter layer has a thickness of 0.2um (micrometer). The filter layer may be a mixed organic film that filters only blue or green light that is much harmful to the active layer, and the filter material is not limited to PET optical films, carbonates, and blue light absorbers. The filter layer may also be fully light-blocking, so that all light cannot pass through the filter layer to the active layer, the material of the filter layer may be a conductive light-blocking material or a non-conductive light-blocking material, and the non-conductive light-blocking material may be black resin, a light-blocking tape, or the like, and may also be selected according to actual conditions. The conductive light-shielding material may be an opaque metal material, such as copper, aluminum, etc.
After the filter layer 4 is manufactured, a light reflecting layer 5 is manufactured on the filter layer, and the light reflecting layer 5 is used for reflecting light rays to a direction far away from the active layer, and the structure is shown in fig. 4. The light reflecting layer 5 is arranged on the filter layer. The light reflecting layer 5 is located on one side of the filter layer away from the active layer, and the light reflecting layer 5 comprises a plurality of protrusions. The light reflecting layer 5 is formed by arranging a plurality of bulges, the distance between the centers of two adjacent bulges is 5 um-200 um, and the height of one bulge is 0.2 um-0.5 um. The plurality of protrusions of the light reflection layer 5 may be arranged in a continuous regular manner, or the intervals between two adjacent protrusions may be different. The light reflecting layer is made of nano SiNx and nano SiO2Nano Al2O3And the like, but not limited thereto. Preferably, the entire surface of the light reflecting layer is disposed on the filter layer, so that the filter layer is located in the reflection region of the light reflecting layer.
The included angle between the side wall of the protrusion and the active layer is a, and a is more than or equal to 15 degrees and less than or equal to 90 degrees. The shape of the protrusion is a cone (such as a cone, a pyramid and the like), a cylinder (such as a triangular prism, a quadrangular prism, a pentagonal prism and the like) and the like. When the top of the projection is a sharp structure, the sharp structure is contacted with the upper film layer to easily form a puncture defect. It is preferable that the top of the protrusions is not a sharp structure, for example, when the protrusions are in the shape of a cone, and the top of the cone is an arc or a hemisphere, so that the light reflective layer and the film layer are stable, and the light reflective layer is more easily deposited on the microstructure layer.
After the light reflection layer is formed, a planarization layer 6 is formed on the thin film transistor 2 and the light reflection layer 5 to fill up the uneven substrate, and the structure is shown in fig. 4. Specifically, the insulating material may be deposited on the substrate by plasma enhanced chemical vapor deposition, followed by etching to obtain the appropriate planarizing layer 6. The flat layer 6 is disposed on the light reflection layer and the thin film transistor, and the flat layer 6 covers a lower film layer. The planarization layer is an insulating material such as nitride (silicon nitride, etc.), oxide (silicon oxide, etc.), etc., and may be a single layer of nitride or oxide, or may be a stacked structure of nitride and oxide. Wherein the thickness of the nitride or oxide of one layer is 0.15um (micrometer) to 0.3um (micrometer). Preferably, the nitride or oxide of a layer has a thickness of 0.2 um.
After the formation of the planarization layer 6, an electrode layer 7 is formed on the planarization layer 6, and the electrode layer 7 serves to connect the thin film transistor and an external device, and has a structure shown in fig. 4. These external elements may be anodes, etc. The electrode layer 7 may be formed by PVD sputtering. The electrode layer 7 is arranged on the flat layer 6, and the electrode layer 7 is connected with a source electrode or a drain electrode through a hole on the flat layer 6. The electrode layer may be a metal oxide such as Indium Tin Oxide (ITO), and the thickness of the electrode layer is 0.06um (micrometers) to 0.08um (micrometers). Preferably, the thickness of the electrode layer is 0.075 um.
The manufacturing method takes a thin film transistor with a bottom gate structure as an example, an active layer between a drain electrode and a source electrode is exposed, the active layer is very sensitive to light, the exposed active layer is irradiated by light with different wavelengths, and the thin film transistor can be degraded to different degrees, such as: after the exposed active layer is irradiated by red light, the threshold voltage Vth offset of the thin film transistor is minimum; after the exposed active layer is irradiated by green light or blue light, the offset of the threshold voltage Vth of the thin film transistor is large; and under the same light intensity, the photon energy of blue light is stronger, and the degradation degree of the thin film transistor is the most serious. This affects the electron mobility of the thin film transistor, resulting in a problem that the luminance of the display device is not uniform when emitting light, and the screen is distorted.
In the above technical solution, the light reflecting layer reflects the light to be emitted into the active layer, and the structure is shown in fig. 5. The filter layer then further filters light that is not reflected off the light reflecting layer, for example, to filter out blue or green light. Meanwhile, the filter layer can also filter certain light intensity. According to the technical scheme, the light from different directions is reflected to the direction of the display screen, the damage of the light to the active layer is avoided, the stability of the thin film transistor is ensured, the performance of the thin film transistor is improved, the area of the transparent area is increased, the light emitting brightness of the display device is increased, and the high-transparency display effect of the high-brightness display device is realized.
In some embodiments, the manufacturing method may be performed on a thin film transistor with a top gate structure, which is not shown in the drawings. In the top gate structure, an active layer is disposed on a substrate, and then a gate insulating layer is disposed on the active layer, and a gate, a drain, and a source are disposed on the gate insulating layer. The drain and source electrodes are connected to the active layer through holes in the gate insulating layer, respectively. Since the active layer is located at a lower portion of the thin film transistor even at the bottom of the thin film transistor, the bottom of the active layer is exposed. The filter layer and the light reflecting layer may be disposed between the tft and the substrate, and the light reflecting layer reflects light incident from the substrate. Specifically, a support layer is first formed on a substrate, and then the support layer is etched to match the shape of the upper portion of the support layer with the shape of the protrusion of the light reflection layer. And secondly, manufacturing a light reflecting layer on the supporting layer, wherein the bulge of the light reflecting layer faces the substrate. A filter layer is then fabricated on top of the light reflecting layer. And finally, manufacturing film layers such as an active layer of the thin film transistor on the top of the filter layer.
This embodiment provides a manufacturing method of a display device, where the manufacturing method includes the manufacturing method of an array substrate according to any embodiment of the present application, for example, by continuously manufacturing film layers such as an anode, a pixel defining layer, an OLED light emitting layer, and a cathode on the array substrate, an OLED display device can be formed. The display device can be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital camera or a navigator.
It should be noted that, although the above embodiments have been described herein, the scope of the present invention is not limited thereby. Therefore, based on the innovative concept of the present invention, the changes and modifications of the embodiments described herein, or the equivalent structure or equivalent process changes made by the contents of the specification and the drawings of the present invention, directly or indirectly apply the above technical solutions to other related technical fields, all included in the protection scope of the present invention.
Claims (9)
1. The array substrate is characterized by comprising a thin film transistor, a filter layer and a light reflecting layer;
the thin film transistor comprises a grid electrode, an active layer, a source electrode and a drain electrode, wherein the active layer is respectively connected with the source electrode and the drain electrode, a grid electrode insulating layer is arranged between the active layer and the grid electrode, a filter layer is arranged on one side, far away from the grid electrode, of the active layer, the projection of the active layer is located in the projection of the filter layer, the direction of the projection is perpendicular to the active layer, the filter layer is used for filtering light entering the active layer, the light reflection layer is arranged on the filter layer, the light reflection layer is located on one side, far away from the active layer, of the filter layer, the light reflection layer comprises a plurality of protrusions, and the light reflection layer is used for reflecting the light to the direction, far away from the active layer.
2. The array substrate of claim 1, further comprising a buffer layer;
the grid electrode is arranged on the substrate;
the grid electrode insulating layer is arranged on the grid electrode;
the active layer is disposed on the gate insulating layer;
the drain electrode is arranged on the active layer, the drain electrode is connected with one side of the active layer, the source electrode is arranged on the active layer, and the source electrode is connected with the other side of the active layer;
the buffer layer covers the active layer, the drain electrode and the source electrode, and the top of the buffer layer is used for arranging the filter layer.
3. The array substrate of claim 2, further comprising an etch stop layer;
the source electrode and the drain electrode are respectively arranged on the active layer through the etching barrier layer, the etching barrier layer is provided with a first hole and a second hole, the drain electrode is connected with one side of the active layer through the first hole, and the source electrode is connected with the other side of the active layer through the second hole.
4. The array substrate of claim 1, 2 or 3, further comprising a planarization layer and an electrode layer;
the flat layer is arranged on the light reflecting layer and the thin film transistor;
the electrode layer is arranged on the flat layer and is connected with the source electrode or the drain electrode through the hole in the flat layer.
5. The array substrate of claim 1, wherein the shape of the protrusion is a cone; or: the shape of the bulge is a cone, and the top of the cone is arc-shaped.
6. The array substrate of claim 1 or 5, wherein the angle between the sidewall of the protrusion and the active layer is a, 15 ° ≦ a ≦ 90 °.
7. The array substrate as claimed in claim 1, wherein the light reflecting layer is disposed on the filter layer.
8. The array substrate of claim 1, wherein the active layer is an active layer of an oxide semiconductor, and the substrate is a flexible substrate.
9. A display device comprising an array substrate according to any one of claims 1 to 8.
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| CN202023069145.7U CN213845280U (en) | 2020-12-18 | 2020-12-18 | Array substrate and display device |
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|---|---|---|---|
| CN202023069145.7U CN213845280U (en) | 2020-12-18 | 2020-12-18 | Array substrate and display device |
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| CN213845280U true CN213845280U (en) | 2021-07-30 |
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