CN107154381A - Display base plate and its manufacture method, display device - Google Patents
Display base plate and its manufacture method, display device Download PDFInfo
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- CN107154381A CN107154381A CN201710331274.2A CN201710331274A CN107154381A CN 107154381 A CN107154381 A CN 107154381A CN 201710331274 A CN201710331274 A CN 201710331274A CN 107154381 A CN107154381 A CN 107154381A
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- barrier bed
- barrier
- underlay substrate
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/126—Shielding, e.g. light-blocking means over the TFTs
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
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- Microelectronics & Electronic Packaging (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
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- Electroluminescent Light Sources (AREA)
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Abstract
The invention discloses a kind of display base plate and its manufacture method, display device, belong to display technology field.The display base plate includes:Underlay substrate, is arranged on the barrier bed on the underlay substrate, and be arranged on top-gate thin-film transistors of the barrier bed away from the underlay substrate side;The barrier bed includes the overlapping many sub- barrier beds set, and the adjacent sub- barrier bed of any two is formed by different nonmetallic materials, therefore each sub- barrier bed can effectively absorb and block ambient light.In addition, because every sub- barrier bed is formed by nonmetallic materials, thin film transistor (TFT) will not be made to produce parasitic capacitance, thus the barrier bed area can set it is larger, the shaded effect of barrier bed can further be improved on the premise of transistor parasitic capacitance is not increased.
Description
Technical field
The present invention relates to display technology field, more particularly to a kind of display base plate and its manufacture method, display device.
Background technology
With the development of Display Technique, Organic Light Emitting Diode (English:Organic Light Emitting Diode;
Referred to as:OLED got over) as a kind of current mode luminescent device, the features such as because of its self-luminous, quick response, wide viewing angle
To be applied to more among high-performance display field.
In correlation technique, OLED display base plate generally comprises the thin film transistor (TFT) to be formed on underlay substrate (English:
Thin Film Transistor, referred to as:TFT the TFT in), anode, luminescent layer and negative electrode, the oled display substrate is typically adopted
Use top gate structure.But because in the TFT of top gate structure, grid is formed in side of the active layer away from underlay substrate, in order to avoid
The active layer is rung TFT performance, it is necessary to deposit one layer of gold close to the side of underlay substrate in the active layer by ambient lighting projection
Category material is used as barrier bed.
But, because the barrier bed of metal material formation can cause the increase of TFT parasitic capacitances, therefore the face of the barrier bed
Product is typically small, and shaded effect is also poor.
The content of the invention
In order to solve the problem of barrier bed shaded effect in correlation technique is poor, the invention provides a kind of display base plate
And its manufacture method, display device.The technical scheme is as follows:
First aspect includes there is provided a kind of display base plate, the display base plate:
Underlay substrate, is arranged on the barrier bed on the underlay substrate, and be arranged on the barrier bed away from the lining
The top-gate thin-film transistors of substrate side;
The barrier bed includes the overlapping many sub- barrier beds set, and the adjacent sub- barrier bed of any two is by different non-
Metal material is formed, and each orthographic projection of the sub- barrier bed on the underlay substrate and any picture in the display base plate
The open area of plain unit is not overlapping.
Optionally, the display base plate also includes:The top-gate thin-film transistors are arranged on away from the underlay substrate one
The electroluminescence cell of side;
Each orthographic projection of the sub- barrier bed on the underlay substrate and pixel definition in the electroluminescence cell
Orthographic projection of the layer on the underlay substrate is overlapped.
Optionally, the one side that each sub- barrier bed is contacted away from the underlay substrate and with other sub- barrier beds is set
There is gully.
Optionally, the multiple sub- barrier bed includes at least one first sub- barrier bed and at least one second son is blocked
Layer;
Each first sub- barrier bed is formed by insulating materials, and each second sub- barrier bed is by semi-conducting material shape
Into.
Optionally, the thickness of each second sub- barrier bed is more than the thickness of each first sub- barrier bed, and institute
State contacted in barrier bed with the top-gate thin-film transistors for the second sub- barrier bed.
Second aspect includes there is provided a kind of manufacture method of display base plate, methods described:
One underlay substrate is provided;
Many sub- barrier beds are formed on the underlay substrate using nonmetallic materials, the multiple sub- barrier bed is formed as
Barrier bed, wherein, the adjacent sub- barrier bed of any two is formed using different nonmetallic materials, and each sub- barrier bed
Orthographic projection on the underlay substrate is not overlapping with the open area of any pixel unit in the display base plate;
Top-gate thin-film transistors are formed being formed with the underlay substrate of the barrier bed.
Optionally, methods described also includes:
Electroluminescence cell is formed on the underlay substrate for being formed with the top-gate thin-film transistors;
Each sub- barrier bed is formed with the pixel defining layer in the electroluminescence cell using same mask plate.
Optionally, each sub- barrier bed is formed away from the underlay substrate and with the one side that other sub- barrier beds are contacted
There is gully.
Optionally, the use nonmetallic materials form many sub- barrier beds on the underlay substrate, including:
At least one first sub- barrier bed is formed using insulating materials;
At least one second sub- barrier bed is formed using semi-conducting material, wherein, the second sub- barrier bed and described the
One sub- barrier bed is alternatively formed.
The third aspect includes there is provided a kind of display device, described device:
Display base plate as described in relation to the first aspect.
The beneficial effect that the technical scheme that the present invention is provided is brought is:
The invention provides a kind of display base plate and its manufacture method, display device, the barrier bed bag in the display base plate
Many sub- barrier beds of overlapping setting are included, adjacent sub- barrier bed is formed by different nonmetallic materials, therefore each height is blocked
Layer can effectively absorb and block ambient light.Further, since every sub- barrier bed is formed by nonmetallic materials, it will not make
Thin film transistor (TFT) produce parasitic capacitance, therefore the barrier bed area can set it is larger, can be posted not increasing transistor
On the premise of raw electric capacity, further improve the shaded effect of barrier bed.
Brief description of the drawings
Technical scheme in order to illustrate the embodiments of the present invention more clearly, makes required in being described below to embodiment
Accompanying drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the present invention, for
For those of ordinary skill in the art, on the premise of not paying creative work, other can also be obtained according to these accompanying drawings
Accompanying drawing.
Fig. 1 is a kind of structural representation of display base plate provided in an embodiment of the present invention;
Fig. 2 is the structural representation of another display base plate provided in an embodiment of the present invention;
Fig. 3 is the top view of a kind of display base plate provided in an embodiment of the present invention and its each component;
Fig. 4 is a kind of schematic diagram of barrier bed provided in an embodiment of the present invention;
Fig. 5 is that seed barrier bed provided in an embodiment of the present invention is illustrated with the band structure near active layer interface
Figure;
Fig. 6 is a kind of manufacture method flow chart of display base plate provided in an embodiment of the present invention.
Embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with accompanying drawing to embodiment party of the present invention
Formula is described in further detail.
Fig. 1 is a kind of structural representation of display base plate provided in an embodiment of the present invention, and with reference to Fig. 1, the display base plate can
With including:
Underlay substrate 10, is arranged on the barrier bed 20 on the underlay substrate, and be arranged on the barrier bed 20 away from the lining
The top-gate thin-film transistors 30 of the side of substrate 10.
The barrier bed 20 can include the overlapping many sub- barrier beds set, and the adjacent sub- barrier bed of any two is by difference
Nonmetallic materials formed, and each orthographic projection of the sub- barrier bed on the underlay substrate and any pixel in the display base plate
The open area of unit is not overlapping.Wherein, the open area refers to the effective display area domain of pixel cell, and every sub- barrier bed exists
Orthographic projection on underlay substrate is not overlapping with the open area, can avoid impacting the size of pixel cell aperture opening ratio.
Example, the barrier bed 20 shown in Fig. 1 includes four overlapping sub- barrier beds set:Sub- barrier bed 21 to son is blocked
Layer 24.Its neutron barrier bed 21 and 23 is adopted using a kind of nonmetallic materials (such as silica) formation, sub- barrier bed 22 and 24
With another nonmetallic materials (such as non-crystalline silicon) formation.
In summary, in display base plate provided in an embodiment of the present invention, barrier bed includes the overlapping many height set and blocked
Layer, adjacent sub- barrier bed is formed by different nonmetallic materials, because different metal material is different to the refractive index of ambient light, because
This each sub- barrier bed can effectively absorb and block ambient light.Further, since every sub- barrier bed is by non-metallic material
What material was formed, thin film transistor (TFT) will not be made to produce parasitic capacitance, therefore larger, the Neng Gou that can set of area of the barrier bed
On the premise of not increasing transistor parasitic capacitance, further improve the shaded effect of barrier bed.
It should be noted that in embodiments of the present invention, in the plurality of sub- barrier bed, at least one sub- barrier bed is used
Nonmetallic materials should have the characteristic of shading or extinction.It is for instance possible to use opaque nonmetallic materials are formed.
Fig. 2 is the structural representation of another display base plate provided in an embodiment of the present invention, with reference to Fig. 2, the display base plate
It can also include:It is arranged on the top-gate thin-film crystal 30 and manages the electroluminescence cell 40 away from the side of underlay substrate 10;Each
The orthographic projection of the sub- barrier bed on the underlay substrate and pixel defining layer (Pixel defining in the electroluminescence cell 40
Layer, PDL) orthographic projection on the underlay substrate overlaps.It that is to say, when forming the barrier bed, can use is used to be formed
Every sub- barrier bed that the mask plate of pixel defining layer is formed in the barrier bed, it is possible thereby to avoid additionally increasing in manufacturing process
Mask plate, reduces the manufacturing cost of display base plate.
Fig. 3 is the top view of a kind of display base plate provided in an embodiment of the present invention and its each component, can from Fig. 3
Go out, in the display base plate 00, the shape of barrier bed 20 is identical with the shape of pixel defining layer 401, i.e., barrier bed 20 is almost
It completely covers the non-open areas of each pixel cell.Because the area coverage of the barrier bed 20 is larger, therefore can be effective
Block ambient light, it is to avoid the performance of top-gate thin-film transistors is influenceed by illumination.
In addition, it can also be seen that top-gate thin-film transistors can specifically include active layer 301, the and of grid 302 from Fig. 3
Source-drain electrode 303.The electroluminescence cell can specifically include anode layer 402, pixel defining layer 401, luminescent layer and (not show in Fig. 3
Go out) and cathode layer (not shown in Fig. 3).With reference to Fig. 3, the area coverage of the barrier bed 20 is much larger than active layer 301, therefore can be with
Effectively block the ambient light for being incident upon active layer 301.
Fig. 4 is a kind of schematic diagram of barrier bed provided in an embodiment of the present invention, with reference to Fig. 4, and every sub- barrier bed is away from lining
Substrate 10 and it can be provided with more gully with the one side that other sub- barrier beds are contacted.Example, as shown in figure 4, this is blocked
Layer 20 includes four sub- barrier beds 21 to 24 altogether, and its neutron barrier bed 21, sub- barrier bed 22 and sub- barrier bed 23 are away from substrate base
The one side of plate 10 is provided with more gully 210, because one side of the sub- barrier bed 24 away from underlay substrate 10 is brilliant with top-gate thin-film
Active layer 301 in body pipe is contacted, therefore the sub- one side of the barrier bed 24 away from underlay substrate 10 can need not set gully.
Wherein, the gully 210 on every sub- barrier bed can pass through the coarse processing skill such as dry etching or plasma etching
Art is formed.The gully make it that the interface of adjacent sub- barrier bed is more coarse, and the coarse interface can effectively reflect incidence
Ambient light.
Optionally, the plurality of sub- barrier bed can include at least one first sub- barrier bed and at least one second son is blocked
Layer;Wherein, each first sub- barrier bed is formed by insulating materials, and each second sub- barrier bed is formed by semi-conducting material.
Example, in four sub- barrier beds 21 to 24 as shown in Figure 4, two the first sub- barrier beds can be included:Son hides
Barrier 21 and 23, and two the second sub- barrier beds:Sub- barrier bed 22 and 24.The first sub- barrier bed 21 and 23 can be by two
Silica formation, the second sub- barrier bed 22 and 24 can be formed by non-crystalline silicon.
It should be noted that in embodiments of the present invention, the first sub- barrier bed and the second sub- barrier bed can also be by two
Plant different types of semi-conducting material to be formed, or can also be formed by two distinct types of insulating materials, the present invention is implemented
Example is not specifically limited to this.
Further, the thickness of each second sub- barrier bed is more than the thickness of each first sub- barrier bed, and the barrier bed
Contacted in 20 with the top-gate thin-film transistors for the second sub- barrier bed.Because the second sub- barrier bed is formed by semi-conducting material
, the effect of the second sub- barrier bed absorption ambient light of semi-conducting material formation preferably, therefore can block second son
It is thicker that the thickness of layer is set, it is possible to which the top (i.e. the side away from underlay substrate 10) of the barrier bed 20 is set into this
Second sub- barrier bed, the light of active layer 301 may be incident upon to ensure effectively to absorb.
Example, from fig. 4, it can be seen that the thickness of the sub- barrier bed 22 and 24 formed by non-crystalline silicon is thicker, and by dioxy
The thinner thickness of the sub- barrier bed 21 and 22 of SiClx formation, and contacted with the active layer 301 for the second sub- barrier bed 24.Environment
After light is injected from side of the underlay substrate 10 away from barrier bed 20, some light can be with the coarse boundary of quilt barrier bed 21 and 22
Face is reflected away, and non-reflected light line, which enters after sub- barrier bed 22, further to be absorbed, and remaining light can be in son afterwards
The coarse interface of barrier bed 22 and 23 is further reflected, and after multiple reflections and absorption, is incident to active layer 301
Light can be substantially reduced, so as to effectively influence of the reduction ambient light to top-gate thin-film transistors performance.
Fig. 5 is that seed barrier bed provided in an embodiment of the present invention is illustrated with the band structure near active layer interface
Figure, it is assumed that active layer in the top-gate thin-film transistors by indium gallium zinc oxide (indium gallium zinc oxide,
IGZO) formed, the sub- barrier bed contacted with the active layer is formed by non-crystalline silicon (a-Si).A-Si is respectively illustrated in Fig. 5 to be formed
Sub- barrier bed and IGZO formation active layer band structure, wherein, EFFor fermi level, Ec is conduction band bottom energy, and Ev is
Top of valence band energy.The interface of sub- barrier bed and active layer can be formed due to there is the difference of energy gap and fermi level
Electronic barrier q ψ as shown in Figure 5bi, the electronic barrier make it that (i.e. active layer is close to substrate for the back of the body interfaces of top-gate thin-film transistors
The one side of substrate) it is difficult to form electron channel, therefore cushion (being generally positioned between barrier bed and active layer) or back of the body circle
Technique at face does not interfere with the performance of top-gate thin-film transistors.
In summary, in display base plate provided in an embodiment of the present invention, barrier bed includes the overlapping many height set and blocked
Layer, adjacent sub- barrier bed is formed by different nonmetallic materials, therefore each sub- barrier bed can effectively absorb and block ring
Border light.Further, since every sub- barrier bed is formed by nonmetallic materials, thin film transistor (TFT) will not be made to produce parasitic electricity
Hold, thus the barrier bed area can set it is larger, can be on the premise of transistor parasitic capacitance not be increased, further
Improve the shaded effect of barrier bed.In addition, the barrier bed formed using nonmetallic materials so that active layer is close to underlay substrate
Simultaneously it is difficult to form electron channel, so as to effectively reduce top-gate thin-film transistors threshold voltage negative probability partially, it is ensured that top
The performance of gate thin-film transistors.
Fig. 6 is a kind of manufacture method flow chart of display base plate provided in an embodiment of the present invention, and with reference to Fig. 6, this method can
With including:
Step 101, one underlay substrate of offer.
Step 102, using nonmetallic materials many sub- barrier beds, the plurality of sub- barrier bed shape are formed on the underlay substrate
As barrier bed, wherein, the adjacent sub- barrier bed of any two is formed using different nonmetallic materials, and each son is blocked
Orthographic projection of the layer on the underlay substrate be not overlapping with the open area of any pixel unit in the display base plate.
Step 103, top-gate thin-film transistors are formed on the underlay substrate for be formed with the barrier bed.
In summary, the embodiments of the invention provide a kind of manufacture method of display base plate, showing that this method is manufactured is passed through
Show in substrate, barrier bed includes the overlapping many sub- barrier beds set, adjacent sub- barrier bed is formed by different nonmetallic materials,
Therefore each sub- barrier bed can effectively absorb and block ambient light.Further, since every sub- barrier bed is by nonmetallic
Material formation, will not make thin film transistor (TFT) produce parasitic capacitance, therefore the barrier bed area can set it is larger, can
On the premise of transistor parasitic capacitance is not increased, further improve the shaded effect of barrier bed.
Further, with reference to Fig. 6, after above-mentioned steps 103, this method can also include:
Step 104, on the underlay substrate for being formed with the top-gate thin-film transistors form electroluminescence cell.
Every sub- barrier bed can be formed with the pixel defining layer in the electroluminescence cell using same mask plate, from
And can avoid additionally increasing new mask plate in manufacturing process, effectively reduce manufacturing cost.
Optionally, in above-mentioned steps 102, often formed after a sub- barrier bed, formed next sub- barrier bed
Before, coarse processing can also be carried out to the surface of the sub- barrier bed, such as shown in Fig. 4, dry etching or plasma can be passed through
The methods such as etching form multiple gullies 210, so that the roughness at two neighboring sub- barrier bed interface is improved, and then raising should
The effect of interface reflection environment light.
Optionally, in above-mentioned steps 102, the mistake of many sub- barrier beds is formed on the underlay substrate using nonmetallic materials
Journey can specifically include:
At least one first sub- barrier bed is formed using insulating materials;At least one second son is formed using semi-conducting material
Barrier bed, the wherein second sub- barrier bed are alternatively formed with the first sub- barrier bed.It that is to say, can be submitted in underlay substrate 10
For deposition of insulative material and semi-conducting material, blocked so as to form at least one first sub- barrier bed and at least one second son
Layer.
In summary, the embodiments of the invention provide a kind of manufacture method of display base plate, showing that this method is manufactured is passed through
Show in substrate, barrier bed includes the overlapping many sub- barrier beds set, adjacent sub- barrier bed is formed by different nonmetallic materials,
Therefore each sub- barrier bed can effectively absorb and block ambient light.Further, since every sub- barrier bed is by nonmetallic
Material formation, will not make thin film transistor (TFT) produce parasitic capacitance, therefore the barrier bed area can set it is larger, can
On the premise of transistor parasitic capacitance is not increased, further improve the shaded effect of barrier bed.In addition, using nonmetallic materials
The barrier bed of formation so that active layer is difficult to form electron channel close to the one side of underlay substrate, so as to effectively reduce top-gated
Thin film transistor (TFT) threshold voltage negative probability partially, it is ensured that the performance of top-gate thin-film transistors.
The embodiments of the invention provide a kind of display device, the display device can wrap aobvious as shown in Fig. 1 to Fig. 3 is any
Show substrate, the barrier bed shown in Fig. 4 can be included in the display base plate.Display device provided in an embodiment of the present invention can be:
Liquid crystal panel, Electronic Paper, oled panel, AMOLED panel, mobile phone, tablet personal computer, television set, display, notebook computer, number
Any product or part with display function such as code-phase frame, navigator.
The foregoing is only presently preferred embodiments of the present invention, be not intended to limit the invention, it is all the present invention spirit and
Within principle, any modification, equivalent substitution and improvements made etc. should be included in the scope of the protection.
Claims (10)
1. a kind of display base plate, it is characterised in that the display base plate includes:
Underlay substrate, is arranged on the barrier bed on the underlay substrate, and be arranged on the barrier bed away from the substrate base
The top-gate thin-film transistors of plate side;
The barrier bed includes the overlapping many sub- barrier beds set, and the adjacent sub- barrier bed of any two is by different nonmetallic
Material is formed, and each orthographic projection of the sub- barrier bed on the underlay substrate and any pixel list in the display base plate
The open area of member is not overlapping.
2. display base plate according to claim 1, it is characterised in that the display base plate also includes:It is arranged on the top
Electroluminescence cell of the gate thin-film transistors away from the underlay substrate side;
Each orthographic projection of the sub- barrier bed on the underlay substrate exists with pixel defining layer in the electroluminescence cell
Orthographic projection on the underlay substrate is overlapped.
3. display base plate according to claim 1, it is characterised in that
Each sub- barrier bed away from the underlay substrate and is provided with gully with the one side that other sub- barrier beds are contacted.
4. according to any described display base plate of claims 1 to 3, it is characterised in that
The multiple sub- barrier bed includes at least one first sub- barrier bed and at least one second sub- barrier bed;
Each first sub- barrier bed is formed by insulating materials, and each second sub- barrier bed is formed by semi-conducting material.
5. display base plate according to claim 4, it is characterised in that
The thickness of each second sub- barrier bed is more than the thickness of each first sub- barrier bed, and in the barrier bed with
Top-gate thin-film transistors contact for the second sub- barrier bed.
6. a kind of manufacture method of display base plate, it is characterised in that methods described includes:
One underlay substrate is provided;
Many sub- barrier beds are formed on the underlay substrate using nonmetallic materials, the multiple sub- barrier bed is formed as blocking
Layer, wherein, the adjacent sub- barrier bed of any two is formed using different nonmetallic materials, and each sub- barrier bed is in institute
State the orthographic projection on underlay substrate not overlapping with the open area of any pixel unit in the display base plate;
Top-gate thin-film transistors are formed being formed with the underlay substrate of the barrier bed.
7. method according to claim 6, it is characterised in that methods described also includes:
Electroluminescence cell is formed on the underlay substrate for being formed with the top-gate thin-film transistors;
Each sub- barrier bed is formed with the pixel defining layer in the electroluminescence cell using same mask plate.
8. method according to claim 6, it is characterised in that
Each sub- barrier bed away from the underlay substrate and is formed with gully with the one side that other sub- barrier beds are contacted.
9. according to any described method of claim 6 to 8, it is characterised in that the use nonmetallic materials are in the substrate
Many sub- barrier beds are formed on substrate, including:
At least one first sub- barrier bed is formed using insulating materials;
At least one second sub- barrier bed is formed using semi-conducting material;
Wherein, the described second sub- barrier bed is alternatively formed with the described first sub- barrier bed.
10. a kind of display device, it is characterised in that described device includes:
Display base plate as described in claim 1 to 5 is any.
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CN109860269A (en) * | 2019-03-15 | 2019-06-07 | 云谷(固安)科技有限公司 | Display panel and display device |
CN113031174A (en) * | 2021-04-08 | 2021-06-25 | 索尔思光电(成都)有限公司 | TO-CAN module, transmitting assembly and optical module |
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CN105336683A (en) * | 2015-09-30 | 2016-02-17 | 武汉华星光电技术有限公司 | LTPS array substrate and manufacturing method thereof and display device |
US20170098796A1 (en) * | 2015-10-01 | 2017-04-06 | Samsung Display Co., Ltd. | Window substrate and display apparatus including same |
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CN108878501A (en) * | 2018-07-16 | 2018-11-23 | 成都京东方光电科技有限公司 | A kind of display base plate and preparation method thereof, display device |
US11088224B2 (en) | 2018-07-16 | 2021-08-10 | Chengdu Boe Optoelectronics Technology Co., Ltd. | Display substrate, method for manufacturing the same and display device |
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