TWI590426B - Manufacturing method of photosensing unit of photosensing array and structure thereof - Google Patents

Description

Manufacturing method and structure of light sensing unit of light sensing array

The present invention relates to a method of fabricating a sensing unit, and more particularly to a method of fabricating a light sensing unit of a light sensing array and a structure thereof.

The light sensing unit is a light sensing element commonly used in electronic devices such as mobile phones, tablet computers, notebook computers, or medical diagnostic aids. Conventionally, the manufacturing process of the photo sensing unit is to form a corresponding photo sensing unit after forming the oxide semiconductor layer. However, when the deposition step of the photo sensing unit is performed, the oxide semiconductor element is electrically unstable or electrically degraded due to the generation of hydrogen ions. Based on the electrical influence of hydrogen ions on the oxide semiconductor layer, the manufacturing process of the existing photo sensing unit may cause a problem of a decrease in yield and cause an increase in manufacturing cost. Further, the conventional oxide semiconductor device is also susceptible to moisture and causes electrical instability of the semiconductor device. Therefore, how to improve the manufacturing process of the photo sensing unit and the structure of the semiconductor element to avoid the influence of hydrogen ions and water vapor is an important subject that must be overcome at present.

The invention provides a method for manufacturing a light sensing unit of a light sensing array and a structure thereof, which can be used to solve the problem of electrical influence caused by hydrogen ions and moisture.

A method of fabricating a light sensing unit of a light sensing array of the present invention includes providing a substrate having at least one unit region thereon. An active element is formed in the cell area on the substrate. A first electrode layer is formed in the cell region on the substrate, and the first electrode layer is electrically connected to the active device. A protective layer is formed on the active component. A shielding layer is formed on the protective layer to shield the active components. After forming the shielding layer, a photo sensing layer is formed on the protective layer in the cell region, and a second electrode layer is formed on the photo sensing layer.

The invention further provides a light sensing unit of a light sensing array, comprising a substrate, an active component, a first electrode layer, a protective layer, a shielding layer, a light sensing layer and a second electrode layer. The substrate includes at least one unit region. The active component is located in the cell area of the substrate. The first electrode layer is located in the cell region and is electrically connected to the active device. The protective layer covers the active component and the first electrode layer. The shielding layer is located on the protective layer, wherein the shielding layer shields the active component and shields the entire unit area. The light sensing layer is located on the protective layer and is electrically connected to the first electrode layer. The second electrode layer is on the photo sensing layer.

Based on the above, the light sensing unit of the light sensing array formed by the manufacturing method of the present invention includes the structures of the first electrode layer, the shielding layer, and the barrier wall. Therefore, when the photo sensing layer is formed in a subsequent step, the structure can be used to block the diffusion behavior of hydrogen ions or moisture, thereby avoiding an electrical influence on the semiconductor element.

The above described features and advantages of the invention will be apparent from the following description.

1 is a schematic diagram of a light sensing array in accordance with an embodiment of the present invention. In this embodiment, the light sensing array includes a plurality of light sensing units. Each of the light sensing units is located in a region defined by the plurality of data lines DL and the plurality of gate lines GL (ie, the unit region R). Based on the conductivity considerations, the gate line GL and the data line DL are generally made of a metal material. However, the present invention is not limited thereto, and according to other embodiments, other conductive materials may be used for the gate line GL and the data line DL. For example: alloys, nitrides of metallic materials, oxides of metallic materials, oxynitrides of metallic materials, or other suitable materials, or stacked layers of metallic materials and other conductive materials. In addition, each of the light sensing units includes an active device TFT and a photo sensing layer PS, wherein the active device TFT is electrically connected to the data line DL, the gate line GL, and the photo sensing layer PS, respectively. Hereinafter, a manufacturing flow of the photo sensing unit of one of the unit regions R will be described, as shown in FIGS. 2A to 2F and FIGS. 3A to 3G.

2A to 2F are schematic top views of a manufacturing process of a light sensing unit according to an embodiment of the present invention. 3A to 3G are schematic cross-sectional views showing a manufacturing process of a photo sensing unit according to an embodiment of the present invention. 3A to 3F are schematic cross-sectional views corresponding to Figs. 2A to 2F, respectively. First, referring to FIG. 2A and FIG. 3A, the manufacturing method of the photo sensing unit of the photo sensing array of the present embodiment includes providing a substrate Sub having at least one unit region R (as indicated in FIG. 1). The material of the substrate Sub may be glass, quartz, organic polymer or metal or the like.

An active element is formed in the cell region R on the substrate Sub. The method of forming the active device includes forming a gate G and a gate line GL connected to the gate G on the substrate Sub, and forming an insulating layer GI on the gate G and the gate line GL. Next, a semiconductor layer AL is formed on the insulating layer GI. In particular, the semiconductor layer AL may be an oxide semiconductor material including, for example, Indium-Gallium-Zinc Oxide (IGZO), zinc oxide (ZnO) tin oxide (SnO), and indium-zinc oxide (Indium-Zinc Oxide, IZO), Gallium-Zinc Oxide (GZO), Zinc-Tin Oxide (ZTO) or Indium-Tin Oxide (ITO), etc., but are not limited thereto. The semiconductor layer AL may also be an amorphous germanium, a polysilicon or other semiconductor material.

As described above, referring to FIG. 2B and FIG. 3B, an etch stop layer ES is formed over the semiconductor layer AL and the insulating layer GI. The etch stop layer ES has an opening V1 and a first trench T1. In particular, the first trench T1 is a surface extending through the etch stop layer ES and the insulating layer GI to extend to the substrate Sub, and the first trench T1 surrounds the semiconductor layer AL and the gate G (as shown in FIG. 2B).

Next, referring to FIG. 2C and FIG. 3C, the source S and the drain D are formed on the etch stop layer ES, and at the same time, the first electrode layer M1 is formed in the cell region R on the substrate Sub. In the present embodiment, the first electrode layer M1 is formed simultaneously with the source S and the drain D, and belongs to the same film layer. Further, the source S and the drain D are in contact with the semiconductor layer AL through the opening V1. The first electrode layer M1 is electrically connected to the drain D. As indicated in FIG. 3C, the gate G, the source S, the drain D, and the semiconductor layer AL constitute an active device TFT. In the embodiment, the barrier wall BW0 is formed around the active device TFT, wherein the barrier wall BW0 includes the first barrier wall BW1. The first barrier layer BW1 is formed in the first trench T1 further including the insulating layer GI and the etch stop layer ES while forming the first electrode layer M1, the source S, and the drain D. The first barrier wall BW1 material may include a metal oxide conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), aluminum oxide indium, indium oxide (InO), gallium oxide (gallium oxide). , GaO) or other metal oxide conductive material, graphene, metal material such as molybdenum (Mo), titanium (Ti) or other metal materials, metal alloys such as molybdenum nitride (MoN), combinations of the above materials, or others having a low Conductive material with resistance. The first electrode layer M1 is a metal material including a metal such as aluminum, titanium/aluminum/titanium, molybdenum, molybdenum/aluminum/molybdenum, an alloy of the above metals, or other suitable metal or alloy in this embodiment. The first barrier wall BW1 and the first electrode layer M1 may be formed in the same step. The first barrier wall BW1 is filled in the first trench T1, and the first barrier wall BW1 surrounds the active device TFT. In this embodiment, the first barrier wall BW1 and the first electrode layer M1 may be formed in different steps, and the materials may be different, which is not intended to limit the present invention. Since the first barrier wall BW1 surrounds the active device TFT, in the subsequent process steps, hydrogen ions and water vapor diffusion can be avoided to affect the electrical properties of the active device TFT. In the present embodiment, the active device TFT is exemplified by a bottom gate type thin film transistor, but the present invention is not limited thereto. According to other embodiments, the active device TFT may be a top gate type thin film transistor.

Next, referring to FIG. 2D and FIG. 3D, a first protective layer PL1 is formed on the active device TFT, wherein the first electrode layer M1 is located below the first protective layer PL1. The first protective layer PL1 has a second trench T2 and an opening V2. The second trench T2 is a surface penetrating the protective layer PL1 and extending to the first electrode layer M1, and the second trench T2 surrounds the active device TFT (as shown in FIG. 2D).

Referring to FIG. 2E and FIG. 3E, a shielding layer SD is formed on the protective layer PL1 to shield the active device TFT. The shielding layer SD shields the active device TFTs in the entire cell region R, and the shielding layer SD is composed of an opaque metal. The metal material includes a metal such as aluminum, titanium/aluminum/titanium, molybdenum, molybdenum/aluminum/molybdenum, an alloy of the above metals, or other suitable metal or alloy in this embodiment. In addition, while forming the shielding layer SD, the barrier wall BW0 is further formed in the second trench T2 of the protective layer PL1, wherein the barrier wall BW0 includes the second barrier wall BW2, and the second barrier wall BW2 surrounds the active device TFT . The material of the second barrier wall BW2 may include a metal oxide conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), aluminum oxide indium, indium oxide (InO), gallium oxide (gallium). Oxide, GaO) or other metal oxide conductive material, graphene, metal material such as molybdenum (Mo), titanium (Ti) or other metal materials, metal alloys such as molybdenum nitride (MoN), combinations of the above materials, or others Low resistance conductive material. In addition, the second barrier wall BW2 and the shielding layer SD may be formed in the same step, and the second barrier wall BW2 and the shielding layer SD belong to the same film layer. However, in the present embodiment, the second barrier wall BW2 and the shielding layer SD may be formed in different steps, and the materials may be different, which is not intended to limit the present invention. Since the first barrier wall BW1 and the second barrier wall BW2 surround the active device TFT, the diffusion of hydrogen ions and moisture can be further prevented in the subsequent process steps, and the electrical properties of the active device TFT are affected.

Referring to FIG. 2F and FIG. 3F, after forming the shielding layer SD, a photo sensing layer PS is formed in the cell region R, wherein the photo sensing layer PS is filled in the opening V2 of the protective layer PL1. The light sensing layer PS is electrically connected to the first electrode layer M1 through the opening V2. After forming the photo sensing layer PS, the second protective layer PL2, the second electrode layer M2, and the third protective layer PL3 may be respectively formed over the photo sensing layer PS to form a photo sensing unit structure as shown in FIG. 3G. .

In detail, the light sensing unit structure shown in Fig. 3G can correspond to the semiconductor element of one embodiment of the present invention, and is a schematic cross-sectional view corresponding to the extension line X-X' of Fig. 2F. Referring to FIG. 3G, the semiconductor element includes a substrate Sub, an active device TFT, a protective layer PL1, and a first barrier rib BW1. The active device TFT is located on the substrate Sub. In particular, the active device TFT includes a gate G, an insulating layer GI, a semiconductor layer AL, an etch stop layer ES, a source S, and a drain D. As described above, the insulating layer GI covers the gate G. The semiconductor layer AL is located above the gate G. The etch stop layer ES covers the semiconductor layer AL. The source S and the drain D are located on the etch stop layer ES and are in electrical contact with the semiconductor layer AL.

In addition, the protective layer PL1 is used to cover the active device TFT, and the first barrier wall BW1 surrounds the active device TFT. In the embodiment of FIG. 3G, the semiconductor element further includes a first electrode layer M1, a shielding layer SD, a photo sensing layer PS, a second electrode layer M2, and a second barrier wall BW2 (see FIG. 3E). As described above, the first electrode layer M1 is electrically connected to the active device TFT, and the protective layer PL1 covers the first electrode layer M1. The second barrier wall BW2 is located in the protective layer PL1 and surrounds the active device TFT. The shielding layer SD is located on the protective layer PL1 and shields the active device TFT. The photo sensing layer PS is located on the protective layer PL1 and is electrically connected to the first electrode layer M1. In addition, the second electrode layer M2 is located on the light sensing layer PL1.

In the semiconductor element of FIG. 3G, since the first barrier rib BW1 and the second barrier rib BW2 surround the active device TFT, diffusion of hydrogen ions and moisture can be further prevented to affect the electrical properties of the active device TFT.

4 is a schematic diagram of a light sensing unit according to another embodiment of the present invention. The structure of the photo-sensing unit of FIG. 4 is similar to that of the photo-sensing unit of FIG. 3G, and is also a cross-section corresponding to the X-X' of FIG. 2F. Therefore, the same elements are denoted by the same reference numerals and will not be described again. The difference between the photo sensing unit of FIG. 4 and FIG. 3G is that the manufacturing method of the photo sensing unit of FIG. 4 further includes forming a flat layer PN on the protective layer PL1, and the shielding layer SD is located on the protective layer PL1 and the flat layer PN. And shielding the active device TFT and shielding the entire cell region R. Since the flat layer PN is added, the occurrence of the parasitic capacitance of the first electrode layer M'1 and the active device TFT can be reduced, and the flatness of the photo-sensing layer PS can be ensured. The first electrode layer M'1 is located on the flat layer PN, and the first electrode layer M'1 and the shielding layer SD are simultaneously formed. In other words, the first electrode layer M'1 and the shielding layer SD belong to the same film layer. In addition, compared to the photo sensing unit structure of FIG. 3G, the photo sensing layer PS is layered on the active device TFT, thus increasing the sensing area of the photo sensing layer PS. In this embodiment, since the first electrode layer M'1 and the shielding layer SD are simultaneously formed on the active device TFT, when the photo sensing layer PS is formed, diffusion of hydrogen ions and moisture can be avoided. The electrical properties of the active device TFT are affected.

FIG. 5 is a schematic diagram of a light sensing unit according to another embodiment of the present invention. The light sensing unit of the embodiment of Fig. 5 is formed in a manufacturing method similar to the light sensing unit of Fig. 4. The structure of the photo-sensing unit of FIG. 5 is similar to that of the photo-sensing unit of FIG. 4, and is also a cross-section corresponding to the X-X' of FIG. 2F. Therefore, the same elements are denoted by the same reference numerals and will not be described again. The difference between the photo sensing unit of FIG. 5 and FIG. 4 is that the manufacturing method of the photo sensing unit of FIG. 5 further includes forming a first barrier wall BW'1 around the active device TFT. In the present embodiment, since the first barrier wall BW'1 surrounds the active device TFT, in the subsequent process steps, diffusion of hydrogen ions and moisture can be avoided and the electrical properties of the active device TFT are affected.

FIG. 6 is a schematic diagram of a light sensing unit according to another embodiment of the present invention. The light sensing unit of the embodiment of Fig. 6 is formed in a manufacturing method similar to that of the light sensing unit of Fig. 5. The structure of the photo-sensing unit of FIG. 6 is similar to that of the photo-sensing unit of FIG. 5, and is also a cross-section corresponding to the X-X' of FIG. 2F. Therefore, the same elements are denoted by the same reference numerals and will not be described again. The difference between the light sensing unit of FIG. 6 and FIG. 5 is that the manufacturing method of the light sensing unit of FIG. 6 further includes forming a second barrier wall BW'2 in the flat layer PN, wherein the second barrier wall BW'2 surrounds the active Component TFT. In this embodiment, since the first barrier wall BW'1 and the second barrier wall BW'2 surround the active device TFT, in the subsequent process steps, diffusion of hydrogen ions and moisture can be further avoided to cause the active device TFT. The electrical properties are affected.

FIG. 7 is a schematic diagram of a light sensing unit according to another embodiment of the present invention. The light sensing unit of the embodiment of Fig. 7 is formed in a manufacturing method similar to the light sensing unit of Fig. 4. The structure of the photo-sensing unit of FIG. 7 is similar to that of the photo-sensing unit of FIG. 4, and is also a cross-section corresponding to the cross-sectional line X-X' of FIG. 2F. Therefore, the same elements are denoted by the same reference numerals and will not be described again. The difference between the photo sensing unit of FIG. 7 and FIG. 4 is that the photo sensing unit of FIG. 7 does not include the flat layer PN, and the photo sensing layer PS is directly formed over the first electrode layer M'1 and the shielding layer SD, and The germanium layer is on the active device TFT. In this embodiment, since the first electrode layer M'1 and the shielding layer SD are simultaneously formed on the active device TFT, when the photo sensing layer PS is formed, diffusion of hydrogen ions and moisture can be avoided. The electrical properties of the active device TFT are affected.

FIG. 8 is a schematic diagram of a light sensing unit according to another embodiment of the present invention. The light sensing unit of the embodiment of Fig. 8 is formed in a manufacturing method similar to the light sensing unit of Fig. 7. The structure of the photo-sensing unit of FIG. 8 is similar to that of the photo-sensing unit of FIG. 7, and is also a cross-section corresponding to the cross-sectional line X-X' of FIG. 2F. Therefore, the same elements are denoted by the same reference numerals and will not be described again. 8 is different from the photo sensing unit of FIG. 7 in that the manufacturing method of the photo sensing unit of FIG. 8 further includes forming a first barrier wall BW'1 around the active device TFT. In the present embodiment, since the first barrier wall BW'1 surrounds the active device TFT, in the subsequent process steps, diffusion of hydrogen ions and moisture can be avoided and the electrical properties of the active device TFT are affected.

9A is a top plan view of a semiconductor component of a photo sensing unit according to another embodiment of the present invention. Fig. 9B is a schematic cross-sectional view taken along line A-A' of Fig. 9A. Fig. 9C is a schematic cross-sectional view taken along line B-B' of Fig. 9A. Please refer to FIG. 9A, FIG. 9B and FIG. 9C at the same time. The semiconductor element of the photo sensing unit of the present embodiment includes a substrate Sub, an active device TFT, a protective layer PL1, and a shielding layer SD. The active device TFT is disposed on the substrate Sub, and the active device TFT includes a gate G, an insulating layer GI, a semiconductor layer AL, an etch stop layer ES, a source S, and a drain D. As described above, the insulating layer GI covers the gate G, and the semiconductor layer AL is located above the gate G. The etch stop layer ES covers the semiconductor layer AL. The source S and the drain D are located on the etch stop layer ES and are in electrical contact with the semiconductor layer AL.

In the present embodiment, the semiconductor element further includes a flat layer PLN located above the protective layer PL1. The opening OP surrounds the active device TFT and is located in the flat layer PLN and the protective layer PL1. The shielding layer SD is located on the protective layer PL1, wherein the shielding layer SD shields the active device TFT, and the shielding layer SD shields the entire cell region. The shielding layer SD is composed of an opaque metal including a metal such as aluminum, titanium/aluminum/titanium, molybdenum, molybdenum/aluminum/molybdenum, an alloy of the above metal or other suitable metal or alloy in the present embodiment. In the example. Further, in the cross section of the line A-A', the barrier wall BW0 fills the flat layer PLN and the opening OP of the protective layer PL1. It is to be noted, however, that in the section of the line B-B', the opening OP passes through the flat layer PLN and extends to the surface of the protective layer PL1. In other words, in the cross section of the line B-B', the shielding layer SD is only filled in the opening OP of the flat layer PLN to be electrically insulated from the data line DL.

The material of the barrier wall BW0 may include a metal oxide conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), aluminum oxide indium, indium oxide (InO), gallium oxide (gallium oxide, GaO) or other metal oxide conductive material, graphene, metal material such as tungsten, molybdenum, titanium, copper, aluminum or silver or other metal materials, metal alloys such as molybdenum nitride (MoN), combinations of the above materials, or others Low resistance conductive material. The shielding layer SD and the barrier wall BW0 may be formed in the same step, however, the invention is not limited thereto. In this embodiment, the barrier wall BW0 and the shielding layer SD may be formed in different steps, and the materials may be different, which is not intended to limit the present invention.

Referring to FIGS. 9A to 9C, the barrier wall BW0 surrounds the active device TFT. That is, the barrier wall BW0 is filled in the opening OP and surrounds the side of the active device TFT, and the shielding layer SD covers the upper side of the active device TFT. The barrier wall BW0 is in contact with the drain D of the active device TFT through the contact hole CH of the opening OP. In addition, the thickness of the shielding layer SD is greater than 100 nm. In the present embodiment, since the barrier wall BW0 surrounds the active device TFT, diffusion of hydrogen ions and moisture can be blocked, and electrical properties of the active device TFT are prevented from being affected. In addition, in the semiconductor device shown in FIG. 9A to FIG. 9C, a photo sensing layer may be formed over the barrier wall BW0, and the photo sensing layer is layered on the active device TFT to achieve another embodiment of the present invention. Light sensing unit structure. Instance

In order to prove that the semiconductor element of the photo sensing unit of the present invention can be used to block the diffusion of hydrogen ions and moisture, the electrical properties of the active device TFT are prevented from being affected, particularly by the following examples.

FIG. 10A is an IV graph (Ids-Vgs curve) of a conventional semiconductor device. In the embodiment of Fig. 10A, an IV graph of voltage versus current is measured for a conventional semiconductor component in the absence of any hydrogen ions and moisture. As can be seen from FIG. 10A, in the absence of any hydrogen ions and moisture, the active components of a general semiconductor device can be normally switched at different voltages VD (0.1 V and 10 V).

FIG. 10B is an IV graph of a semiconductor device of a photo sensing unit according to an embodiment of the invention. FIG. FIG. 10B is an IV graph showing voltage and current measured for the semiconductor element of the photo sensing unit of FIGS. 9A to 9C, that is, the semiconductor element having the barrier wall BW0, in the state of having hydrogen ions and moisture. . From the experimental results of FIG. 10B, it is found that the IV graph of the semiconductor element of FIGS. 9A to 9C is the same as the IV graph of FIG. 10A even in the state of having hydrogen ions and moisture. That is to say, the semiconductor element of the present invention includes the barrier wall BW0 for blocking the influence of hydrogen ions and water vapor on the active device TFT, and therefore, the relationship between voltage and current is the same as in the normal state. In other words, in the state of having hydrogen ions and moisture, the active device TFT of the semiconductor device of the present invention can be normally switched at different voltages VD (0.1 V and 10 V).

10C is a graph showing the IV of a semiconductor element of a photo sensing unit according to a comparative example of the present invention. Fig. 10C is an IV graph showing the relationship between voltage and current measured for a conventional semiconductor element, that is, a semiconductor element not including the barrier wall BW0, in a state having hydrogen ions and moisture. From the experimental results of Fig. 10C, it is found that the electrical characteristics of the active elements of the conventional semiconductor element are affected in the state of having hydrogen ions and moisture. In detail, since the conventional semiconductor element does not include the barrier wall BW0, it is impossible to effectively block the diffusion of hydrogen ions and moisture. In other words, in the state of having hydrogen ions and water vapor, the active elements of the conventional semiconductor elements cannot be normally switched at different voltages VD (0.1 V and 10 V).

In summary, the light sensing unit of the light sensing array formed by the manufacturing method of the present invention includes a first electrode layer M1 (M'1), a shielding layer SD, and a barrier wall BW0 (including the first and second barriers). Wall) structure. In particular, the first electrode layer M1 (M'1) and the shielding layer SD are formed over the active device TFT to shield the active device TFT. In addition, the barrier wall BW0 will surround the active device TFT. Therefore, in the subsequent step of forming the photo sensing layer PS, the above structure can be used to block the diffusion effect of hydrogen ions or moisture to prevent the electrical properties of the active device TFT from being affected. In addition, in the above-described embodiment, since the photo sensing layer PS is formed after the first electrode layer M1 (M'1) and the shielding layer SD, it is possible to avoid the etching process of the photo sensing layer PS. The plasma used is damaged by the channel of the active element TFT.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.

DL: data line GL: gate line TFT: active element PS: light sensing layer R: unit area Sub: substrate G: gate

GI‧‧‧Insulation

AL‧‧‧Semiconductor layer

ES‧‧‧etch stop layer

V1, V2, OP‧‧‧ openings

T1‧‧‧first ditches

T2‧‧‧Second Ditch

S‧‧‧ source

D‧‧‧汲

M1, M'1‧‧‧ first electrode layer

M2‧‧‧Second electrode layer

BW0‧‧‧ blocking wall

BW1, BW’1‧‧‧ first barrier wall

BW2, BW'2‧‧‧ second barrier wall

PL1‧‧‧ first protective layer

PL2‧‧‧ second protective layer

PL3‧‧‧ third protective layer

SD‧‧‧shading layer

PN, PLN‧‧‧ flat layer

CH‧‧‧Contact hole

1 is a schematic diagram of a light sensing array in accordance with an embodiment of the present invention. 2A to 2F are schematic top views of a manufacturing process of a light sensing unit according to an embodiment of the present invention. 3A to 3G are schematic cross-sectional views showing a manufacturing process of a photo sensing unit according to an embodiment of the present invention. 4 is a schematic diagram of a light sensing unit according to another embodiment of the present invention. FIG. 5 is a schematic diagram of a light sensing unit according to another embodiment of the present invention. FIG. 6 is a schematic diagram of a light sensing unit according to another embodiment of the present invention. FIG. 7 is a schematic diagram of a light sensing unit according to another embodiment of the present invention. FIG. 8 is a schematic diagram of a light sensing unit according to another embodiment of the present invention. 9A is a top plan view of a semiconductor component of a photo sensing unit according to another embodiment of the present invention. Fig. 9B is a schematic cross-sectional view taken along line A-A' of Fig. 9A. Fig. 9C is a schematic cross-sectional view taken along line B-B' of Fig. 9A. Fig. 10A is an IV graph of a conventional semiconductor device. FIG. 10B is an IV graph of a semiconductor device of a photo sensing unit according to an embodiment of the invention. FIG. 10C is a graph showing the IV of a semiconductor element of a photo sensing unit according to a comparative example of the present invention.

TFT: active element Sub: substrate G: gate GI: insulating layer AL: semiconductor layer ES: etch stop layer S: source D: drain M1: first electrode layer M2: second electrode layer PL1: first protective layer PL2: second protective layer PL3: third protective layer PS: light sensing layer SD: shielding layer BW0: barrier wall BW1: first barrier wall BW2: second barrier wall

Claims (20)

A method for manufacturing a light sensing unit of a light sensing array, comprising: providing a substrate having at least one unit region; forming an active component in the unit region on the substrate; and the unit on the substrate Forming a first electrode layer in the region, the first electrode layer is electrically connected to the active component; forming a barrier wall around the active component; forming a protective layer on the active component; forming a protective layer on the protective layer Masking the active layer; after forming the shielding layer, forming a light sensing layer on the protective layer in the cell region; and forming a second electrode layer on the light sensing layer. The method for manufacturing a photo-sensing unit of the photo-sensing array of claim 1, wherein the method for forming the active device comprises: forming a gate on the substrate; forming an insulating layer on the gate; Forming a semiconductor layer on the insulating layer; forming an etch stop layer on the semiconductor layer; and forming a source and a drain on the etch stop layer, the source and the drain are in contact with the semiconductor layer, The barrier wall is formed in the insulating layer and the etch stop layer, the barrier wall includes a first barrier wall, and the first barrier wall surrounds the active component. The method for manufacturing a light sensing unit of the light sensing array of claim 2, further comprising forming the barrier wall in the protective layer, the barrier wall comprising a second barrier wall, the second barrier wall Surround the active component. The method of manufacturing a photo-sensing unit of the photo-sensing array of claim 2, wherein the first electrode layer is located below the protective layer, and the first electrode layer is simultaneously with the source and the drain form. The method of manufacturing a light sensing unit of the light sensing array of claim 1, wherein the shielding layer shields the active component and shields the entire cell region. The method of manufacturing a photo-sensing unit of the photo-sensing array of claim 5, wherein the photo-sensing layer is laminated on the active device. The method for manufacturing a photo-sensing unit of the photo-sensing array of claim 1, further comprising forming a flat layer on the protective layer, and the shielding layer is located on the flat layer. The method of manufacturing a photo-sensing unit of a photo-sensing array according to claim 7, wherein the first electrode layer is located on the flat layer, and the first electrode layer is formed simultaneously with the shielding layer. A light sensing unit of a light sensing array, comprising: a substrate comprising at least one unit region; an active component located in the unit region of the substrate; a barrier wall surrounding the active component; a first electrode layer, Located in the unit area and electrically connected to the active component; a protective layer covering the active device and the first electrode layer; a shielding layer on the protective layer, wherein the shielding layer shields the active component; a light sensing layer is disposed on the protective layer and the first The electrode layer is electrically connected; and a second electrode layer is located on the light sensing layer. The light sensing unit of the light sensing array of claim 9, wherein the active component comprises: a gate on the substrate; an insulating layer on the gate; a semiconductor layer located at the An insulating layer is disposed on the semiconductor layer; and a source and a drain are located on the etch stop layer, and the source and the drain are in contact with the semiconductor layer. The light sensing unit of the light sensing array of claim 10, wherein the first barrier wall is located in the etch stop layer and the protective layer, and the first barrier wall is made of a metal material. The light sensing unit of the light sensing array of claim 10, wherein the first electrode layer is located below the protective layer, and the first electrode layer belongs to the same film as the source and the drain Floor. The light sensing unit of the light sensing array of claim 12, wherein the barrier wall comprises a first barrier wall, the first barrier wall is located in the insulating layer and the etch stop layer, and the first A barrier wall surrounds the active component. The light sensing unit of the light sensing array of claim 13, wherein the first barrier wall and the first electrode layer belong to the same film layer. The light sensing unit of the light sensing array of claim 13, wherein the barrier wall comprises a second barrier wall, the second barrier wall is located in the protective layer, and the second barrier wall surrounds the Active component. The light sensing unit of the light sensing array of claim 15, wherein the second barrier wall and the shielding layer belong to the same film layer. The light sensing unit of the light sensing array of claim 16, further comprising a flat layer on the protective layer, and the shielding layer is located on the flat layer. The light sensing unit of the light sensing array of claim 17, wherein the first electrode layer is located on the flat layer, and the first electrode layer and the shielding layer belong to the same film layer. The light sensing unit of the light sensing array of claim 9, wherein the shielding layer shields the entire unit area. The light sensing unit of the light sensing array of claim 19, wherein the light sensing layer is laminated on the active component.