CN105762161A - Method for manufacturing light sensing unit of light sensing array and structure thereof - Google Patents

Method for manufacturing light sensing unit of light sensing array and structure thereof Download PDF

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Publication number
CN105762161A
CN105762161A CN201610107533.9A CN201610107533A CN105762161A CN 105762161 A CN105762161 A CN 105762161A CN 201610107533 A CN201610107533 A CN 201610107533A CN 105762161 A CN105762161 A CN 105762161A
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light sensing
layer
active member
sensing unit
electrode
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CN105762161B (en
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陈盈宪
孙硕阳
郑造时
黄婉真
徐文斌
郑君丞
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AU Optronics Corp
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AU Optronics Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/1463Pixel isolation structures

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Thin Film Transistor (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

A method for manufacturing a light sensing unit of a light sensing array comprises providing a substrate having at least one unit region thereon. Active devices are formed in the cell regions on the substrate. A first electrode layer is formed in a unit area on a substrate and electrically connected with an active element. A protective layer is formed on the active device. A shielding layer is formed on the passivation layer to shield the active device. After the shielding layer is formed, a light sensing layer is formed on the protective layer in the unit area, and a second electrode layer is formed on the light sensing layer.

Description

The manufacture method of the light sensing unit of light sensing array and structure thereof
Technical field
The invention relates to a kind of manufacture method sensing unit, and in particular to the manufacture method of light sensing unit of a kind of light sensing array and structure thereof.
Background technology
Light sensing unit is a kind of light sensitive component being commonly used to the electronic installations such as mobile phone, tablet PC, mobile computer or medical diagnosis aid.Traditionally, the manufacturing process of light sensing unit is after forming oxide semiconductor layer, then forms the light sensing unit of correspondence.But, when carrying out the deposition step of light sensing unit, because of hydrionic generation, oxide-semiconductor devices can be caused phenomenon that is electrically unstable or that electrically degenerate.Affecting for the electrical of oxide semiconductor layer based on hydrion, the manufacturing process of existing light sensing unit can derive the problem that yield declines and the increase causing manufacturing cost.It addition, existing oxide-semiconductor devices is also easily subject to the impact of aqueous vapor, cause the electrical unstable of semiconductor element.Therefore, the structure of the manufacturing process and semiconductor element that how to improve light sensing unit avoids the important topic that the impact that hydrion and aqueous vapor are brought must overcome for current pole.
Summary of the invention
The present invention provides manufacture method and the structure thereof of the light sensing unit of a kind of light sensing array, may be used to solve that hydrion and aqueous vapor bring electrical affects problem.
The manufacture method of the light sensing unit of the light sensing array of the present invention, including providing substrate, substrate has at least one unit area.Active member is formed in unit area on substrate.Forming the first electrode layer in unit area on substrate, described first electrode layer is electrically connected with active member.Active member is formed protective layer.Form shielding layer on the protection layer, to cover active member.After forming shielding layer, the protective layer in unit area forms light sensing layer, and, on light sensing layer, form the second electrode lay.
Wherein, the surrounding's formation one being more included in this active member intercepts wall.
Wherein, the forming method of this active member includes:
Form a grid on the substrate;
Form an insulating barrier on the gate;
Form semi-conductor layer on which insulating layer;
This semiconductor layer is formed an etch stop layer;And
This etch stop layer is formed a source electrode and a drain electrode, this source electrode and this drain electrode contact with this semiconductor layer, wherein forming this obstruct wall in this insulating barrier and this etch stop layer, this obstruct wall includes one first obstruct wall, and this first obstruct walled is around this active member.
Wherein, being more included in this protective layer and form this obstruct wall, this obstruct wall includes one second obstruct wall, and this second obstruct walled is around this active member.
Wherein, this first electrode layer is positioned at the lower section of this protective layer, and this first electrode layer concurrently forms with this source electrode and drain electrode.
Wherein, this shielding layer covers this active member and covers this unit area whole.
Wherein, this light sensing layer of lamination is on this active member.
Wherein, more it is included on this protective layer and forms a flatness layer, and this shielding layer is positioned on this flatness layer.
Wherein, this first electrode layer is positioned on this flatness layer, and this first electrode layer concurrently forms with this shielding layer.
The present invention separately provides the light sensing unit of a kind of light sensing array, including substrate, active member, the first electrode layer, protective layer, shielding layer, light sensing layer and the second electrode lay.Described substrate includes at least one unit area.Active member is positioned at the unit area of substrate.First electrode layer is positioned at unit area and is electrically connected with active member.Protective layer covers active member and the first electrode layer.Shielding layer is positioned on protective layer, and wherein shielding layer covers active member and covers whole unit area.Light sensing layer is positioned on protective layer and is electrically connected with the first electrode layer.The second electrode lay is positioned on light sensing layer.
Wherein, more include an obstruct wall, around this active member.
Wherein, this active member includes:
One grid, is positioned on this substrate;
One insulating barrier, is positioned on this grid;
Semi-conductor layer, is positioned on this insulating barrier;
One etch stop layer, is positioned on this semiconductor layer;And
One source electrode and a drain electrode are positioned on this etch stop layer, and this source electrode and this drain electrode contact with this semiconductor layer.
Wherein, this first obstruct wall is arranged in this etch stop layer and this protective layer, and this first obstruct wall is metal material.
Wherein, this first electrode layer is positioned at the lower section of this protective layer, and this first electrode layer belongs to same rete with this source electrode and this drain electrode.
Wherein, this obstruct wall includes one first obstruct wall, and this first obstruct wall is positioned at this insulating barrier and this etch stop layer, and this first obstruct walled is around this active member.
Wherein, this first obstruct wall belongs to same rete with this first electrode layer.
Wherein, this obstruct wall includes one second obstruct wall, and this second obstruct wall is positioned at this protective layer, and this second obstruct walled is around this active member.
Wherein, this second obstruct wall belongs to same rete with this shielding layer.
Wherein, more include a flatness layer, be positioned on this protective layer, and this shielding layer is positioned on this flatness layer.
Wherein, this first electrode layer is positioned on this flatness layer, and this first electrode layer belongs to same rete with this shielding layer.
Wherein, this shielding layer covers this unit area whole.
Wherein, this light sensing layer of lamination is on this active member.
Based on above-mentioned, the light sensing unit of the light sensing array that the manufacture method of the present invention is formed includes the first electrode layer, shielding layer and intercepts the structure of wall.Therefore, when subsequent step forms light sensing layer, described structure may be used to stop hydrion or the dispersal behavior of aqueous vapor, it is to avoid causes the electrical impact on semiconductor element.
For the features described above of the present invention and advantage can be become apparent, special embodiment below, and coordinate institute's accompanying drawings to be described in detail below.
Accompanying drawing explanation
Fig. 1 is the light sensing array schematic diagram according to one embodiment of the invention.
Fig. 2 A to Fig. 2 F is the upper schematic diagram of the manufacturing process of the light sensing unit of one embodiment of the invention.
Fig. 3 A to Fig. 3 G is the generalized section of the manufacturing process of the light sensing unit of one embodiment of the invention.
Fig. 4 is the light sensing unit schematic diagram of another embodiment of the present invention.
Fig. 5 is the light sensing unit schematic diagram of another embodiment of the present invention.
Fig. 6 is the light sensing unit schematic diagram of another embodiment of the present invention.
Fig. 7 is the light sensing unit schematic diagram of another embodiment of the present invention.
Fig. 8 is the light sensing unit schematic diagram of another embodiment of the present invention.
Fig. 9 A is the upper schematic diagram of the semiconductor element of the light sensing unit of another embodiment of the present invention.
Fig. 9 B is Fig. 9 A generalized section prolonging hatching line A-A '.
Fig. 9 C is Fig. 9 A generalized section prolonging hatching line B-B '.
Figure 10 A is the IV curve chart of existing semiconductor element.
Figure 10 B is the IV curve chart of the semiconductor element of the light sensing unit of one embodiment of the invention.
Figure 10 C is the IV curve chart of the semiconductor element of the light sensing unit of the present invention one comparative example.
Wherein, accompanying drawing labelling:
DL: data wire
GL: gate line
TFT: active member
PS: light sensing layer
R: unit area
Sub: substrate
G: grid
GI: insulating barrier
AL: semiconductor layer
ES: etch stop layer
V1, V2, OP: opening
T1: the first irrigation canals and ditches
T2: the second irrigation canals and ditches
S: source electrode
D: drain electrode
M1, M ' 1: the first electrode layer
M2: the second electrode lay
BW0: intercept wall
BW1, BW ' 1: the first intercepts wall
BW2, BW ' 2: the second intercept wall
PL1: the first protective layer
PL2: the second protective layer
PL3: the three protective layer
SD: shielding layer
PN, PLN: flatness layer
CH: contact hole
Detailed description of the invention
Fig. 1 is the light sensing array schematic diagram according to one embodiment of the invention.In the present embodiment, light sensing array includes multiple light sensing unit.Each light sensing unit is positioned at region (that is unit area R) defined for a plurality of data lines DL and a plurality of gate lines G L.Based on the consideration of electric conductivity, gate lines G L and data wire DL is usually use metal material.So, the invention is not restricted to this, according to other embodiments, gate lines G L and data wire DL can also use other conductive material.Such as: alloy, the nitride of metal material, the oxide of metal material, the nitrogen oxides of metal material or other suitable material or metal material and other lead the stack layer of material.It addition, each light sensing unit each includes active member TFT and light sensing layer PS, wherein, active member TFT is electrically connected with data wire DL, gate lines G L and light sensing layer PS respectively.Hereinafter, the manufacturing process for a part of light sensing unit in the R of unit area is illustrated, as shown in Fig. 2 A to Fig. 2 F and Fig. 3 A to Fig. 3 G.
Fig. 2 A to Fig. 2 F is the upper schematic diagram of the manufacturing process of the light sensing unit of one embodiment of the invention.Fig. 3 A to Fig. 3 G is the generalized section of the manufacturing process of the light sensing unit of one embodiment of the invention.The generalized section of Fig. 3 A to Fig. 3 F respectively corresponding diagram 2A to Fig. 2 F.First, refer to Fig. 2 A and Fig. 3 A, the manufacture method of the light sensing unit of the light sensing array of the present embodiment include provide substrate Sub, described substrate Sub has at least one unit area R (as Fig. 1 indicate).The material of substrate Sub can be glass, quartz, organic polymer or metal etc..
Active member is formed in unit area R on substrate Sub.The forming method of described active member includes being formed grid G and the gate lines G L that is connected with grid G on substrate Sub, and grid G with formation insulating barrier GI on gate lines G L.Then, insulating barrier GI forms semiconductor layer AL.Particularly, semiconductor layer AL can be oxide semiconductor material, including such as indium gallium zinc (Indium-Gallium-ZincOxide, IGZO), zinc oxide (ZnO) stannum oxide (SnO), indium zinc oxide (Indium-ZincOxide, IZO), gallium oxide zinc (Gallium-ZincOxide, GZO), zinc-tin oxide (Zinc-TinOxide, or tin indium oxide (Indium-TinOxide ZTO), ITO) etc., but it is not limited to this.Semiconductor layer AL can also be non-crystalline silicon, polysilicon or other semi-conducting material.
From the above, refer to Fig. 2 B and Fig. 3 B, be formed over etch stop layer ES at semiconductor layer AL and insulating barrier GI.Etch stop layer ES has opening V1 and the first irrigation canals and ditches T1.Particularly, described first irrigation canals and ditches T1 is through etch stop layer ES and insulating barrier GI to extend to the surface of substrate Sub, and the first irrigation canals and ditches T1 by semiconductor layer AL with grid G surround (as shown in Figure 2 B).
Then, refer to Fig. 2 C and Fig. 3 C, etch stop layer ES forms source S and drain D, and form the first electrode layer M1 in the unit area R on substrate Sub simultaneously.In the present embodiment, the first electrode layer M1 is simultaneously formed with source S and drain D, and belongs to same rete.Contact it addition, source S and drain D are through opening V1 with semiconductor layer AL.Described first electrode layer M1 is electrically connected with drain D.As Fig. 3 C indicate, above-mentioned grid G, source S, drain D and semiconductor layer AL form active member TFT.In the present embodiment, the surrounding's formation in active member TFT intercepts wall BW0, wherein intercepts wall BW0 and includes the first obstruct wall BW1.While forming the first electrode layer M1, source S and drain D, more it is included in the first irrigation canals and ditches T1 of insulating barrier GI and etch stop layer ES and forms the first obstruct wall BW1.First intercepts wall BW1 material can include metal conductive oxide material such as tin indium oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), aluminium oxide indium, Indium sesquioxide. (InO), gallium oxide (galliumoxide, GaO) or other metal conductive oxide material, Graphene, metal material such as molybdenum (Mo), titanium (Ti) or other metal material, metal alloy such as molybdenum nitride (MoN), the combination of above-mentioned material or other there is the conductive material of low resistance.First electrode layer M1 be metal material include metal such as aluminum, titanium/aluminum/titanium, molybdenum, molybdenum/aluminum/molybdenum, above-mentioned metal composition alloy or other be suitable for metal or alloy in the present embodiment.First intercepts wall BW1 and the first electrode layer M1 can be formed for same steps.First intercepts wall BW1 inserts in the first irrigation canals and ditches T1, and described first intercepts wall BW1 around active member TFT.In the present embodiment, first intercept wall BW1 and the first electrode layer M1 can be formed for different step, and material can be difference, so this and be not used to limit the present invention.Owing to first intercepts wall BW1 around active member TFT, therefore, in subsequent process steps, hydrion and diffusion of moisture can be avoided to make electrically being affected of active member TFT.In the present embodiment, active member TFT illustrates for bottom grid film transistor, but the invention is not restricted to this.According to other embodiments, described active member TFT can be top gate-type thin film transistor.
Then, refer to Fig. 2 D and Fig. 3 D, form the first protective layer PL1 on active member TFT, wherein the first electrode layer M1 is in the lower section of the first protective layer PL1.First protective layer PL1 has the second irrigation canals and ditches T2 and opening V2.Described second irrigation canals and ditches T2 is through protective layer PL1 and extends to the surface of the first electrode layer M1, and the second irrigation canals and ditches T2 is around above-mentioned active member TFT (as shown in Figure 2 D).
Come again, refer to Fig. 2 E and Fig. 3 E, protective layer PL1 forms shielding layer SD, to cover active member TFT.Described shielding layer SD covers the active member TFT in whole unit area R, and shielding layer SD is made up of light tight metal.Described metal material include metal such as aluminum, titanium/aluminum/titanium, molybdenum, molybdenum/aluminum/molybdenum, above-mentioned metal composition alloy or other be suitable for metal or alloy in the present embodiment.It addition, formed while shielding layer SD, more it is included in the second irrigation canals and ditches T2 of protective layer PL1 and is formed intercepts wall BW0, wherein intercept wall BW0 and include the second obstruct wall BW2, and described second intercepts wall BW2 around active member TFT.Second material intercepting wall BW2 can include metal conductive oxide material such as tin indium oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), aluminium oxide indium, Indium sesquioxide. (InO), gallium oxide (galliumoxide, GaO) or other metal conductive oxide material, Graphene, metal material such as molybdenum (Mo), titanium (Ti) or other metal material, metal alloy such as molybdenum nitride (MoN), the combination of above-mentioned material or other there is the conductive material of low resistance.It addition, the second obstruct wall BW2 and shielding layer SD can be formed for same steps, and the second obstruct wall BW2 and shielding layer SD belongs to same rete.But, in the present embodiment, second intercepts wall BW2 and shielding layer SD can be formed for different step, and material can be difference, so this and be not used to limit the present invention.Owing to first intercepts wall BW1 and second obstruct wall BW2 around active member TFT, therefore, in subsequent process steps, the diffusion of hydrion and aqueous vapor can be avoided further to make electrically being affected of active member TFT.
Coming, refer to Fig. 2 F and Fig. 3 F, in being formed after shielding layer SD, form light sensing layer PS in the R of unit area, wherein, light sensing layer PS inserts in the opening V2 of protective layer PL1.Light sensing layer PS is through opening V2 and the first electrode layer M1 and is electrically connected.After forming light sensing layer PS, the second protective layer PL2, the second electrode lay M2 and the 3rd protective layer PL3 can be formed above light sensing layer PS respectively to form light sensing unit structure as shown in Figure 3 G.
Specifically, the light sensing unit structure shown in Fig. 3 G may correspond to the semiconductor element of one embodiment of the invention, and for prolonging the generalized section of hatching line X-X ' corresponding to Fig. 2 F.With reference to Fig. 3 G, semiconductor element includes substrate Sub, active member TFT, protective layer PL1 and first intercept wall BW1.Active member TFT is positioned on substrate Sub.Particularly, active member TFT includes grid G, insulating barrier GI, semiconductor layer AL, etch stop layer ES, source S and drain D.From the above, insulating barrier GI covers grid G.Semiconductor layer AL is positioned at above grid G.Etch stop layer ES covers semiconductor layer AL.Source S and drain D are positioned on etch stop layer ES, and in electrical contact with semiconductor layer AL.
It addition, protective layer PL1 is in order to cover active member TFT, and first intercepts wall BW1 around active member TFT.In the embodiment of Fig. 3 G, semiconductor element more includes the first electrode layer M1, shielding layer SD, light sensing layer PS, the second electrode lay M2 and the second obstruct wall BW2 (see Fig. 3 E).From the above, the first electrode layer M1 and active member TFT is electrically connected, and protective layer PL1 covers the first electrode layer M1.Second intercepts wall BW2 is positioned at protective layer PL1, and around active member TFT.Shielding layer SD is positioned on protective layer PL1, and covers active member TFT.Light sensing layer PS is positioned on protective layer PL1, and is electrically connected with the first electrode layer M1.It addition, the second electrode lay M2 is positioned on light sensing layer PL1.
In the semiconductor element of Fig. 3 G, owing to first intercepts wall BW1 and second obstruct wall BW2 around active member TFT, therefore, the diffusion of hydrion and aqueous vapor can be avoided further to make electrically being affected of active member TFT.
Fig. 4 is the light sensing unit schematic diagram of another embodiment of the present invention.The light sensing unit structure of Fig. 4 is similar with the light sensing unit structure of Fig. 3 G, and is similarly the section prolonging hatching line X-X ' corresponding to Fig. 2 F, and therefore, similar elements represents with identical label, and it will not go into details.The light sensing unit difference of Fig. 4 and Fig. 3 G is in that; the manufacture method of the light sensing unit of Fig. 4 is more included on protective layer PL1 and forms flatness layer PN; and shielding layer SD is on protective layer PL1 and flatness layer PN, and covers active member TFT and cover whole unit area R.Owing to adding flatness layer PN, therefore can reduce the first electrode layer M ' 1 and the chance of occurrence of active member TFT parasitic capacitance, also ensure that the flatness of photoinduction layer PS simultaneously.First electrode layer M ' 1 is on flatness layer PN, and the first electrode layer M ' 1 and shielding layer SD is simultaneously formed.In other words, the first electrode layer M ' 1 and shielding layer SD is belonging to same rete.It addition, the light sensing unit structure compared to Fig. 3 G, light sensing layer PS is stacked on active member TFT, therefore adds the sensing area of light sensing layer PS.In the present embodiment, owing to the first electrode layer M ' 1 and shielding layer SD is simultaneously formed in the top of active member TFT, therefore, when forming light sensing layer PS, the diffusion of hydrion and aqueous vapor can be avoided to make electrically being affected of active member TFT.
Fig. 5 is the light sensing unit schematic diagram of another embodiment of the present invention.The light sensing unit of Fig. 5 embodiment is that the manufacture method being similar to Fig. 4 light sensing unit is formed.The light sensing unit structure of Fig. 5 is similar with the light sensing unit structure of Fig. 4, and is similarly the section prolonging hatching line X-X ' corresponding to Fig. 2 F, and therefore, similar elements represents with identical label, and it will not go into details.The light sensing unit difference of Fig. 5 and Fig. 4 is in that, the manufacture method of the light sensing unit of Fig. 5 is more included in surrounding's formation first of active member TFT and intercepts wall BW ' 1.In the present embodiment, owing to first intercepts wall BW ' 1 around active member TFT, therefore, in subsequent process steps, the diffusion of hydrion and aqueous vapor can be avoided to make electrically being affected of active member TFT.
Fig. 6 is the light sensing unit schematic diagram of another embodiment of the present invention.The light sensing unit of Fig. 6 embodiment is that the manufacture method being similar to Fig. 5 light sensing unit is formed.The light sensing unit structure of Fig. 6 is similar with the light sensing unit structure of Fig. 5, and is similarly the section prolonging hatching line X-X ' corresponding to Fig. 2 F, and therefore, similar elements represents with identical label, and it will not go into details.The light sensing unit difference of Fig. 6 and Fig. 5 is in that, the manufacture method of the light sensing unit of Fig. 6 is more included in flatness layer PN and forms the second obstruct wall BW ' 2, and wherein, second intercepts wall BW ' 2 around active member TFT.In the present embodiment, owing to first intercepts wall BW ' 1 and the second obstruct wall BW ' 2 around active member TFT, therefore, in subsequent process steps, the diffusion of hydrion and aqueous vapor can be avoided further to make electrically being affected of active member TFT.
Fig. 7 is the light sensing unit schematic diagram of another embodiment of the present invention.The light sensing unit of Fig. 7 embodiment is that the manufacture method being similar to Fig. 4 light sensing unit is formed.The light sensing unit structure of Fig. 7 is similar with the light sensing unit structure of Fig. 4, and is similarly the section prolonging hatching line X-X ' corresponding to Fig. 2 F, and therefore, similar elements represents with identical label, and it will not go into details.The light sensing unit difference of Fig. 7 and Fig. 4 is in that, the light sensing unit of Fig. 7 does not include flatness layer PN, and light sensing layer PS is formed directly into the top of the first electrode layer M ' 1 and shielding layer SD, and is stacked on active member TFT.In the present embodiment, owing to the first electrode layer M ' 1 and shielding layer SD is simultaneously formed in the top of active member TFT, therefore, when forming light sensing layer PS, the diffusion of hydrion and aqueous vapor can be avoided to make electrically being affected of active member TFT.
Fig. 8 is the light sensing unit schematic diagram of another embodiment of the present invention.The light sensing unit of Fig. 8 embodiment is that the manufacture method being similar to Fig. 7 light sensing unit is formed.The light sensing unit structure of Fig. 8 is similar with the light sensing unit structure of Fig. 7, and is similarly the section prolonging hatching line X-X ' corresponding to Fig. 2 F, and therefore, similar elements represents with identical label, and it will not go into details.The light sensing unit difference of Fig. 8 and Fig. 7 is in that, the manufacture method of the light sensing unit of Fig. 8 is more included in surrounding's formation first of active member TFT and intercepts wall BW ' 1.In the present embodiment, owing to first intercepts wall BW ' 1 around active member TFT, therefore, in subsequent process steps, the diffusion of hydrion and aqueous vapor can be avoided to make electrically being affected of active member TFT.
Fig. 9 A is the upper schematic diagram of the semiconductor element of the light sensing unit of another embodiment of the present invention.Fig. 9 B is Fig. 9 A generalized section prolonging hatching line A-A '.Fig. 9 C is Fig. 9 A generalized section prolonging hatching line B-B '.Please also refer to Fig. 9 A, Fig. 9 B and Fig. 9 C.Semiconductor element at the light sensing unit of the present embodiment includes substrate Sub, active member TFT, protective layer PL1 and shielding layer SD.Active member TFT is positioned on substrate Sub, and active member TFT includes grid G, insulating barrier GI, semiconductor layer AL, etch stop layer ES, source S and drain D.From the above, insulating barrier GI covers grid G, and semiconductor layer AL is positioned at above grid G.Etch stop layer ES covers semiconductor layer AL.Source S and drain D are positioned on etch stop layer ES, and in electrical contact with semiconductor layer AL.
In the present embodiment, semiconductor element more includes flatness layer PLN and is positioned at the top of protective layer PL1.Opening OP is around active member TFT, and is arranged in flatness layer PLN and protective layer PL1.Shielding layer SD is positioned on this protective layer PL1, and wherein shielding layer SD covers active member TFT, and shielding layer SD covers whole unit area.Shielding layer SD is made up of light tight metal, described metal material include metal such as aluminum, titanium/aluminum/titanium, molybdenum, molybdenum/aluminum/molybdenum, above-mentioned metal composition alloy or other be suitable for metal or alloy in the present embodiment.It addition, in the section of hatching line A-A ', intercept wall BW0 and can insert the opening OP of flatness layer PLN and protective layer PL1.It will be appreciated, however, that in the section of hatching line B-B ', opening OP is through flatness layer PLN the surface extending to protective layer PL1.In other words, in the section of hatching line B-B ', shielding layer SD only can insert the opening OP of flatness layer PLN, so that itself and data wire DL are electrically insulated.
The material intercepting wall BW0 can include metal conductive oxide material such as tin indium oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), aluminium oxide indium, Indium sesquioxide. (InO), gallium oxide (galliumoxide, GaO) or other metal conductive oxide material, Graphene, metal material such as tungsten, molybdenum, titanium, copper, aluminum or silver or other metal material, metal alloy such as molybdenum nitride (MoN), the combination of above-mentioned material or other there is the conductive material of low resistance.Shielding layer SD can be formed for same steps with intercepting wall BW0, but, the invention is not restricted to this.In the present embodiment, intercepting wall BW0 and shielding layer SD can be formed for different step, and material can be difference, so this and be not used to limit the present invention.
With reference to Fig. 9 A to Fig. 9 C, intercept wall BW0 and be around active member TFT.It is to say, intercept wall BW0 to insert opening OP and the side around active member TFT, and shielding layer SD covers the top of active member TFT.Obstruct wall BW0 contacts by the drain D of the contact hole CH and active member TFT of opening OP.It addition, the thickness of shielding layer SD is greater than 100 nm.In the present embodiment, owing to obstruct wall BW0 around active member TFT, therefore, can stop the diffusion of hydrion and aqueous vapor, it is to avoid active member TFT is electrically affected.It addition, in the semiconductor element shown in Fig. 9 A to Fig. 9 C, light sensing layer can be formed in intercepting wall BW0, make light sensing layer laminate on active member TFT, to reach the light sensing unit structure of another embodiment of the present invention.
Embodiment
Semiconductor element in order to prove light sensing unit of the present invention may be used to stop the diffusion of hydrion and aqueous vapor, it is to avoid active member TFT is electrically affected, especially using following Examples as explanation.
Figure 10 A is the IV curve chart (Ids-Vgscurve) of existing semiconductor element.In the embodiment of Figure 10 A, it is when without any hydrion and aqueous vapor, measures the IV curve chart of voltage and current relationship for existing semiconductor element.Can being learnt by Figure 10 A, when without any hydrion and aqueous vapor, the active member of general semiconductor element, under different voltage VD (0.1V and 10V), all can switch normally.
Figure 10 B is the IV curve chart of the semiconductor element of the light sensing unit of one embodiment of the invention.Figure 10 B is when having hydrion and aqueous vapor, for the semiconductor element of the light sensing unit of Fig. 9 A to Fig. 9 C, namely has the IV curve chart of voltage that the semiconductor element intercepting wall BW0 measures and current relationship.Being found by the experimental result of Figure 10 B, even if when having hydrion and aqueous vapor, the IV curve chart of the semiconductor element of Fig. 9 A to Fig. 9 C and the IV curve chart of Figure 10 A are as good as.It is to say, the semiconductor element of the present invention is owing to including obstruct wall BW0 in order to stop the impact on active member TFT of hydrion and aqueous vapor, therefore, it is as good as under its voltage and current relationship and normal condition.In other words, when having hydrion and aqueous vapor, the active member TFT of the semiconductor element of the present invention, under different voltage VD (0.1V and 10V), all can switch normally.
Figure 10 C is the IV curve chart of the semiconductor element of the light sensing unit of the present invention one comparative example.Figure 10 C is when having hydrion and aqueous vapor, for existing semiconductor element, does not namely include intercepting the IV curve chart of voltage that the semiconductor element of wall BW0 measures and current relationship.Being found by the experimental result of Figure 10 C, when having hydrion and aqueous vapor, the electric characteristics of the active member of existing semiconductor element can influence.Specifically, owing to existing semiconductor element does not include intercepting wall BW0, therefore, it is impossible to effectively stop the diffusion of hydrion and aqueous vapor.In other words, when having hydrion and aqueous vapor, the active member of existing semiconductor element is under different voltage VD (0.1V and 10V), it is impossible to switch normally.
In sum, the light sensing unit of the light sensing array that the manufacture method of the present invention is formed includes the first electrode layer M1 (M ' 1), shielding layer SD, intercepts wall BW0 (including first, second obstruct wall) structure.Particularly, the first electrode layer M1 (M ' 1) and shielding layer SD is formed at the top of active member TFT, in order to cover active member TFT.Active member TFT can be surrounded it addition, intercept wall BW0.Therefore, when being subsequently formed the step of light sensing layer PS, said structure may be used to stop that hydrion or the spreading effect of aqueous vapor avoid electrically being affected of active member TFT.Additionally, in the above-described embodiment, owing to light sensing layer PS is subsequently formed at the first electrode layer M1 (M ' 1) and shielding layer SD, therefore, can avoid in the etching process of light sensing layer PS, the damage that the passage of active member TFT is produced by the plasma-based used.
Certainly; the present invention also can have other various embodiments; when without departing substantially from present invention spirit and essence thereof, those of ordinary skill in the art can make various corresponding change and deformation according to the present invention, but these change accordingly and deform the protection domain that all should belong to the claims in the present invention.

Claims (22)

1. the manufacture method of the light sensing unit of a light sensing array, it is characterised in that including:
One substrate is provided, this substrate has at least one unit area;
An active member is formed in this unit area on the substrate;
Forming one first electrode layer in this unit area on the substrate, this first electrode layer is electrically connected with this active member;
This active member is formed a protective layer;
This protective layer forms a shielding layer, to cover this active member;
After forming this shielding layer, this protective layer in this unit area forms a light sensing layer;And
A second electrode lay is formed on this light sensing layer.
2. the manufacture method of the light sensing unit of light sensing array according to claim 1, it is characterised in that the surrounding's formation one being more included in this active member intercepts wall.
3. the manufacture method of the light sensing unit of light sensing array according to claim 2, it is characterised in that the forming method of this active member includes:
Form a grid on the substrate;
Form an insulating barrier on the gate;
Form semi-conductor layer on which insulating layer;
This semiconductor layer is formed an etch stop layer;And
This etch stop layer is formed a source electrode and a drain electrode, this source electrode and this drain electrode contact with this semiconductor layer, wherein forming this obstruct wall in this insulating barrier and this etch stop layer, this obstruct wall includes one first obstruct wall, and this first obstruct walled is around this active member.
4. the manufacture method of the light sensing unit of light sensing array according to claim 3, it is characterised in that be more included in this protective layer and form this obstruct wall, this obstruct wall includes one second obstruct wall, and this second obstruct walled is around this active member.
5. the manufacture method of the light sensing unit of light sensing array according to claim 1, it is characterised in that this first electrode layer is positioned at the lower section of this protective layer, and this first electrode layer concurrently forms with this source electrode and drain electrode.
6. the manufacture method of the light sensing unit of light sensing array according to claim 1, it is characterised in that this shielding layer covers this active member and covers this unit area whole.
7. the manufacture method of the light sensing unit of light sensing array according to claim 6, it is characterised in that this light sensing layer of lamination is on this active member.
8. the manufacture method of the light sensing unit of light sensing array according to claim 1, it is characterised in that be more included on this protective layer and form a flatness layer, and this shielding layer is positioned on this flatness layer.
9. the manufacture method of the light sensing unit of light sensing array according to claim 8, it is characterised in that this first electrode layer is positioned on this flatness layer, and this first electrode layer and this shielding layer concurrently form.
10. the light sensing unit of a light sensing array, it is characterised in that including:
One substrate, including at least one unit area;
One active member, is positioned at this unit area of this substrate;
One first electrode layer, is positioned at this unit area and is electrically connected with this active member;
One protective layer, covers this active member and this first electrode layer;
One shielding layer, is positioned on this protective layer, and wherein this shielding layer covers this active member;
One light sensing layer, is positioned on this protective layer and is electrically connected with this first electrode layer;And
One the second electrode lay, is positioned on this light sensing layer.
11. the light sensing unit of light sensing array according to claim 10, it is characterised in that more include an obstruct wall, around this active member.
12. the light sensing unit of light sensing array according to claim 11, it is characterised in that this active member includes:
One grid, is positioned on this substrate;
One insulating barrier, is positioned on this grid;
Semi-conductor layer, is positioned on this insulating barrier;
One etch stop layer, is positioned on this semiconductor layer;And
One source electrode and a drain electrode are positioned on this etch stop layer, and this source electrode and this drain electrode contact with this semiconductor layer.
13. the light sensing unit of light sensing array according to claim 12, it is characterised in that this first obstruct wall is arranged in this etch stop layer and this protective layer, and this first obstruct wall is metal material.
14. the light sensing unit of light sensing array according to claim 12, it is characterised in that this first electrode layer is positioned at the lower section of this protective layer, and this first electrode layer belongs to same rete with this source electrode and this drain electrode.
15. the light sensing unit of light sensing array according to claim 14, it is characterised in that this obstruct wall includes one first obstruct wall, this first obstruct wall is positioned at this insulating barrier and this etch stop layer, and this first obstruct walled is around this active member.
16. the light sensing unit of light sensing array according to claim 15, it is characterised in that this first obstruct wall belongs to same rete with this first electrode layer.
17. the light sensing unit of light sensing array according to claim 15, it is characterised in that this obstruct wall includes one second obstruct wall, this second obstruct wall is positioned at this protective layer, and this second obstruct walled is around this active member.
18. the light sensing unit of light sensing array according to claim 17, it is characterised in that this second obstruct wall belongs to same rete with this shielding layer.
19. the light sensing unit of light sensing array according to claim 18, it is characterised in that more include a flatness layer, it is positioned on this protective layer, and this shielding layer is positioned on this flatness layer.
20. the light sensing unit of light sensing array according to claim 19, it is characterised in that this first electrode layer is positioned on this flatness layer, and this first electrode layer and this shielding layer belong to same rete.
21. the light sensing unit of light sensing array according to claim 10, it is characterised in that this shielding layer covers this unit area whole.
22. the light sensing unit of light sensing array according to claim 21, it is characterised in that this light sensing layer of lamination is on this active member.
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