CN107146840A - A kind of flip LED chips array structure and preparation method thereof - Google Patents
A kind of flip LED chips array structure and preparation method thereof Download PDFInfo
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/52—Encapsulations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/64—Heat extraction or cooling elements
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
Abstract
The invention discloses a kind of flip LED chips array structure, including：The transparent substrates being made of clear material, it is arranged at the cushion on the surface of transparent substrates one, it is formed at the N-type semiconductor structure sheaf and P-type semiconductor structure sheaf of cushion, the current-diffusion layer being made of an electrically conducting material, it is arranged above P-type semiconductor structure sheaf, the passivation layer being made up of transparent insulation material, is covered in current-diffusion layer, P-type semiconductor structure sheaf, the top of N-type semiconductor structure sheaf；The multiple N-type electrode window regions arranged in array contacted with N-type semiconductor structure sheaf；The P-type electrode window region contacted with P-type semiconductor structure sheaf；N-type electrode window region is provided with N-type electrode, and the P-type electrode window region is provided with P-type electrode, and P-type electrode is identical with the height of N-type electrode.Increase the luminous effective area of high-power LED chip；Increase effective contact area between chip electrode and heat-radiating substrate, better heat-radiation effect；Improve the service life of chip.
Description
Technical field
The present invention relates to a kind of flip LED chips, more particularly to a kind of flip LED chips array structure and its preparation side
Method.
Background technology
White LED light source is as forth generation green illumination light source, because it has high efficiency, high brightness, small volume, used
Long lifespan, power consumption is low, it is environmentally friendly the advantages of, be expected to the conventional illumination sources such as substitution conventional incandescent, fluorescent lamp, Halogen lamp LED, be
The wide variety of high-quality light source of a new generation, by as the essential illuminations of industry, life.But at present LED core
Piece power is done greatly, and the heat-sinking capability of chip is preferably solved again, is improved chip brightness, is that current great power LED runs into most
Big technical bottleneck.Traditional LED packaged types are all by the way of formal dress, then according to the power demand of light fixture, will each just
The integrated SMT pasters of packaged lamp bead are filled to heat-radiating substrate.Conventional method has the disadvantages that：（1）Each chip will be single
Solely it is packaged into small base to be then affixed on big radiating module, one single chip power is done less, tedious process；（2）Due to using just
Dress mode, current-diffusion layer and metal electrode are all square on the active area, have absorption effects to the light that active area is sent, have 20%-
More than 30% goes out light loss, and light extraction efficiency is low；（3）Positive cartridge chip is by metal lead wire heat conduction, and heat conduction effective area is small, heat conduction
Path length, radiating effect does not have the good heat dissipation effect of flip-chip.
Although also having LED chip flip scheme at present, traditional LED flip-chip schemes have the disadvantages that：
（1）Flip LED chips CURRENT DISTRIBUTION is uneven, and upside-down mounting electrode is single, only one of which P-type electrode one N-type electrode of correspondence, exists
Chip regional area current density is excessive, and the power that the inequality of electric current directly contributes chip is restricted, in high current building ring
Under border, accelerate to shorten the service life of chip；（2）Due to the limitation of power so that the size of LED chip is also restrained, makes
The effective contact area obtained between chip P-type electrode and heat-radiating substrate also diminishes, and radiating effect lifting is limited；（3）Due to chip chi
It is very little to be restricted, want to increase power, multiple LED chips can only be distinguished to face-down bonding on same heat-radiating substrate, added
The triviality of flip chip bonding process；（4）The limitation of chip size causes the cutting increasing number of same epitaxial wafer chip, cutting institute band
The loss come directly affects the effective rate of utilization of product.
The content of the invention
The technical problem existed for above-mentioned prior art, the present invention seeks to：There is provided a kind of flip LED chips array
Structure and preparation method thereof, there is provided single large area P-type electrode, and multiple arrays small area N-type electrode, make chip not
It is size-limited, increase the chip light emitting effective area of great power LED, improve luminosity；Chip electrode is increased with dissipating
Effective contact area between hot substrate, shortens thermally conductive pathways so that chip cooling is better；By setting multiple N-type electricity
Extremely carry out evenly distributing electric current density, it is to avoid chip local current is excessive and causes chip fire damage, improves the use longevity of chip
Life.
The technical scheme is that：
A kind of flip LED chips array structure, including：
One transparent substrates, are made of clear material, with a first surface and a second surface relative with the first surface；
One cushion, is arranged at first surface；
One N-type semiconductor structure sheaf, is formed at cushion；
One P-type semiconductor structure sheaf, is formed at N-type semiconductor structure sheaf；
One current-diffusion layer, is made of an electrically conducting material, and is arranged above P-type semiconductor structure sheaf；
One passivation layer, is made up of transparent insulation material, is covered in current-diffusion layer, P-type semiconductor structure sheaf, N-type semiconductor knot
The top of structure layer；
The multiple N-type electrode window regions contacted with N-type semiconductor structure sheaf, the N-type electrode window region is arranged in array；
The P-type electrode window region contacted with P-type semiconductor structure sheaf；
The N-type electrode window region is provided with N-type electrode, and the P-type electrode window region is provided with P-type electrode, the P-type electrode
It is identical with the height of N-type electrode.
It is preferred that, the transparent substrates are synthesized by the one or more in sapphire, gallium nitride, aluminium nitride.
It is preferred that, the current-diffusion layer is from silver, indium tin oxide（ITO）, fluorine tin-oxide, chromium tin-oxide, stone
One or more kinds of synthesis in black alkene.
It is preferred that, the material of the passivation layer is silica, silicon nitride, silicon oxynitride, the one or more of aluminum oxide
Synthesis.
It is preferred that, the P-type electrode and N-type electrode are inverted on package substrate, and the package substrate includes welding region
Metal interconnection circuit layer, insulating barrier and heat-radiating substrate.
The invention also discloses a kind of preparation method of flip LED chips array structure, comprise the following steps：
（1）In the surface of transparent substrates successively epitaxial growth buffer, N-type semiconductor structure sheaf and P-type semiconductor structure sheaf；
（2）In the multiple N-type region windows of surface etch, the N-type region window is arranged in array；
（3）Current-diffusion layer is prepared by mask, sputtering, the method peeled off with conductive material；
（4）Pass through plasma activated chemical vapour deposition with transparent insulation material（PECVD）Method deposition prepare passivation layer；
（5）P-type electrode window region and N-type electrode window region are prepared, the P-type electrode window region joins together；
（6）P-type electrode and N-type electrode are prepared in corresponding electrode window mouth region.
It is preferred that, the transparent substrates are synthesized by the one or more in sapphire, gallium nitride, aluminium nitride.
It is preferred that, the current-diffusion layer is from silver, indium tin oxide（ITO）, fluorine tin-oxide, chromium tin-oxide, stone
One or more kinds of synthesis in black alkene.
It is preferred that, the material of the passivation layer is silica, silicon nitride, silicon oxynitride, the one or more of aluminum oxide
Synthesis.
It is preferred that, in addition to, P-type electrode and N-type electrode are inverted on package substrate, the package substrate includes welding
Metal interconnection circuit layer, insulating barrier and the heat-radiating substrate in region, phosphor powder layer is prepared on another surface of transparent substrates.
Compared with prior art, it is an advantage of the invention that：
The present invention be provided with single large area P-type electrode, and multiple arrays small area N-type electrode, the electric current of whole chip
Density Distribution is uniform, and the power of chip is improved by changing the size and electrode structure of chip, while by the way of upside-down mounting,
Whole flip-chip is connected on heat-radiating substrate, because P-type electrode is that large area is continuous, makes chip electrode and heat-radiating substrate
Laminating effective area greatly increase, thermally conductive pathways are also greatly shortened, and the heat of active area can be quick by chip electrode
Heat-radiating substrate is oriented to, is effectively radiated, on the other hand due to being upside-down mounting, whole exiting surface is in non-electrical pole-face, and light extraction is effective
Area is greatly improved, and improves external quantum efficiency.
Flip chip bonding process is simple, and the cutting quantity of same epitaxial wafer chip is few, increases the effective rate of utilization of product.
Brief description of the drawings
Below in conjunction with the accompanying drawings and embodiment the invention will be further described：
Fig. 1 is the flow chart of the preparation method of flip LED chips array structure of the present invention；
Fig. 2 is the structural representation of substrate epitaxial piece in the present invention；
Fig. 3 is the structural representation of N-type region window in the present invention；
Fig. 4 is passivation layer, the structural representation of current-diffusion layer in the present invention；
Fig. 5 is P-type electrode window region, the structural representation of N-type electrode window region in the present invention；
Fig. 6 is P electrode, the structural representation of N electrode in the present invention；
Fig. 7 is the structure top view of the big module of LED chip in the present invention；
Fig. 8 is the flip-chip bonded structure schematic diagram of the big module of LED chip in the present invention.
Embodiment
To make the object, technical solutions and advantages of the present invention of greater clarity, with reference to embodiment and join
According to accompanying drawing, the present invention is described in more detail.It should be understood that these descriptions are merely illustrative, and it is not intended to limit this hair
Bright scope.In addition, in the following description, the description to known features and technology is eliminated, to avoid unnecessarily obscuring this
The concept of invention.
Embodiment：
As shown in figure 1, the preparation method of flip LED chips array structure, comprises the following steps：
（1）Given birth to from a kind of or above material multiple elements design body in sapphire, gallium nitride, aluminium nitride material as extension
Long transparent substrates 1.
（2）In the surface of transparent substrates 1 successively epitaxial growth buffer 2, N-type GaN semiconductor structure layers 3 and p-type GaN half
Conductor structure layer 4, obtains substrate epitaxial piece, as shown in Figure 2.
（3）Go out multiple N-type regions in extension structure sheaf surface etch using semiconductor process techniques such as photoetching, development, etchings
Window 5, multiple small area N-type region windows 5 are arranged in array, as shown in Figure 3.
（4）Current-diffusion layer 6 is prepared with methods such as mask, sputtering, strippings, because the area of N-type region window 5 all compares
It is smaller, it is not necessary to carry out current expansion, therefore N-type region window 5 can not cover current-diffusion layer 6.The effect of current-diffusion layer 6
It is to make chip current Density Distribution uniform, the current-diffusion layer is from silver, indium tin oxide（ITO）, fluorine tin-oxide, chromium tin
One or more kinds of synthetic materials in the good conductive material of the Ohmic contacts such as oxide, graphene.
（5）Use plasma activated chemical vapour deposition（PECVD）Method deposition prepare passivation layer 7, passivation layer 7 is covered each by
It is arranged at current-diffusion layer 6, p-type GaN semiconductor structure layers 4, the top of N-type GaN semiconductor structure layers 3.The effect of passivation layer 7
It is to prevent electric leakage, plays a part of protective layer, the material of passivation layer is saturating for silica, silicon nitride, silicon oxynitride, aluminum oxide etc.
Bright insulating materials.As shown in Figure 4.
（6）The system of P-type electrode window region 8 and N-type electrode window region 9 is carried out using techniques such as photoetching, development, wet etchings
It is standby.P-type electrode window region 8 is preferably joined together, and multiple small area N-type electrode window regions 9 are arranged in array.Such as Fig. 5 institutes
Show.
（7）The related process such as deposited by electron beam evaporation, metal-stripping prepare P-type electrode 10 and N-type electrode 11, the p-type electricity
The material of pole 10 and N-type electrode 11 is a kind of or many in the metal materials such as chromium, platinum, gold, nickel, titanium, copper, indium, tin, lead, silver
Plant synthetic.The height of P-type electrode 10 and N-type electrode 11 is preferably identical.Then the process of annealed alloy is used, makes each gold
Belong to interlayer formation Ohmic contact.As shown in Figure 6.
Fig. 7 is the structure top view of the big module of whole LED chip in the present invention, by the N electrode 11 and list of multiple small areas
The P electrode 10 of individual large area constitutes the negative, positive electrode of whole chip, be between N electrode 11 and P electrode 10 by passivation layer 7 every
Leave what is come, passivation layer 7 plays the function of preventing that chip from leaking electricity, with protective effect.
The big module of whole LED chip is mounted to the radiating for being provided with metal interconnection circuit layer 12 with the method for flip chip bonding
On substrate 13, as shown in Figure 8.Attaching method in flip chip bonding has eutectic alloy technique, BGA to plant ball technique, tin cream silk-screen printing
Technique, the present invention is using one kind in the above method, preferential use eutectic alloy technique.Solder 14 in eutectic alloy technique
For one or more polynary synthetics in gold, indium, lead, silver, tin.It is exhausted by circuit isolation between metal interconnection circuit layer 12
What edge layer 15 and insulating barrier 16 were kept apart.Then phosphor powder layer 17, fluorescent material are prepared in the big module exiting surface of whole LED chip
The preparation of layer 17, can be prepared by way of spraying, rotation, printing.The super of high brightness can be prepared by the above method
Large power white light LED.
Super high power white light LEDs prepared by the inventive method, according to chip size can design work(according to power demand
The size of rate, emitting brightness is higher, using the structure of flip chip bonding, and radiating effect more preferably, is adapted to large-scale mass production, can be extensive
Applied to semiconducting solid lighting field.
It should be appreciated that the above-mentioned embodiment of the present invention is used only for exemplary illustration or explains the present invention's
Principle, without being construed as limiting the invention.Therefore, that is done without departing from the spirit and scope of the present invention is any
Modification, equivalent substitution, improvement etc., should be included in the scope of the protection.In addition, appended claims purport of the present invention
Covering the whole changes fallen into scope and border or this scope and the equivalents on border and repairing
Change example.
Claims (10)
1. a kind of flip LED chips array structure, it is characterised in that including：
One transparent substrates, are made of clear material, with a first surface and a second surface relative with the first surface；
One cushion, is arranged at first surface；
One N-type semiconductor structure sheaf, is formed at cushion；
One P-type semiconductor structure sheaf, is formed at N-type semiconductor structure sheaf；
One current-diffusion layer, is made of an electrically conducting material, and is arranged above P-type semiconductor structure sheaf；
One passivation layer, is made up of transparent insulation material, is covered in current-diffusion layer, P-type semiconductor structure sheaf, N-type semiconductor knot
The top of structure layer；
The multiple N-type electrode window regions contacted with N-type semiconductor structure sheaf, the N-type electrode window region is arranged in array；
The P-type electrode window region contacted with P-type semiconductor structure sheaf；
The N-type electrode window region is provided with N-type electrode, and the P-type electrode window region is provided with P-type electrode, the P-type electrode
It is identical with the height of N-type electrode.
2. flip LED chips array structure according to claim 1, it is characterised in that the transparent substrates by sapphire,
One or more kinds of synthesis in gallium nitride, aluminium nitride.
3. flip LED chips array structure according to claim 1, it is characterised in that the current-diffusion layer selection silver,
Indium tin oxide（ITO）, fluorine tin-oxide, chromium tin-oxide, one or more kinds of synthesis in graphene.
4. flip LED chips array structure according to claim 1, it is characterised in that the material of the passivation layer is two
Silica, silicon nitride, silicon oxynitride, one or more synthesis of aluminum oxide.
5. flip LED chips array structure according to claim 1, it is characterised in that the P-type electrode and N-type electrode
It is inverted on package substrate, the package substrate includes metal interconnection circuit layer, insulating barrier and the heat-radiating substrate of welding region.
6. a kind of preparation method of flip LED chips array structure, it is characterised in that comprise the following steps：
（1）In the surface of transparent substrates successively epitaxial growth buffer, N-type semiconductor structure sheaf and P-type semiconductor structure sheaf；
（2）In the multiple N-type region windows of surface etch, the N-type region window is arranged in array；
（3）Current-diffusion layer is prepared by mask, sputtering, the method peeled off with conductive material；
（4）Pass through plasma activated chemical vapour deposition with transparent insulation material（PECVD）Method deposition prepare passivation layer；
（5）P-type electrode window region and N-type electrode window region are prepared, the P-type electrode window region joins together；
（6）P-type electrode and N-type electrode are prepared in corresponding electrode window mouth region.
7. the preparation method of flip LED chips array structure according to claim 6, it is characterised in that the transparent lining
Bottom is synthesized by the one or more in sapphire, gallium nitride, aluminium nitride.
8. the preparation method of flip LED chips array structure according to claim 6, it is characterised in that the electric current expands
Dissipate layer choosing silver, indium tin oxide（ITO）, fluorine tin-oxide, chromium tin-oxide, one or more kinds of synthesis in graphene.
9. the preparation method of flip LED chips array structure according to claim 6, it is characterised in that the passivation layer
Material be silica, one or more synthesis of silicon nitride, silicon oxynitride, aluminum oxide.
10. the preparation method of flip LED chips array structure according to claim 6, it is characterised in that also include, by P
Type electrode and N-type electrode are inverted on package substrate, and the package substrate includes the metal interconnection circuit layer of welding region, insulation
Layer and heat-radiating substrate, phosphor powder layer is prepared on another surface of transparent substrates.
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Application publication date: 20170908 |