1317162 > ^ 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種發光二極體（Light Emitting Diode, LED)之封裝結構，尤其是關於一種具有高散熱效率之覆 晶式LED封裝結構及其封裝方法。 « ' 【先前技術】 鲁 led光源由於具有體積小、耗電量低、使用壽命長等 特性，在可預見的未來，將可取代目前燈泡或日光燈源等 照明設備或其他顯示裝置之發光源，而成為最重要之發光 元件。然而’為提高發光源之整體亮度，勢必要提高發光 功率或增加LED裝設之數目或密度，但如此設置將大幅 ' 增加LED光源之產熱量，若該些熱量無法儘速導出，將 - 嚴重影響led之發光亮度，同時加速LED之劣化狀況而 減短使用壽命。1317162 > ^ IX. Description of the Invention: [Technical Field] The present invention relates to a package structure of a light emitting diode (LED), and more particularly to a flip chip LED package with high heat dissipation efficiency Structure and its packaging method. « ' [Previous technology] Lu led light source, due to its small size, low power consumption and long service life, will replace the current lighting source of lighting devices such as bulbs or fluorescent lamps or other display devices for the foreseeable future. And become the most important light-emitting element. However, in order to improve the overall brightness of the light source, it is necessary to increase the luminous power or increase the number or density of LED installations, but this setting will greatly increase the heat generated by the LED light source. If the heat cannot be exported as quickly as possible, it will be severe. Affect the brightness of led light, while accelerating the deterioration of LED and shortening the service life.
Φ 為改善LED之散熱效率，曾有如第—圖所示之LED 封裝結構。該習知創作中，1^〇1〇係藉由共晶（61^(：如） 結合方式形成一共晶層30而與铭基板2〇相接合。铭基板 . 20表面預定區域内分別形成有一絕緣層21，該絕緣層21 表面再形成一銲墊22’各銲墊22則分別與第—電極u與 第二電極12以導接線23電性相連接。前述方式雖然可藉 由共晶層30將LED 10所產生之熱量以傳導方式，透過鋁 基板20傳出來增加散熱效率，但因藍寶石層13之阻礙， 致使散熱效果不如理想，且該種封裝方式，第一電極u 5 1317162 與第二電極12皆位於LED 1〇發光層之上方，將遮蔽部分 的出射光’對於LED 10之發光面積有著相當程度的縮 減’而影響其發光效率。 ’’ 因此，為避免前述缺失，即產生如第二圖所示以覆晶 (flip chip )接合方式進行封裝之創作。其中，1 〇係 倒置後與印刷電路板4〇相接合。印刷電路板4〇係於表面 預定位置分別設有一銲墊41，銲墊41並與印刷電路板仞 中之導接線42電性相連接。 1〇接合日夺，係藉由金屬 凸塊43分別將第一電極u與第二電極丨2與銲墊4丨相連 接。以此賴方式雖可改善前述光麵所產生發光效率減 少之缺點’但LED 10所產生之缝卻僅可透過金屬凸塊 43傳導至印刷電路板4〇，一方面傳導之接觸面積小，一 方面印刷電路板40之導熱率有限，並無法使LEDl〇整體 散熱效率能財效改善’因而仍存有前述LED劣化與因 受高溫而使光度縮減之缺失。 【發明内容】 • ^改善1知封裝時發光效率之不足，同時提升Φ In order to improve the heat dissipation efficiency of the LED, there is an LED package structure as shown in the first figure. In the conventional creation, 1^〇1〇 is formed by eutectic (61^(:) bonding method to form a eutectic layer 30 and bonded to the substrate 2。. The insulating layer 21, the surface of the insulating layer 21 is further formed with a solder pad 22'. The solder pads 22 are electrically connected to the first electrode u and the second electrode 12 via the conductive wires 23. The foregoing manner can be performed by a eutectic layer. 30, the heat generated by the LED 10 is transmitted through the aluminum substrate 20 to increase the heat dissipation efficiency, but the heat dissipation effect is not satisfactory due to the hindrance of the sapphire layer 13, and the first electrode u 5 1317162 and the first package The two electrodes 12 are located above the LED 1 〇 illuminating layer, and the illuminating light of the shielding portion has a considerable degree of reduction for the illuminating area of the LED 10 to affect its luminous efficiency. '' Therefore, in order to avoid the aforementioned deficiency, The second figure shows the creation of a package by flip chip bonding, in which the 〇 is inverted and bonded to the printed circuit board 4 。. The printed circuit board 4 is provided with a pad at a predetermined position on the surface. 41, welding 41 is electrically connected to the conductive wire 42 in the printed circuit board, and the first electrode u and the second electrode 丨2 are respectively connected to the bonding pad 4 by the metal bumps 43. In this way, although the disadvantage of reducing the luminous efficiency caused by the above-mentioned smooth surface can be improved, the slit generated by the LED 10 can only be transmitted to the printed circuit board 4 through the metal bumps 43, and the conductive contact area is small on the one hand. In view of the fact, the thermal conductivity of the printed circuit board 40 is limited, and the overall heat dissipation efficiency of the LEDs cannot be improved. Thus, there is still a lack of the aforementioned LED degradation and a loss of luminosity due to high temperature. [Summary of the Invention] Insufficient luminous efficiency during packaging, while improving
’ LED之散熱效率’本發明將提供〜種以覆日日日技術將LED 以共晶方式與導熱基板相結合之封裝結構與封裝方法，使 LED發光部分不受侷限，㈣轉最佳之發級率，並同 日杨，所產生之熱量續大之接觸㈣與熱傳導效率，傳 導至高導熱餘之導祕板上，俾能大巾談高LED之散 熱效能，使LED避免處於高溫之下，而增加哪之使用 6 、1317162 壽命，並能進一步提高LED之發光亮度。'LED heat dissipation efficiency' The present invention will provide a package structure and a package method for combining LEDs with a heat conductive substrate by a day-to-day technology, so that the LED light-emitting portion is not limited, and (4) the best hair The rate, and the same day, Yang, the heat generated by the continuous contact (four) and heat conduction efficiency, conduction to the high thermal conductivity of the guide board, can talk about the high heat dissipation performance of the LED, so that the LED is avoided at high temperatures, and Increase the use of 6, 1317162 life, and can further improve the brightness of the LED.
本發明覆晶式發光二極體封裝結構’包括：一導熱基 板，該導熱基板表面於―預定區域_成有—絕緣層，該 絕緣層表®並形成有—銲塾；以及—LED，該led係呈 覆曰s方式接合於該導熱基板上，該LED包括有一第一電 極與-第二電極，該第―電極與該導熱基板間共晶結合有 -共晶層而電性相連接，而該第二電極則與該銲墊電性相 連接。共sa層可先於該導熱基板上該第—電極相對應處鑛 上有鍵金層後’再與該第—電極加熱共晶所形成丨其亦 可於該導熱基板上該第一電極相對應處與該第一電極間 夾設-金片’再加熱共晶所形成。#中，該導熱基板係一 鋁（A1)板、銅（Cu)板、氮化鋁（A1N)或其他高導熱 係數之金屬或介質層’但並不僅限於此。 藉由本發明之封裝結構，LED發光層所發散之光線不 會受到電極之遮蔽，故有較佳之發光效率。且其所產生之 熱能得藉由較大接觸面積之共晶層直接導出，而無庸再如 習知透過導熱係數較差之藍寶石層傳遞，故能迅速將熱能 傳導至高導熱係數之導熱基板上，使lED溫度能夠儘= 降低，因而使得LED不但能夠維持較佳之發光致率，= 有最佳之導熱散熱效率。 ” 以下將配合圖式進一步說明本發明的實施方式，、 所列舉的實施例係用以闡明本發明，並非用以限定本 之範圍，任何熟習此技藝者，在不脫離本發明之精神^ # 圍内，當可做些許更動與潤飾，因此本發明之保護〜° = 7 1317162 雜附之巾請專利範®所界定者為準。 【實施方式】 "月’、閱第二® ’該圖係本發明實施例之示意圖。本發 “日日式&光—極體封裝結構，包括-LED 50與-導熱 基板60，該LED 50係以覆晶方式封裂於導熱基板6〇上。 LED 50 ’其包括一第一電極51與一第二電極52，第 • 一電極51與第二電極52係位於LED 50表面之同側。該 一包極可利用物理蒸鍍（Physical Vap〇r Dep〇siti〇n，pVD ) 方式鍍上鈦（Τι)、鋁或金（Au)等金屬層，再經金屬融 合所製成。在一般氮化鎵（GaN) lED晶粒上，第一電極 51可與p型氮化鎵（p-GaN)層電性相連結接而為p型電 極，而第二電極52則可與n型氮化鎵（n+GaN)層電性 相連結接而為N型電極’電極設置方式於此僅為例示，並 不限於前述。此外，為配合本發明覆晶接合方式，第一電 • 極51於蒸鍍形成時可擴大其面積並配合厚度之調整，使 將來共晶接合時，第一電極51與第二電極52能夠緊密接 • 合於導熱基板60上，並同時有較大的接觸面積。藉由第 ， 一電極51與第二電極52與電流之導通，即可於LED 50 内產生亮光。 導熱基板60，其係一高導熱係數之鋁板（231 W/m.K)、銅板（385 W/m.K)或氮化鋁（320 W/m.K)板， 但並不僅限於此，其導熱係數於室溫下可達100 W/m.K以 上者為較佳。導熱基板60於本發明覆晶結合方式中，除 8 1317162 • ^導熱散熱功能外，尚須能夠導電，故該導熱基板6〇亦 需―導電性佳之材質，前述數種材質中則以銘板、銅板為 較佳。導熱基板60與LED 50接合前，先於導熱基板60 ，面上與第二電極52相對應之預定定義區域内形成一絕 - 緣層61。絕緣層61可利用二氧化矽（Si〇2)或氮化矽 、 （Sl3N4)以化學氣相沈積（Chemical Vapor Deposition, CVD)沈積於導熱基板6〇表面，而沈積所利用之材質與 • 方式並不僅限於前述。而後，再於絕緣層61表面形成一 =屬材質的銲墊62，作為與第二電極52電性相連接之介 質層。由於第一電極51已與具導電性之導熱基板6〇電性 相連接，故無須進行打線，而第二電極52則可藉由與銲 墊62之電性連接，打線於銲墊62上，而形成電流導通之 ' 狀態。 ^ LED 5〇以覆晶方式接合於導熱基板60時，第二電極The flip-chip LED package structure of the present invention includes: a heat-conducting substrate having a surface formed in a predetermined region _ an insulating layer, and the insulating layer is formed with a solder bump; and - LED, The LED is bonded to the thermally conductive substrate in a manner of a 曰 s, the LED includes a first electrode and a second electrode, and the eutectic layer is electrically coupled to the thermally conductive substrate. The second electrode is electrically connected to the pad. The common sa layer may be formed on the thermally conductive substrate by having a bond gold layer on the corresponding electrode of the first electrode and then heating the eutectic with the first electrode. The first electrode phase may also be formed on the thermally conductive substrate. A corresponding portion is formed between the first electrode and a gold piece to reheat the eutectic. In the #, the thermally conductive substrate is an aluminum (A1) plate, a copper (Cu) plate, an aluminum nitride (A1N) or other metal or dielectric layer having a high thermal conductivity, but is not limited thereto. With the package structure of the present invention, the light diverging from the LED light-emitting layer is not shielded by the electrodes, so that the light-emitting efficiency is better. And the thermal energy generated by the eutectic layer of the larger contact area is directly derived, and it is no longer known to transmit through the sapphire layer having a poor thermal conductivity, so that the thermal energy can be quickly transferred to the thermally conductive substrate having a high thermal conductivity. The lED temperature can be reduced as much as possible, so that the LED not only maintains a good luminescence rate, but also has the best heat dissipation efficiency. The embodiments of the present invention are further described in conjunction with the drawings, which are set forth to illustrate the invention, and are not intended to limit the scope of the present invention. In the enclosure, when some changes and retouching can be made, the protection of the present invention ~° = 7 1317162 is attached to the patent specification. [Embodiment] "Monthly, read second® The figure is a schematic diagram of an embodiment of the present invention. The present invention relates to a "Japanese-style & light-pole package structure, including -LED 50 and a heat-conducting substrate 60, which is encapsulated on a thermally conductive substrate 6 in a flip chip manner. . The LED 50' includes a first electrode 51 and a second electrode 52, and the first electrode 51 and the second electrode 52 are located on the same side of the surface of the LED 50. The package can be plated with a metal layer such as titanium (Τι), aluminum or gold (Au) by physical vapor deposition (Physical Vap〇r Dep〇siti〇n, pVD) and then metal-fused. In a general gallium nitride (GaN) lED die, the first electrode 51 can be electrically connected to a p-type gallium nitride (p-GaN) layer to be a p-type electrode, and the second electrode 52 can be combined with n. The type in which the gallium nitride (n+GaN) layer is electrically connected and the N-type electrode is provided is merely an example, and is not limited to the above. Further, in order to cooperate with the flip chip bonding method of the present invention, the first electrode 51 can be enlarged in area during vapor deposition and adjusted in thickness, so that the first electrode 51 and the second electrode 52 can be tightly bonded in the future eutectic bonding. It is connected to the heat-conducting substrate 60 and has a large contact area at the same time. By the conduction of the first electrode 51 and the second electrode 52 with the current, bright light can be generated in the LED 50. The heat conductive substrate 60 is a high thermal conductivity aluminum plate (231 W/mK), copper plate (385 W/mK) or aluminum nitride (320 W/mK) plate, but is not limited thereto, and its thermal conductivity is at room temperature. It is better to be able to reach 100 W/mK or more. In the flip chip bonding mode of the present invention, in addition to the thermal conduction function of the 8 1317162 • ^, it is required to be electrically conductive, so the thermally conductive substrate 6〇 also needs a material with good conductivity, and among the above several materials, the nameplate, Copper plates are preferred. Before the thermally conductive substrate 60 is bonded to the LED 50, a permanent edge layer 61 is formed in a predetermined defining region corresponding to the second electrode 52 on the surface of the thermally conductive substrate 60. The insulating layer 61 can be deposited on the surface of the thermally conductive substrate 6 by chemical vapor deposition (CVD) using cerium oxide (Si〇2) or tantalum nitride (Sl3N4), and the materials and methods used for deposition. It is not limited to the foregoing. Then, a pad 62 of a genus material is formed on the surface of the insulating layer 61 as a dielectric layer electrically connected to the second electrode 52. Since the first electrode 51 is electrically connected to the conductive substrate 6 , it is not necessary to perform wire bonding, and the second electrode 52 can be electrically connected to the pad 62 by wire bonding to the pad 62 . And the state of the current conduction is formed. ^ When the LED 5 覆 is flip-chip bonded to the thermally conductive substrate 60, the second electrode
52可與銲墊62電性相連接，而第一電極51則與導熱基板 φ 相對應表面間同時共晶接合有一共晶層63。因此，LED 5〇所產生之南熱可經由第一電極51並透過共晶層63直接 傳導至具高導熱係數之導熱基板60上，迅速將熱量加以 散逸，而能夠維持LED 50適當的溫度。相較於習知技術， 利用覆晶方式封裝除可使LED 50有較大發光面積外，最 重要的是可將LED 50發光層所產生之熱量直接由較接近 之共晶層63導出，而無庸再如習知透過導熱係數較差之 藍寶石層53，故能明顯提升其導熱性。另一方面，透過大 面積共晶層之接觸傳導，亦能增加導熱速率，而大幅改善 9 *1317162 ， 金屬凸塊導熱速率不足之缺點。 接人二Β曰層30形成之方式請參閱第四圖與第五圖。共晶 則可先於導熱基板60上該第一電極η相對應處鐘上 -此又金層631，再與該第—電極51於適當溫度處理下進 晶接合。此外，其亦可於導熱基板60上該第-電極 、 —相對應處與該第一電極51間夾設一金片632 (請參閱 第五圖），再於適當溫度處理下進行共晶接合。當第一電 • 極51具鋼金屬層時’則可形成一銅/金或銅/金/鋁之共晶層 63 °共晶接合所使用之金屬與方法，並不限於前述，但以 導熱係數較高之金屬為較佳。 【圖式簡單說明】 第一圖係習知LED封裝結構之示意圖。 第二圖係習知覆晶式LED封裝結構之示意圖。 ^ 第三圖係本發明實施例之示意圖。 第四圖係本發明封裝方法實施例之示意圖。 第五圖係本發明另一封裝方法實施例之示意圖。 【主要元件符號說明】52 may be electrically connected to the pad 62, and the first electrode 51 is simultaneously eutectic bonded to the surface of the thermally conductive substrate φ to have a eutectic layer 63. Therefore, the south heat generated by the LED 5 can be directly transmitted to the heat conductive substrate 60 having a high thermal conductivity through the first electrode 51 and through the eutectic layer 63, and the heat can be quickly dissipated to maintain the proper temperature of the LED 50. Compared with the prior art, the flip-chip package can make the LED 50 have a larger light-emitting area, and the most important thing is that the heat generated by the LED 50 light-emitting layer can be directly derived from the closer eutectic layer 63. It is no longer necessary to pass through the sapphire layer 53 having a poor thermal conductivity, so that the thermal conductivity can be significantly improved. On the other hand, the contact conduction through the large-area eutectic layer can also increase the thermal conductivity rate, and greatly improve the shortcomings of 9 * 1317162, the metal bump heat conduction rate is insufficient. Please refer to the fourth and fifth figures for the way in which the second layer 30 is formed. The eutectic may be preceded by the first electrode η corresponding to the first electrode η on the thermally conductive substrate 60 - the gold layer 631 is further bonded to the first electrode 51 under appropriate temperature treatment. In addition, a gold piece 632 may be interposed between the first electrode and the first electrode 51 on the heat conducting substrate 60 (refer to FIG. 5), and then eutectic bonding is performed under appropriate temperature treatment. . When the first electrode 51 has a steel metal layer, the metal and method used for forming a copper/gold or copper/gold/aluminum eutectic layer 63° eutectic bonding are not limited to the foregoing, but are thermally conductive. A metal having a higher coefficient is preferred. [Simple Description of the Drawings] The first figure is a schematic diagram of a conventional LED package structure. The second figure is a schematic diagram of a conventional flip-chip LED package structure. The third figure is a schematic diagram of an embodiment of the present invention. The fourth figure is a schematic diagram of an embodiment of the packaging method of the present invention. The fifth figure is a schematic diagram of another embodiment of the packaging method of the present invention. [Main component symbol description]
10 LED 11 第一電極 12 第二電極 13 藍寶石層 1317162 20 鋁基板 21 絕緣層 22 銲墊 23 導接線 30 共晶層 40 印刷電路板 41 銲墊 42 導接線 43 金屬凸塊 50 LED 51 第一電植 52 第二電極 53 藍寶石層 60 導熱基板 61 絕緣層 62 銲墊 63 共晶層 631 鑛金層 632 金片10 LED 11 First electrode 12 Second electrode 13 Sapphire layer 1317162 20 Aluminum substrate 21 Insulation layer 22 Pad 23 Conductor wire 30 Eutectic layer 40 Printed circuit board 41 Solder pad 42 Conductor wire 43 Metal bump 50 LED 51 First power Plant 52 second electrode 53 sapphire layer 60 heat conductive substrate 61 insulating layer 62 pad 63 eutectic layer 631 gold layer 632 gold piece