CN107134514B - A kind of epitaxial wafer and its manufacturing method of light emitting diode - Google Patents
A kind of epitaxial wafer and its manufacturing method of light emitting diode Download PDFInfo
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- CN107134514B CN107134514B CN201710326217.5A CN201710326217A CN107134514B CN 107134514 B CN107134514 B CN 107134514B CN 201710326217 A CN201710326217 A CN 201710326217A CN 107134514 B CN107134514 B CN 107134514B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
- H01L33/145—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
- H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
- H01L33/325—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen characterised by the doping materials
Abstract
The invention discloses a kind of epitaxial wafer of light emitting diode and its manufacturing methods, belong to technical field of semiconductors.Epitaxial wafer includes substrate, buffer layer, undoped gallium nitride layer, n type gallium nitride layer, multiple quantum well layer, electronic barrier layer and p-type gallium nitride layer, multiple quantum well layer includes multiple first sublayers being sequentially laminated on n type gallium nitride layer, each first sublayer includes quantum well layer and the quantum barrier layer that is arranged on quantum well layer, quantum well layer is indium gallium nitrogen layer, electronic barrier layer includes multiple second sublayers being sequentially laminated on multiple quantum well layer, each second sublayer includes the high temperature barrier layer stacked gradually, energy band modulating layer and low temperature provide layer, high temperature barrier layer is gallium nitride layer, energy band modulating layer is indium gallium nitrogen layer, content of the content of indium component lower than indium component in quantum well layer in energy band modulating layer, low temperature provides the gallium nitride layer that layer is p-type doping.The present invention can increase the number of cavities of injection multiple quantum well layer recombination luminescence.
Description
Technical field
The present invention relates to technical field of semiconductors, in particular to the epitaxial wafer and its manufacturing method of a kind of light emitting diode.
Background technique
Using the light emitting diode (English: Light Emitting Diode, abbreviation LED) of gallium nitride material manufacture, tool
There are good characteristics, emission wavelength covering visible light and the ultraviolet lights such as big forbidden bandwidth, high temperature resistant and high power capacity, emerging
There is vast prospect in opto-electronics.
Epitaxial wafer is the primary finished product of light emitting diode manufacture, and existing epitaxial wafer mainly includes n type gallium nitride layer, volume
Sub- trap (English: Multiple Quantum Well, abbreviation: MQW) layer and p-type gallium nitride layer.Wherein, multiple quantum well layer includes
Multiple indium gallium nitrogen layers and multiple gallium nitride layers, multiple indium gallium nitrogen layers and the alternately laminated setting of multiple gallium nitride layers.It is nitrogenized when to N-type
When gallium layer and p-type gallium nitride layer apply voltage, volume is injected in the hole in electronics and p-type gallium nitride layer in n type gallium nitride layer
Sub- well layer recombination luminescence.
P-type dopant in p-type gallium nitride layer generallys use magnesium, but solid solubility of the magnesium in p-type gallium nitride layer is low, and magnesium replaces
Activation energy needed for changing hole is again high, and the hole that magnesium is replaced out in p-type gallium nitride layer is limited, and p-type gallium nitride layer is caused to inject
The number of cavities of multiple quantum well layer greatly limits luminous much smaller than the electron amount of n type gallium nitride layer injection multiple quantum well layer
The luminous efficiency of diode.
Summary of the invention
In order to which the number of cavities for solving prior art p-type gallium nitride layer injection multiple quantum well layer is few, limitation luminous two significantly
The problem of luminous efficiency of pole pipe, the embodiment of the invention provides a kind of epitaxial wafer of light emitting diode and its manufacturing methods.Institute
It is as follows to state technical solution:
On the one hand, the embodiment of the invention provides a kind of epitaxial wafer of light emitting diode, the epitaxial wafer include substrate with
And stack gradually buffer layer, undoped gallium nitride layer, n type gallium nitride layer, multiple quantum well layer, electronic blocking over the substrate
Layer and p-type gallium nitride layer, the multiple quantum well layer includes multiple first sublayers being sequentially laminated on the n type gallium nitride layer,
Each first sublayer includes quantum well layer and the quantum barrier layer that is arranged on the quantum well layer, and the quantum well layer is indium
Gallium nitrogen layer, the electronic barrier layer include multiple second sublayers being sequentially laminated on the multiple quantum well layer, and each described
Two sublayers include that the high temperature barrier layer stacked gradually, energy band modulating layer and low temperature provide layer, and the high temperature barrier layer is aluminum gallium nitride
Layer, the energy band modulating layer are indium gallium nitrogen layer, and the content of indium component is lower than indium in the quantum well layer in the energy band modulating layer
The content of component, the low temperature provide the gallium nitride layer that layer is p-type doping.
Optionally, the content of aluminium component is equal in multiple high temperature barrier layers in the electronic barrier layer, Huo Zhesuo
The content for stating aluminium component in multiple high temperature barrier layers in electronic barrier layer successively subtracts along the stacking direction of the epitaxial wafer
It is small.
Optionally, the thickness on multiple high temperature barrier layers in the electronic barrier layer is equal or electronics resistance
The thickness on multiple high temperature barrier layers in barrier successively reduces along the stacking direction of the epitaxial wafer.
Optionally, the content of indium component is equal in multiple energy band modulating layers in the electronic barrier layer, Huo Zhesuo
The content for stating indium component in multiple energy band modulating layers in electronic barrier layer successively increases along the stacking direction of the epitaxial wafer
Greatly.
Optionally, the thickness of multiple energy band modulating layers in the electronic barrier layer is equal or electronics resistance
The thickness of multiple energy band modulating layers in barrier successively reduces along the stacking direction of the epitaxial wafer.
Optionally, multiple low temperature in the electronic barrier layer provide the thickness of layer along the stacking side of the epitaxial wafer
Increase to layer-by-layer.
Optionally, the concentration that multiple low temperature in the electronic barrier layer provide P-type dopant in layer is equal.
On the other hand, the embodiment of the invention provides a kind of manufacturing method of the epitaxial wafer of light emitting diode, the manufactures
Method includes:
One substrate is provided；
Successively grown buffer layer, undoped gallium nitride layer, n type gallium nitride layer, multiple quantum well layer, electronics over the substrate
Barrier layer and p-type gallium nitride layer；
Wherein, the multiple quantum well layer includes multiple first sublayers being sequentially laminated on the n type gallium nitride layer, each
First sublayer includes quantum well layer and the quantum barrier layer that is arranged on the quantum well layer, and the quantum well layer is indium gallium nitrogen
Layer；The electronic barrier layer includes multiple second sublayers being sequentially laminated on the multiple quantum well layer, each second son
Layer includes that the high temperature barrier layer stacked gradually, energy band modulating layer and low temperature provide layer, and the high temperature barrier layer is gallium nitride layer, institute
Stating energy band modulating layer is indium gallium nitrogen layer, and the content of indium component is lower than indium component in the quantum well layer in the energy band modulating layer
Content, the low temperature provide the gallium nitride layer that layer is p-type doping.
Optionally, in same second sublayer, the growth temperature on the high temperature barrier layer is provided than the low temperature
The growth temperature of layer is high, and the difference of the growth temperature on the high temperature barrier layer and the growth temperature of low temperature offer layer be greater than or
Equal to 50 DEG C, the growth temperature of the energy band modulating layer provides layer in the growth temperature on the high temperature barrier layer and the low temperature
Between growth temperature.
Optionally, when making each energy band modulating layer, keep growth temperature constant；Alternatively, making each institute
When stating energy band modulating layer, control growth temperature is gradually decreased.
Technical solution provided in an embodiment of the present invention has the benefit that
Electronic barrier layer provided by the invention includes multiple second sublayers, and each second sublayer includes the high temperature stacked gradually
Barrier layer, energy band modulating layer and low temperature provide layer, wherein and high temperature barrier layer is gallium nitride layer, and energy band modulating layer is indium gallium nitrogen layer,
Aluminum gallium nitride and indium gallium nitrogen are dissimilar materials, and energy band modulating layer is layered on high temperature barrier layer, high temperature barrier layer and energy band modulating layer
Between there are lattice mismatch, interfacial stress caused by lattice mismatch can generate very high piezoelectric polarization fields, and piezoelectric polarization fields can be with
Reduce the activation energy of P-type dopant.Since the low temperature being laminated on energy band modulating layer provides the gallium nitride layer that layer is p-type doping, because
The activation energy that this low temperature provides P-type dopant in layer reduces, and the hole that P-type dopant is replaced out is increased, more hole injections
The luminous efficiency of multiple quantum well layer recombination luminescence, light emitting diode gets a promotion.And indium component is surface in energy band modulating layer
Activating agent can be improved low temperature and provide the solid solubility of P-type dopant in layer, so that it is compound to further increase injection multiple quantum well layer
Luminous number of cavities promotes the luminous efficiency of light emitting diode.In addition, high temperature barrier layer is gallium nitride layer, it is with higher
Potential barrier can stop electronics to cross electronic barrier layer injecting p-type gallium nitride layer and hole non-radiative recombination, avoid p-type gallium nitride
It is reduced due to non-radiative recombination in the hole for injecting multiple quantum well layer in layer.
Detailed description of the invention
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for
For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings other
Attached drawing.
Fig. 1 is a kind of structural schematic diagram of the epitaxial wafer for light emitting diode that the embodiment of the present invention one provides；
Fig. 2 is the structural schematic diagram for the multiple quantum well layer that the embodiment of the present invention one provides；
Fig. 3 is the structural schematic diagram for the electronic barrier layer that the embodiment of the present invention one provides；
Fig. 4 is the energy band schematic diagram of electronic barrier layer provided by Embodiment 2 of the present invention；
Fig. 5 is the energy band schematic diagram for the electronic barrier layer that the embodiment of the present invention three provides；
Fig. 6 is the energy band schematic diagram for the electronic barrier layer that the embodiment of the present invention four provides；
Fig. 7 is the energy band schematic diagram for the electronic barrier layer that the embodiment of the present invention five provides；
Fig. 8 is a kind of flow chart of the manufacturing method of the epitaxial wafer for light emitting diode that the embodiment of the present invention six provides.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to embodiment party of the present invention
Formula is described in further detail.
Embodiment one
The embodiment of the invention provides a kind of epitaxial wafers of light emitting diode, referring to Fig. 1, the epitaxial wafer include substrate 1 with
And it is sequentially laminated on buffer layer 2, undoped gallium nitride layer 3, n type gallium nitride layer 4, multiple quantum well layer 5, electronics resistance on substrate 1
Barrier 6 and p-type gallium nitride layer 7.
In the present embodiment, referring to fig. 2, multiple quantum well layer 5 includes multiple the be sequentially laminated on n type gallium nitride layer 4
One sublayer, each first sublayer include quantum well layer 51 and the quantum barrier layer 52 that is arranged on quantum well layer 51, and quantum well layer is
Indium gallium nitrogen layer.Referring to Fig. 3, electronic barrier layer 6 includes multiple second sublayers being sequentially laminated on multiple quantum well layer 5, Mei Ge
Two sublayers include that the high temperature barrier layer 61 stacked gradually, energy band modulating layer 62 and low temperature provide layer 63, and high temperature barrier layer is gallium aluminium
Nitrogen layer, energy band modulating layer are indium gallium nitrogen layer, and the content of indium component is lower than the content of indium component in quantum well layer in energy band modulating layer,
Low temperature provides the gallium nitride layer that layer is p-type doping.
Electronic barrier layer provided by the invention includes multiple second sublayers, and each second sublayer includes the high temperature stacked gradually
Barrier layer, energy band modulating layer and low temperature provide layer, wherein and high temperature barrier layer is gallium nitride layer, and energy band modulating layer is indium gallium nitrogen layer,
Aluminum gallium nitride and indium gallium nitrogen are dissimilar materials, and energy band modulating layer is layered on high temperature barrier layer, high temperature barrier layer and energy band modulating layer
Between there are lattice mismatch, interfacial stress caused by lattice mismatch can generate very high piezoelectric polarization fields, and piezoelectric polarization fields can be with
Reduce the activation energy of P-type dopant.Since the low temperature being laminated on energy band modulating layer provides the gallium nitride layer that layer is p-type doping, because
The activation energy that this low temperature provides P-type dopant in layer reduces, and the hole that P-type dopant is replaced out is increased, more hole injections
The luminous efficiency of multiple quantum well layer recombination luminescence, light emitting diode gets a promotion.And indium component is surface in energy band modulating layer
Activating agent can be improved low temperature and provide the solid solubility of P-type dopant in layer, so that it is compound to further increase injection multiple quantum well layer
Luminous number of cavities promotes the luminous efficiency of light emitting diode.In addition, high temperature barrier layer is gallium nitride layer, it is with higher
Potential barrier can stop electronics to cross electronic barrier layer injecting p-type gallium nitride layer and hole non-radiative recombination, avoid p-type gallium nitride
It is reduced due to non-radiative recombination in the hole for injecting multiple quantum well layer in layer.
It in practical applications, can be with doped indium or aluminium in low temperature offer layer.
It should be noted that multiple second sublayers stack gradually to form superlattice structure, the second sublayer can be effectively relieved
Due to the stress and defect of the heterogeneous generation of material between each layer.
Specifically, quantum barrier layer can be gallium nitride layer, or gallium nitride layer.
Optionally, the content of aluminium component can be equal in multiple high temperature barrier layers in electronic barrier layer, can also be along outer
The stacking direction for prolonging piece successively reduces.If the content of aluminium component is equal in multiple high temperature barrier layers in electronic barrier layer, make
Make the simple process on high temperature barrier layer, it is convenient to realize.If the content of aluminium component in multiple high temperature barrier layers in electronic barrier layer
Stacking direction along epitaxial wafer successively reduces, then provides the electronics that an energy level gradually increases for the hole in p-type gallium nitride layer
Barrier layer reduces barrier height to the barrier effect in hole, be conducive to hole cross electronic barrier layer inject multiple quantum well layer into
Row recombination luminescence improves the luminous efficiency of light emitting diode.
In practical applications, the content of aluminium component can also be along epitaxial wafer in multiple high temperature barrier layers in electronic barrier layer
Stacking direction successively increase.
Optionally, the thickness on multiple high temperature barrier layers in electronic barrier layer can be equal, can also be along the layer of epitaxial wafer
Folded direction successively reduces.If the thickness on multiple high temperature barrier layers in electronic barrier layer is equal, the work on high temperature barrier layer is made
Skill is simple, and it is convenient to realize；If the thickness on multiple high temperature barrier layers in electronic barrier layer successively subtracts along the stacking direction of epitaxial wafer
It is small, it can reduce the barrier effect to hole, be conducive to hole and cross the compound hair of electronic barrier layer injection multiple quantum well layer progress
Light improves the luminous efficiency of light emitting diode.
In practical applications, the thickness on multiple high temperature barrier layers in electronic barrier layer can also be along the stacking side of epitaxial wafer
Increase to layer-by-layer.
Specifically, the thickness on each high temperature barrier layer can be 1~100nm.If the thickness on high temperature barrier layer is less than 1nm,
Then it can cannot play the role of stopping electronics overflow to P-type layer due to excessively thin；If the thickness on high temperature barrier layer is greater than 100nm,
Can be excessive to the barrier effect in hole, cause the number of cavities for entering multiple quantum well layer to reduce, reduces luminous efficiency.
Optionally, the content of indium component can be equal in multiple energy band modulating layers in electronic barrier layer, can also be along outer
The stacking direction for prolonging piece successively increases.If the content of indium component is equal in multiple energy band modulating layers in electronic barrier layer, make
Make the simple process of energy band modulating layer, realization is put conveniently；If indium component contains in multiple energy band modulating layers in electronic barrier layer
The stacking direction measured along epitaxial wafer successively increases, then the content of indium component is higher in the energy band modulating layer of p-type gallium nitride layer,
Be conducive to improve the solid solubility of P-type dopant using indium as surfactant, to increase the injection compound hair of multiple quantum well layer
The number of cavities of light promotes the luminous efficiency of light emitting diode.
In practical applications, the content of indium component can also be along epitaxial wafer in multiple energy band modulating layers in electronic barrier layer
Stacking direction successively reduce.
Optionally, the thickness of each energy band modulating layer can be equal, can also successively reduce along the stacking direction of epitaxial wafer.
If the thickness of each energy band modulating layer is equal, the simple process of energy band modulating layer is made, realization is put conveniently；If each energy band tune
The thickness of preparative layer successively reduces along the stacking direction of epitaxial wafer, then the thickness close to the energy band modulating layer of multiple quantum well layer is larger,
It plays a role clearly.
In practical applications, the thickness of multiple energy band modulating layers in electronic barrier layer can also be along the stacking side of epitaxial wafer
Increase to layer-by-layer.
Specifically, the thickness of each energy band modulating layer can be 1~100nm.If the thickness of energy band modulating layer is less than 1nm,
Then it is unable to reach the effect that energy band modulating layer improves the concentration in hole；If the thickness of energy band modulating layer is greater than 100nm, it will cause
The waste of material and stress are excessive.
Optionally, the thickness that multiple low temperature in electronic barrier layer provide layer can successively increase along the stacking direction of epitaxial wafer
Greatly, in order to forming good matching with p-type gallium nitride layer.
In practical applications, the thickness that multiple low temperature in electronic barrier layer provide layer can also be equal, or along extension
The stacking direction of piece successively reduces.
Specifically, the thickness that each low temperature provides layer can be 1~100nm.If the thickness that low temperature provides layer is less than 1nm,
Then cause the hole being capable of providing very little, the effect for improving hole concentration is not achieved；If the thickness that low temperature provides layer is greater than
100nm then causes energy band modulating layer and electronic barrier layer to be unable to reach ideal effect.
Optionally, the concentration that multiple low temperature in electronic barrier layer provide P-type dopant in layer can be equal,.
In practical applications, the concentration that multiple low temperature in electronic barrier layer provide P-type dopant in layer can not also wait,
Such as successively increase along the stacking direction of epitaxial wafer or successively reduces.
Optionally, the number of plies of the second sublayer can be 5~8 layers.If the number of plies of the second sublayer is less than 5 layers, being not achieved has
Effect improves the effect of the concentration in hole；If the number of plies of the second sublayer is greater than 8 layers, it will cause the wastes of material.
Specifically, substrate can be Sapphire Substrate.Buffer layer can be gallium nitride layer, or aln layer.
Embodiment two
The embodiment of the invention provides a kind of epitaxial wafer of light emitting diode, epitaxial wafer provided in this embodiment is embodiment
A kind of specific implementation of one epitaxial wafer provided.
In the present embodiment, as shown in figure 4, in multiple high temperature barrier layers 61 in electronic barrier layer aluminium component content edge
The stacking direction of epitaxial wafer successively reduces, and the thickness on multiple high temperature barrier layers 61 in electronic barrier layer is along the stacking side of epitaxial wafer
Successively it is decreased to 2nm to from 20nm.The content of indium component is along epitaxial wafer in multiple energy band modulating layers 62 in electronic barrier layer
Stacking direction successively increases, and the thickness of multiple energy band modulating layers 62 in electronic barrier layer is equal, the thickness of energy band modulating layer 62
For 2~20nm.The thickness that multiple low temperature in electronic barrier layer provide layer 63 successively increases to 20nm from 2nm.
Embodiment three
The embodiment of the invention provides a kind of epitaxial wafer of light emitting diode, epitaxial wafer provided in this embodiment is embodiment
Another specific implementation of one epitaxial wafer provided.
In the present embodiment, as shown in figure 5, in multiple high temperature barrier layers 61 in electronic barrier layer aluminium component content edge
The stacking direction of epitaxial wafer successively reduces, and the thickness on multiple high temperature barrier layers 61 in electronic barrier layer is equal, high temperature barrier layer
61 with a thickness of 5~10nm.The content of indium component is equal in multiple energy band modulating layers 62 in electronic barrier layer, electronic barrier layer
In the thickness of multiple energy band modulating layers 62 be successively decreased to 2nm from 20nm along the stacking direction of epitaxial wafer.In electronic barrier layer
Multiple low temperature provide layer 63 thickness successively increase to 20nm from 2nm.
Example IV
The embodiment of the invention provides a kind of epitaxial wafer of light emitting diode, epitaxial wafer provided in this embodiment is embodiment
Another specific implementation of one epitaxial wafer provided.
In the present embodiment, as shown in fig. 6, in multiple high temperature barrier layers 61 in electronic barrier layer aluminium component content phase
Deng, the thickness on multiple high temperature barrier layers 61 in electronic barrier layer is equal, high temperature barrier layer 61 with a thickness of 80nm.Electronic blocking
The content of indium component successively increases along the stacking direction of epitaxial wafer in multiple energy band modulating layers 62 in layer, in electronic barrier layer
The thickness of multiple energy band modulating layers 62 is successively decreased to 80nm from 100nm along the stacking direction of epitaxial wafer.In electronic barrier layer
The thickness that multiple low temperature provide layer 63 successively increases to 80nm from 60nm.
Embodiment five
The embodiment of the invention provides a kind of epitaxial wafer of light emitting diode, epitaxial wafer provided in this embodiment is embodiment
Another specific implementation of one epitaxial wafer provided.
In the present embodiment, as shown in fig. 7, the content of aluminium component is along the stacking side of epitaxial wafer in each high temperature barrier layer 61
Reduce to layer-by-layer, the thickness on each high temperature barrier layer 61 successively reduces 80nm from 100nm along the stacking direction of epitaxial wafer.Each energy
Content with indium component in modulating layer 62 is equal, and the thickness of each energy band modulating layer is equal, energy band modulating layer 62 with a thickness of
80nm.The thickness that each low temperature provides layer 63 successively increases to 80nm from 60nm.
Embodiment six
The embodiment of the invention provides a kind of manufacturing methods of the epitaxial wafer of light emitting diode, are suitable for manufacture embodiment one
The epitaxial wafer that any embodiment provides into embodiment five, referring to Fig. 8, which includes:
Step 201: a substrate is provided.
Step 202: on substrate successively grown buffer layer, undoped gallium nitride layer, n type gallium nitride layer, multiple quantum well layer,
Electronic barrier layer and p-type gallium nitride layer.
In the present embodiment, multiple quantum well layer includes multiple first sublayers being sequentially laminated on n type gallium nitride layer, each
First sublayer includes quantum well layer and the quantum barrier layer that is arranged on quantum well layer, and quantum well layer is indium gallium nitrogen layer.Electronic blocking
Layer includes multiple second sublayers being sequentially laminated on multiple quantum well layer, and each second sublayer includes that the high temperature stacked gradually stops
Layer, energy band modulating layer and low temperature provide layer, and high temperature barrier layer is gallium nitride layer, and energy band modulating layer is indium gallium nitrogen layer, energy band modulation
For the content of indium component lower than the content of indium component in quantum well layer, it is the gallium nitride layer that p-type is adulterated that low temperature, which provides layer, in layer.
Electronic barrier layer provided by the invention includes multiple second sublayers, and each second sublayer includes the high temperature stacked gradually
Barrier layer, energy band modulating layer and low temperature provide layer, wherein and high temperature barrier layer is gallium nitride layer, and energy band modulating layer is indium gallium nitrogen layer,
Aluminum gallium nitride and indium gallium nitrogen are dissimilar materials, and energy band modulating layer is layered on high temperature barrier layer, high temperature barrier layer and energy band modulating layer
Between there are lattice mismatch, interfacial stress caused by lattice mismatch can generate very high piezoelectric polarization fields, and piezoelectric polarization fields can be with
Reduce the activation energy of P-type dopant.Since the low temperature being laminated on energy band modulating layer provides the gallium nitride layer that layer is p-type doping, because
The activation energy that this low temperature provides P-type dopant in layer reduces, and the hole that P-type dopant is replaced out is increased, more hole injections
The luminous efficiency of multiple quantum well layer recombination luminescence, light emitting diode gets a promotion.And indium component is surface in energy band modulating layer
Activating agent can be improved low temperature and provide the solid solubility of P-type dopant in layer, so that it is compound to further increase injection multiple quantum well layer
Luminous number of cavities promotes the luminous efficiency of light emitting diode.In addition, high temperature barrier layer is gallium nitride layer, it is with higher
Potential barrier can stop electronics to cross electronic barrier layer injecting p-type gallium nitride layer and hole non-radiative recombination, avoid p-type gallium nitride
It is reduced due to non-radiative recombination in the hole for injecting multiple quantum well layer in layer.
Optionally, in same second sublayer, the growth temperature on high temperature barrier layer provides the growth temperature of layer than low temperature
Height, and the difference of the growth temperature on high temperature barrier layer and the growth temperature of low temperature offer layer is greater than or equal to 50 DEG C, energy band modulating layer
Growth temperature high temperature barrier layer growth temperature and low temperature provide layer growth temperature between.
The growth temperature on high temperature barrier layer is at least 50 DEG C higher than the growth temperature that low temperature provides layer, and low temperature provides the growth of layer
Temperature is lower, is conducive to low temperature and provides the incorporation of P-type dopant in layer, improves the concentration in hole, while the life on high temperature barrier layer
Long temperature is higher, can provide layer to adjacent low temperature and carry out high annealing, activate P-type dopant, further increase hole
Concentration.And the growth temperature on high temperature barrier layer is higher, be conducive to improve high temperature barrier layer in aluminium atom in high temperature barrier layer table
The mobility in face obtains the better high temperature barrier layer of crystal quality.
Preferably, when making each energy band modulating layer, keep growth temperature constant；Alternatively, making each energy band tune
When preparative layer, control growth temperature is gradually decreased.If keeping growth temperature constant, the simple process of energy band modulating layer is made, it is real
Now facilitate；If control growth temperature gradually decreases, the temperature gradually transition of each layer growth, preferably, growth quality is higher for matching.
It is highly preferred that control growth temperature, which is gradually decrease to low temperature from the growth temperature on high temperature barrier layer, provides the growth of layer
Temperature.
Specifically, the growth temperature on high temperature barrier layer can be 800~1100 DEG C.If the growth temperature on high temperature barrier layer is small
In 800 DEG C, then the growth quality on high temperature barrier layer is poor；If the growth temperature on high temperature barrier layer is higher than 1100 DEG C, can be to energy
Band modulating layer damages, and the indium in energy band modulating layer is caused to be precipitated.
Specifically, it can be 700~1000 DEG C that low temperature, which provides the growth temperature of layer,.If the growth temperature that low temperature provides layer is small
In 700 DEG C, then the growth quality of low temperature offer layer is poor；If the growth temperature that low temperature provides layer is higher than 1000 DEG C, it will cause
Indium in energy band modulating layer is precipitated, and cannot achieve the raising of hole concentration, and be unfavorable for being incorporated to for P-type dopant.
Embodiment seven
The embodiment of the invention provides a kind of manufacturing method of the epitaxial wafer of light emitting diode, extension provided in this embodiment
Piece is a kind of specific implementation for the manufacturing method that embodiment six provides, the epitaxial wafer provided especially suitable for manufacture embodiment two.
In the present embodiment, the growth temperature on high temperature barrier layer is 920 DEG C, and the growth temperature that low temperature provides layer is 850 DEG C,
The growth temperature of energy band modulating layer is gradually decrease to 850 DEG C from 920 DEG C.
Embodiment eight
The embodiment of the invention provides a kind of manufacturing method of the epitaxial wafer of light emitting diode, extension provided in this embodiment
Piece is a kind of specific implementation for the manufacturing method that embodiment six provides, the epitaxial wafer provided especially suitable for manufacture embodiment three.
In the present embodiment, the growth temperature on high temperature barrier layer is 920 DEG C, and the growth temperature that low temperature provides layer is 850 DEG C,
The growth temperature of energy band modulating layer is 880 DEG C.
The serial number of the above embodiments of the invention is only for description, does not represent the advantages or disadvantages of the embodiments.
The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all in spirit of the invention and
Within principle, any modification, equivalent replacement, improvement and so on be should all be included in the protection scope of the present invention.
Claims (9)
1. a kind of epitaxial wafer of light emitting diode, the epitaxial wafer includes substrate and stacks gradually buffering over the substrate
Layer, undoped gallium nitride layer, n type gallium nitride layer, multiple quantum well layer, electronic barrier layer and p-type gallium nitride layer, the multiple quantum wells
Layer includes multiple first sublayers being sequentially laminated on the n type gallium nitride layer, and each first sublayer includes quantum well layer
With the quantum barrier layer being arranged on the quantum well layer, the quantum well layer is indium gallium nitrogen layer, which is characterized in that the electronics resistance
Barrier includes multiple second sublayers being sequentially laminated on the multiple quantum well layer, and each second sublayer includes stacking gradually
High temperature barrier layer, energy band modulating layer and low temperature layer is provided, the high temperature barrier layer is gallium nitride layer, and the energy band modulating layer is
Indium gallium nitrogen layer, content of the content of indium component lower than indium component in the quantum well layer, the low temperature in the energy band modulating layer
The gallium nitride layer that layer is p-type doping is provided；
Wherein, in same second sublayer, the growth temperature on the high temperature barrier layer provides the life of layer than the low temperature
Long temperature is high, and the growth temperature on the high temperature barrier layer and the low temperature provide the difference of the growth temperature of layer more than or equal to 50
DEG C, the growth temperature of the energy band modulating layer provides the growth temperature of layer in the growth temperature on the high temperature barrier layer and the low temperature
Between degree.
2. epitaxial wafer according to claim 1, which is characterized in that multiple high temperature in the electronic barrier layer stop
The content of aluminium component is equal in layer or the electronic barrier layer in multiple high temperature barrier layers in aluminium component content edge
The stacking direction of the epitaxial wafer successively reduces.
3. epitaxial wafer according to claim 1 or 2, which is characterized in that multiple high temperature in the electronic barrier layer
The thickness on barrier layer is equal or the thickness on multiple high temperature barrier layers in the electronic barrier layer is along the epitaxial wafer
Stacking direction successively reduces.
4. epitaxial wafer according to claim 1 or 2, which is characterized in that multiple energy bands in the electronic barrier layer
In modulating layer the content of indium component is equal or the electronic barrier layer in multiple energy band modulating layers in indium component contain
The stacking direction measured along the epitaxial wafer successively increases.
5. epitaxial wafer according to claim 1 or 2, which is characterized in that multiple energy bands in the electronic barrier layer
The thickness of modulating layer is equal or the thickness of multiple energy band modulating layers in the electronic barrier layer is along the epitaxial wafer
Stacking direction successively reduces.
6. epitaxial wafer according to claim 1 or 2, which is characterized in that multiple low temperature in the electronic barrier layer
The thickness for providing layer successively increases along the stacking direction of the epitaxial wafer.
7. epitaxial wafer according to claim 1 or 2, which is characterized in that multiple low temperature in the electronic barrier layer
The concentration for providing P-type dopant in layer is equal.
8. a kind of manufacturing method of the epitaxial wafer of light emitting diode, which is characterized in that the manufacturing method includes:
One substrate is provided；
Successively grown buffer layer, undoped gallium nitride layer, n type gallium nitride layer, multiple quantum well layer, electronic blocking over the substrate
Layer and p-type gallium nitride layer；
Wherein, the multiple quantum well layer includes multiple first sublayers being sequentially laminated on the n type gallium nitride layer, each described
First sublayer includes quantum well layer and the quantum barrier layer that is arranged on the quantum well layer, and the quantum well layer is indium gallium nitrogen layer；
The electronic barrier layer includes multiple second sublayers being sequentially laminated on the multiple quantum well layer, each second sublayer packet
It includes the high temperature barrier layer stacked gradually, energy band modulating layer and low temperature and layer is provided, the high temperature barrier layer is gallium nitride layer, the energy
Band modulating layer is indium gallium nitrogen layer, and the content of indium component contains lower than indium component in the quantum well layer in the energy band modulating layer
Amount, the low temperature provide the gallium nitride layer that layer is p-type doping；
In same second sublayer, the growth temperature on the high temperature barrier layer provides the growth temperature of layer than the low temperature
Height, and the difference of the growth temperature on the high temperature barrier layer and the growth temperature of low temperature offer layer is greater than or equal to 50 DEG C, institute
State the growth temperature of energy band modulating layer the growth temperature on the high temperature barrier layer and the low temperature provide layer growth temperature it
Between.
9. manufacturing method according to claim 8, which is characterized in that when making each energy band modulating layer, keep
Growth temperature is constant；Alternatively, control growth temperature gradually decreases when making each energy band modulating layer.
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| CN109461802B (en) * | 2018-09-14 | 2020-04-07 | 华灿光电(苏州）有限公司 | GaN-based light emitting diode epitaxial wafer and preparation method thereof |
| CN109524522B (en) * | 2018-11-14 | 2021-04-06 | 华灿光电（浙江）有限公司 | GaN-based light emitting diode epitaxial wafer and preparation method thereof |
| CN110085712B (en) * | 2019-04-30 | 2021-07-30 | 芜湖德豪润达光电科技有限公司 | Light emitting diode and forming method thereof |
| CN111081836A (en) * | 2020-01-21 | 2020-04-28 | 福建兆元光电有限公司 | Light emitting diode and method for manufacturing the same |
| CN114649454B (en) * | 2022-05-23 | 2022-08-23 | 江西兆驰半导体有限公司 | Epitaxial wafer structure of light emitting diode and preparation method thereof |
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| KR101923670B1 (en) * | 2012-06-18 | 2018-11-29 | 서울바이오시스 주식회사 | Light emitting device having electron blocking layer |
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