CN107132872B - A kind of current biasing circuit - Google Patents
A kind of current biasing circuit Download PDFInfo
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- CN107132872B CN107132872B CN201610113200.7A CN201610113200A CN107132872B CN 107132872 B CN107132872 B CN 107132872B CN 201610113200 A CN201610113200 A CN 201610113200A CN 107132872 B CN107132872 B CN 107132872B
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
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Abstract
A kind of current biasing circuit, including bias current generating circuit and current compensation circuit, the bias current generating circuit includes built-in resistor, the bias current generating circuit generates the first electric current with the first temperature coefficient on the built-in resistor, the current compensation circuit is suitable for generating second electric current with second temperature coefficient, the second temperature coefficient and first temperature coefficient are on the contrary, second electric current is used to compensate first electric current to obtain bias current.Above scheme can reduce domain usable floor area and reduce circuit power consumption while realizing current compensation.
Description
Technical field
The present invention relates to field of circuit technology, more particularly to a kind of current biasing circuit.
Background technique
Current offset is always an essential module in current design, it is amplifier, comparator, current mirror are electric
The tandem circuits such as road, oscillating circuit provide a current offset, can work normally these modules.As the source of biasing,
The precision of current biasing circuit becomes a basis of other circuit precision.
General current biasing circuit is generated using reference voltage as reference voltage by a voltage-current converter circuit
Bias current, using the ratio of reference voltage and built-in resistor as bias current in conversion process, reference voltage relative temperature becomes
Change can accomplish higher precision, but since there is one so that bias current is to temperature for the variation of the relative temperature of built-in resistor
A variation range reduces this variation range to keep bias current substantially unrelated with temperature, to current biasing circuit and other
The precision of circuit is significant.
Currently, generally passing through band-gap reference in the biasing circuit for generating bias current by voltage-current converter circuit
Circuit realizes the compensation of electric current, however the prior art has larger, the larger problem of power consumption that occupies chip area.
Summary of the invention
Technical problems to be solved of the embodiment of the present invention be while realizing current compensation, reduce domain usable floor area and
Reduce circuit power consumption.
To solve the above-mentioned problems, the embodiment of the present invention provides a kind of current biasing circuit, the current biasing circuit packet
It includes:
Including bias current generating circuit and current compensation circuit, the bias current generating circuit includes built-in resistor,
The bias current generating circuit generates the first electric current with the first temperature coefficient on the built-in resistor, and the electric current is mended
Circuit is repaid to be suitable for generating second electric current with second temperature coefficient, the second temperature coefficient and the first temperature coefficient phase
Instead, second electric current is for compensating first electric current to obtain bias current.
Optionally, the current compensation circuit includes: that the first proportional current obtains circuit, the second proportional current obtains electricity
Road, opposite temperature coefficients introduce circuit and temperature coefficient combinational circuit;
First proportional current obtains circuit and the bias current generating circuit couples, and is suitable for generating and described first
The first proportional image current of electric current;
Second proportional current obtains circuit and the bias current generating circuit couples, and is suitable for generating and described first
The second proportional image current of electric current;
The opposite temperature coefficients introduce circuit and are suitable for combining electricity to the temperature coefficient based on first image current
Road provides voltage, and the temperature coefficient of the voltage value of the voltage is opposite with the temperature coefficient of first electric current;
The voltage that the temperature coefficient combinational circuit is suitable for introducing circuit output based on the opposite temperature coefficients generates institute
The second electric current is stated, and by second image current and the second electric current linear superposition to obtain the bias current.
Optionally, it includes the first PMOS tube that first proportional current, which obtains circuit,;
The source electrode of first PMOS tube couples power supply, and grid and the bias current generating circuit couple, drain electrode and institute
It states opposite temperature coefficients and introduces circuit coupling.
Optionally, it includes the second PMOS tube that second proportional current, which obtains circuit,;
The source electrode of second PMOS tube couples power supply, and grid is coupled to the bias current generating circuit, and drain conduct
Second proportional current obtains the output end of circuit, and couples with the temperature coefficient combinational circuit.
Optionally, it includes: PNP pipe and first resistor that the opposite temperature coefficients, which introduce circuit,;
The output end that the emitter of the PNP pipe and first proportional current obtain circuit couples, base stage and collector
The first end of coupling, collector and the first resistor couples;
The second end of the first resistor is grounded.
Optionally, the temperature coefficient combinational circuit includes current mirror, the first NMOS tube and the second NMOS tube;
The grid of first NMOS tube receives the voltage that the opposite temperature coefficients introduce circuit output, and described first
The source electrode of NMOS tube is grounded;
The input terminal of the current mirror couples the drain electrode of first NMOS tube, described in the output end output of the current mirror
Second electric current;
The drain electrode of second NMOS tube couples the output end of the current mirror, the grid of second NMOS tube and drain electrode
Coupling, the source electrode ground connection of second NMOS tube.
Optionally, the current mirror includes: third PMOS tube and the 4th PMOS tube;
The source electrode of the third PMOS tube couples power supply, and grid and drain electrode couple, the input to drain as the current mirror
End;
The 4th PMOS tube source electrode couples power supply, and the grid of grid and the third PMOS tube couples, drain electrode with it is described
Second proportional current obtains the output end coupling of circuit.
Optionally, the bias current generating circuit includes: amplifier, built-in resistor and the 5th PMOS tube;
The inverting input terminal of the amplifier receives reference voltage signal, the leakage of normal phase input end and the 5th PMOS tube
The grid of pole coupling, output end and the 5th PMOS tube couples;
The source electrode of 5th PMOS tube couples power supply, and drain electrode and the first end of the built-in resistor couple;
The second end of the built-in resistor is grounded.
Compared with prior art, technical solution of the present invention has the advantages that
The technical solution of the embodiment of the present invention provides a kind of current biasing circuit, including bias current generating circuit and electric current
Compensation circuit generates first electric current with the first temperature coefficient on the built-in resistor of the bias current generating circuit, passes through
Be arranged current compensation circuit, make its generate have second temperature coefficient the second electric current, and the second temperature coefficient with it is described
First temperature coefficient is on the contrary, to make second the first electric current of current compensation to generate the bias current substantially unrelated with temperature.Phase
Than the prior art, since the technical solution of the embodiment of the present invention is based on the temperature of the built-in resistor of bias current generating circuit itself
Coefficient carrys out design current compensation circuit, without individually doing a band-gap reference circuit, avoids using bandgap engineered benchmark electricity
Multiple PNP pipes and big resistance needed for road, and then save domain area occupied and reduce power consumption.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of one of embodiment of the present invention current biasing circuit;
Fig. 2 is a kind of structural schematic diagram of current compensation circuit shown in Fig. 1;
Fig. 3 is the structural schematic diagram of another current biasing circuit of the embodiment of the present invention.
Specific embodiment
As previously mentioned, generally passing through in the biasing circuit for generating bias current by voltage-current converter circuit at present
Band-gap reference circuit realizes the compensation of electric current, however the prior art has larger, the larger problem of power consumption that occupies chip area.
The technical solution of the embodiment of the present invention provides a kind of current biasing circuit, including bias current generating circuit and electric current
Compensation circuit generates first electric current with the first temperature coefficient on the built-in resistor of the bias current generating circuit, passes through
Be arranged current compensation circuit, make its generate have second temperature coefficient the second electric current, and the second temperature coefficient with it is described
First temperature coefficient is on the contrary, to make second the first electric current of current compensation to generate the bias current substantially unrelated with temperature.Phase
Than the prior art, since the technical solution of the embodiment of the present invention is based on the temperature of the built-in resistor of bias current generating circuit itself
Coefficient carrys out design current compensation circuit, without individually doing a band-gap reference circuit, avoids using bandgap engineered benchmark electricity
Multiple PNP pipes and big resistance needed for road, and then save domain area occupied and reduce power consumption.
It is understandable to enable above-mentioned purpose of the invention, feature and beneficial effect to become apparent, with reference to the accompanying drawing to this
The specific embodiment of invention is described in detail.
Fig. 1 is the structural schematic diagram of the bias current source circuit of one of embodiment of the present invention self-starting.Please refer to Fig. 1
Shown, the bias current source circuit of the self-starting may include bias current generating circuit 1 and current compensation circuit 2.
The bias current generating circuit 1 includes built-in resistor, and the bias current generating circuit 1 is in the built-in resistor
Upper to generate first electric current with the first temperature coefficient, the current compensation circuit 2, which is suitable for generating, has second temperature coefficient
Second electric current, the second temperature coefficient and first temperature coefficient are on the contrary, second electric current is used to compensate described first
Electric current is to obtain bias current.
In specific implementation, the bias current generating circuit 1 has built-in resistor, can be general voltage and current and turns
Circuit is changed, it can also be using any other structure appropriate in the prior art.
In specific implementation, the built-in resistor can be negative tempperature coefficient thermistor, be also possible to positive temperature coefficient
Thermistor generates first electric current with the first temperature coefficient on the built-in resistor.
The current compensation circuit 2 is coupled with the bias current generating circuit 1, is designed according to first temperature coefficient
Corresponding current compensation circuit 2, second electric current of the generation of current compensation circuit 2 with second temperature coefficient, described second
Temperature coefficient is with first temperature coefficient on the contrary, so that first electric current and second electric current obtained after being superimposed
Bias current is substantially temperature independent.
When the voltage on the built-in resistor is basically unchanged, the electric current variation with temperature on the built-in resistor is main
Though the variation depending on built-in resistor temperature itself.The embodiment of the present invention is by being arranged the current compensation circuit, based on
Existing current source compensates, specifically, by introducing the current compensation circuit and the first temperature coefficient phase
Anti- temperature coefficient, namely temperature coefficient second electric current opposite with first temperature coefficient is generated, and electric by described second
Stream is superimposed with the bias current on built-in resistor, so that temperature coefficient is cancelled out each other, obtains the biased electrical substantially unrelated with temperature
Stream.
However in the prior art, it is usually required to carry out current compensation using 2 to 3 by bandgap engineered reference circuit
PNP pipe and 2 to 3 big resistance, in some instances it may even be possible to need using amplifier, these devices compare occupancy in layout design
Area inevitably brings the increase of power consumption.Compare the prior art it can be concluded that, the embodiment of the present invention be based on existing electric current
The electric current that source generates, design current compensation circuit generates the electric current opposite with current temperature coefficient on built-in resistor, and then realizes
The bias current in bias current generating circuit is compensated, the bias current substantially unrelated with temperature is obtained, and realizes above-mentioned electric current
It is no longer needed in the design of compensation circuit using the devices such as multiple PNP pipes and big resistance, therefore can reduce domain usable floor area
With reduction power consumption.
It will be appreciated by persons skilled in the art that designing the electricity in the specific implementation of the current compensation circuit 2
The temperature coefficient for flowing the electric current that compensation circuit 2 generates needs the corresponding temperature with reference to built-in resistor in the bias current generating circuit
Quick characteristic, so that the temperature coefficient phase for the electric current that the temperature coefficient of electric current is generated with the current compensation circuit on built-in resistor
Instead, to achieve the effect that current compensation.
The specific implementation of the current biasing circuit is described in detail below with reference to Fig. 2 and Fig. 3.
Fig. 2 is a kind of structural schematic diagram of current compensation circuit shown in Fig. 1.Shown in referring to Figures 1 and 2, the electricity
Stream compensation circuit 2 may include: that the first proportional current obtains circuit 21, the second proportional current obtains circuit 22, opposite thermal system
Number introduces circuit 23 and temperature coefficient combinational circuit 24.Wherein:
First proportional current obtains circuit 21 and the bias current generating circuit 1 couples, be suitable for generating with it is described
The first proportional image current of first electric current;
Second proportional current obtains circuit 22 and the bias current generating circuit 1 couples, be suitable for generating with it is described
The second proportional image current of first electric current;
The opposite temperature coefficients are introduced circuit 23 and are suitable for being combined based on first image current to the temperature coefficient
Circuit 24 provides voltage, and the temperature coefficient of the voltage value of the voltage is opposite with the temperature coefficient of first electric current;
The temperature coefficient combinational circuit 24, which is suitable for introducing the voltage that circuit 23 exports based on the opposite temperature coefficients, to be produced
Raw second electric current, and by second image current and second electric current superposition to obtain the bias current.
In specific implementation, first image current can be equal with first electric current, can also be with described first
Electric current is at other ratios.Similarly, second mirror image circuit can be equal with first electric current, can also be with described first
Electric current is at other ratios.
In specific implementation, it may include PNP pipe and resistance that the opposite temperature coefficients, which introduce circuit 23, by using
PNP pipe can produce and the emitter voltage opposite with the first temperature coefficient is presented, that is, introduce opposite with first temperature coefficient
Second temperature coefficient.Correspondingly, it is defeated to be based on opposite temperature coefficients introducing circuit 23 for the temperature coefficient combinational circuit 24
The second electric current that voltage out generates also has second temperature coefficient, due to second temperature coefficient and the first temperature coefficient on the contrary,
The temperature coefficient combinational circuit 24 is by after second image current and the linear superposition of the second electric current, the two temperature phase
Close property can cancel out each other or at least partly offset, to achieve the purpose that current compensation so that superposition after obtain bias current with
Temperature is substantially unrelated.
It should be noted that when second image current and second electric current are carried out linear superposition, Ke Yitong
Cross the ratio for designing the temperature coefficient combinational circuit to adjust superposition so that after superposition obtained bias current substantially with temperature
It spends unrelated.
Fig. 3 is the structural schematic diagram of another current biasing circuit in the embodiment of the present invention.Referring to Fig. 1 to Fig. 3
It is illustrated, the current biasing circuit may include bias current generating circuit 1 and current compensation circuit 2.
In the present embodiment, the current compensation circuit 2 may include: that the first proportional current obtains the ratio of circuit 21, second
Example current acquisition circuitry 22, opposite temperature coefficients introduce circuit 23 and temperature coefficient combinational circuit 24.
In the present embodiment, the bias current generating circuit 1 may include: amplifier A1, built-in resistor R0 and the 5th
PMOS tube MP5;
The inverting input terminal of the amplifier A1 receives reference voltage signal, normal phase input end and the 5th PMOS tube
The drain electrode of MP5 couples, and the grid of output end and the 5th PMOS tube couples;
The source electrode of the 5th PMOS tube MP5 couples power vd D, and drain electrode and the first end of the built-in resistor R0 couple;
The second end of the built-in resistor R0 is grounded.
The current compensation circuit 2 may include: that the first proportional current obtains circuit 21, the second proportional current obtains circuit
22, opposite temperature coefficients introduce circuit 23 and temperature coefficient combinational circuit 24.
In the present embodiment, it may include the first PMOS tube MP1 that first proportional current, which obtains circuit 21,;
The source electrode of the first PMOS tube MP1 couples power vd D, and grid and the bias current generating circuit 1 couple, leakage
Extremely opposite temperature coefficient introduces circuit 23 and couples, and drains and obtains the output end P1 of circuit 21 as first ratio.
In the present embodiment, it may include the second PMOS tube MP2 that second proportional current, which obtains circuit 22,;
The source electrode of the second PMOS tube MP2 couples power supply, and grid is coupled to the bias current generating circuit 1, drains
The output end P4 of circuit 22 is obtained as second proportional current, and is coupled with the temperature coefficient combinational circuit 24.
In the present embodiment, it may include: PNP pipe MP6 and first resistor R1 that the opposite temperature coefficients, which introduce circuit 23,;
The output end P1 that the emitter of the PNP pipe MP6 and first proportional current obtain circuit 21 is coupled, base stage with
The first end of collector coupling, collector and the first resistor R1 couple;
The second end of the first resistor R1 is grounded.
In the present embodiment, the temperature coefficient combinational circuit 24 may include current mirror, the first NMOS tube MN1 and second
NMOS tube MN2;
The grid of the first NMOS tube MN1 receives the opposite temperature coefficients and introduces the voltage that circuit 23 exports, described
The source electrode of first NMOS tube MN1 is grounded;
The input terminal P2 of the current mirror couples the drain electrode of the first NMOS tube MN1, the output end P3 of the current mirror
Export second electric current;
The drain electrode of the second NMOS tube MN2 couples the output end P3 of the current mirror, the grid of the second NMOS tube MN2
Pole and drain electrode couple, the source electrode ground connection of the second NMOS tube MN2.
In the present embodiment, the current mirror may include the 4th PMOS tube MP4 and the 5th PMOS tube MP5;
The source electrode of the 4th PMOS tube MP4 couples power vd D, and grid and drain electrode couple, and drain electrode is used as the current mirror
Input terminal P3;
The 5th PMOS tube MP5 source electrode couples power supply, the grid coupling of grid and the 4th PMOS tube MP4, drain electrode
The output end P4 for obtaining circuit with second proportional current is coupled.
In the present embodiment, all CMOS tubes are all made of high-voltage tube, the first resistor R1 and the built-in resistor R0 with
The correlation of temperature is consistent.
Below with an example compare this example demonstrates that compensate after bias current calculating process, wherein assuming that benchmark is electric
Pressure be VREF, the first proportional current obtain circuit obtain electric current and second ratio obtain circuit acquisition electric current with it is described
Current ratio on built-in resistor R0 is 1 to 1.
As shown in figure 3, the bias current I5=VREF/R0 on the built-in resistor R0, then the first PMOS tube MP1
The electric current obtained from the 5th PMOS tube MP5 is I1=I5=VREF/R0, the electric current I2=of the second PMOS tube MP2
I5=VREF/R0, the at this time voltage of PNP pipe MP6 emitter are as follows:
VE=VBE+I1*R1=VBE+VREF*R1/R0 (1)
Wherein, VBE is the PNP pipe MP6 base stage and the voltage for emitting interpolar, and VREF is benchmark voltage, and R1 is the first electricity
Resistance, R0 is built-in resistor.From formula (1) as can be seen that VREF is a reference voltage, R0/R1 only has with the size of resistance
It closes, it is temperature independent, so the relationship of VE relative temperature is substantially determined by VBE, it is seen that the opposite temperature coefficients introduce
Circuit 23 introduces the second temperature coefficient opposite with the first temperature coefficient.
VE is that the opposite temperature coefficients introduce the voltage that circuit 23 generates, and the size of VE determines the first NMOS
The electric current of pipe MN1:
I11=0.5*un*Cox*2 (VE-VT)2=un*Cox (VE-VT)2 (2)
Wherein, un is electron mobility, and Cox is the gate oxide capacitance of unit area, and VE is PNP pipe MP6 emitter
Voltage, VT are the pinch-off voltage of PNP pipe MP6.And the electric current I3=I11 of the third PMOS tube MP3 is flowed through, the 4th PMOS
The pipe MP4 and third PMOS tube MP3 is in image current, proportionate relationship a, so flowing through the electric current I4 of the 4th PMOS tube
=a*I3=a*I11, the electric current I4 that the 4th PMOS is shut are the generation of current compensation circuit 2 with second temperature
Second electric current of coefficient.The electric current I22 of the second NMOS tube MN2 is made of two parts electric current, and a part is from described
The electric current I4 of 4th PMOS tube, electric current I2 of the another part from the second PMOS tube MP2.So in second NMOS tube
Electric current I22 derive it is as follows:
I22=I4+I2=a*I11+VREF/R0;
I22=a*un*Cox (VE-VT)2+VREF/R0;
I22=a*un*Cox (VBE+VREF*R1/R0-VT)2+VREF/R0; (3)
In above-mentioned (3) formula, I22 is compensated bias current, and un is electron mobility, and Cox is the grid of unit area
Aoxidize layer capacitance.It can be seen that VREF/R1 from (3) formula and positive temperature coefficient be presented, positive temperature system is presented in VBE+VREF*R0/R1
Number adjusts a, I22 can be made substantially unrelated with temperature.
From examples detailed above as can be seen that the embodiment of the present invention passes through setting current compensation circuit, wherein the opposite thermal
Coefficient introduces circuit 23 and generates the voltage with second temperature coefficient, and then generates on the first NMOS tube MN1 and be presented the
The electric current of two temperatures coefficient obtains the second electric current I4 with second temperature coefficient, second electric current through mirror-image structure circuit
I4 obtains the electric current I2 on circuit with second proportional current and is superimposed, to reach built-in in compensation bias current generating circuit
The purpose of ohmically bias current can make compensated electric current I22 base by adjusting the current ratio a of mirror-image structure
This is temperature independent.
Compared with prior art, as built in the technical solution of the embodiment of the present invention based on bias current generating circuit itself
The temperature coefficient of resistance carrys out design current compensation circuit, without individually doing a band-gap reference circuit, avoids using design
Multiple PNP pipes and big resistance needed for band-gap reference circuit, and then save domain area occupied and reduce power consumption.
Although present disclosure is as above, present invention is not limited to this.Anyone skilled in the art are not departing from this
It in the spirit and scope of invention, can make various changes or modifications, therefore protection scope of the present invention should be with claim institute
Subject to the range of restriction.
Claims (6)
1. a kind of current biasing circuit, which is characterized in that including bias current generating circuit and current compensation circuit, the biasing
Current generating circuit includes built-in resistor, and the bias current generating circuit generates on the built-in resistor has the first temperature
First electric current of coefficient, the current compensation circuit are suitable for generating second electric current with second temperature coefficient, second temperature
Degree coefficient and first temperature coefficient are on the contrary, second electric current is used to compensate first electric current to obtain bias current;
The current compensation circuit includes: that the first proportional current obtains circuit, the second proportional current obtains circuit, opposite thermal system
Number introduces circuit and temperature coefficient combinational circuit;
First proportional current obtains circuit and the bias current generating circuit couples, and is suitable for generating and first electric current
The first proportional image current;
Second proportional current obtains circuit and the bias current generating circuit couples, and is suitable for generating and first electric current
The second proportional image current;
The opposite temperature coefficients are introduced circuit and are suitable for being mentioned based on first image current to the temperature coefficient combinational circuit
Voltage supplied, the temperature coefficient of the voltage value of the voltage are opposite with the temperature coefficient of first electric current;
The voltage that the temperature coefficient combinational circuit is suitable for introducing circuit output based on the opposite temperature coefficients generates described the
Two electric currents, and by second image current and the second electric current linear superposition to obtain the bias current;
The temperature coefficient combinational circuit includes current mirror, the first NMOS tube and the second NMOS tube;
The grid of first NMOS tube receives the voltage that the opposite temperature coefficients introduce circuit output, first NMOS tube
Source electrode ground connection;
The input terminal of the current mirror couples the drain electrode of first NMOS tube, the output end output described second of the current mirror
Electric current;
The drain electrode of second NMOS tube couples the output end of the current mirror, the grid and drain electrode coupling of second NMOS tube
It connects, the source electrode ground connection of second NMOS tube.
2. current biasing circuit according to claim 1, which is characterized in that first proportional current obtains circuit and includes
First PMOS tube;
The source electrode of first PMOS tube couples power supply, and grid and the bias current generating circuit couple, drain electrode and the phase
Anti- temperature coefficient introduces circuit coupling.
3. current biasing circuit according to claim 1, which is characterized in that second proportional current obtains circuit and includes
Second PMOS tube;
The source electrode of second PMOS tube couples power supply, and grid is coupled to the bias current generating circuit, drains described in being used as
Second proportional current obtains the output end of circuit, and couples with the temperature coefficient combinational circuit.
4. current biasing circuit according to claim 1, which is characterized in that the opposite temperature coefficients introduce circuit packet
It includes: PNP pipe and first resistor;
The output end that the emitter of the PNP pipe and first proportional current obtain circuit couples, and base stage and collector couple,
The first end of collector and the first resistor couples;
The second end of the first resistor is grounded.
5. current biasing circuit according to claim 1, which is characterized in that the current mirror include: third PMOS tube and
4th PMOS tube;
The source electrode of the third PMOS tube couples power supply, and grid and drain electrode couple, the input terminal to drain as the current mirror;
The 4th PMOS tube source electrode couples power supply, the grid coupling of grid and the third PMOS tube, drain electrode and described second
Proportional current obtains the output end coupling of circuit.
6. current biasing circuit according to claim 1, which is characterized in that the bias current generating circuit includes: to put
Big device, built-in resistor and the 5th PMOS tube;
The inverting input terminal of the amplifier receives reference voltage signal, normal phase input end and the described 5th
The drain electrode of PMOS tube couples, and the grid of output end and the 5th PMOS tube couples;
The source electrode of 5th PMOS tube couples power supply, and drain electrode and the first end of the built-in resistor couple;
The second end of the built-in resistor is grounded.
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US20070109037A1 (en) * | 2005-11-16 | 2007-05-17 | Mediatek Inc. | Bandgap reference circuits |
CN103631306A (en) * | 2013-12-01 | 2014-03-12 | 西安电子科技大学 | Low-temperature coefficient current source reference circuit |
US20140070874A1 (en) * | 2012-09-11 | 2014-03-13 | Samsung Electro-Mechanics Co., Ltd. | Apparatus and method for outputting signal |
CN104460810A (en) * | 2014-12-25 | 2015-03-25 | 武汉众为信息技术有限公司 | Voltage reference circuit fixable in temperature coefficient |
CN204719598U (en) * | 2015-06-15 | 2015-10-21 | 杭州宽福科技有限公司 | A kind of current source circuit |
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2016
- 2016-02-29 CN CN201610113200.7A patent/CN107132872B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
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US20070109037A1 (en) * | 2005-11-16 | 2007-05-17 | Mediatek Inc. | Bandgap reference circuits |
US20140070874A1 (en) * | 2012-09-11 | 2014-03-13 | Samsung Electro-Mechanics Co., Ltd. | Apparatus and method for outputting signal |
CN103631306A (en) * | 2013-12-01 | 2014-03-12 | 西安电子科技大学 | Low-temperature coefficient current source reference circuit |
CN104460810A (en) * | 2014-12-25 | 2015-03-25 | 武汉众为信息技术有限公司 | Voltage reference circuit fixable in temperature coefficient |
CN204719598U (en) * | 2015-06-15 | 2015-10-21 | 杭州宽福科技有限公司 | A kind of current source circuit |
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