CN107124819A - A kind of method for realizing that different impedance signal line cablings are shared and pcb board - Google Patents
A kind of method for realizing that different impedance signal line cablings are shared and pcb board Download PDFInfo
- Publication number
- CN107124819A CN107124819A CN201710428490.9A CN201710428490A CN107124819A CN 107124819 A CN107124819 A CN 107124819A CN 201710428490 A CN201710428490 A CN 201710428490A CN 107124819 A CN107124819 A CN 107124819A
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- Prior art keywords
- shared
- signal
- pcb board
- impedance
- pcb
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
- H05K1/0231—Capacitors or dielectric substances
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0228—Compensation of cross-talk by a mutually correlated lay-out of printed circuit traces, e.g. for compensation of cross-talk in mounted connectors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09218—Conductive traces
- H05K2201/09227—Layout details of a plurality of traces, e.g. escape layout for Ball Grid Array [BGA] mounting
Abstract
The invention discloses a kind of method for realizing that different impedance signal line cablings are shared and pcb board, its implementation process is, the signal wire of different impedance values on pcb board card is all connected to Cap electric capacity, then PCB Trace passages are shared between all cap electric capacity, the Cap electric capacity carries out Bom switchings as Bom switching switches, so as to realize that cabling of all signal wires on pcb board merges into one.A kind of method for realizing that different impedance signal line cablings are shared and pcb board of the present invention is compared with prior art, by the way that different impedance value buses are carried out with the shared scheme of transmission channel on pcb board card, the high speed cabling quantity on board is reduced with this, meeting under each bus functionality of product can realize, reduce board dimensioned area and the lamination number of plies, board development cost are reduced, the competitive strength of product commercially is improved, it is practical.
Description
Technical field
It is specifically a kind of to realize what different impedance signal line cablings were shared the present invention relates to PCB layout technical field
Method and pcb board.
Background technology
With the high speed development of electronic industry, the positive highly dense high speed direction of Server motherboard designs is developed, its pcb board structure
Dimensioned area reduces, and the High-speed I/O port number and speed of cpu chip output are substantially improved, and lifting product with this commercially should
Competitiveness.
However, increasing with I/O port quantity, also implies that the quantity for the HW High Way to be connected up on pcb board card
It will be lifted at double.Such as, originally CPU only supports a PCIEx16 port, it means that PCB trace need wiring PCIE TX and
Each 16 pairs of differential lines of RX passages, altogether 32 pairs of cablings.After CPU, which is improved, to upgrade, SAS3.0 interfaces can be supported to talk about again, it is in board
Above and add more than ten groups of SAS cablings more.
So, it is that can realize the wiring of greater number signal lead if pcb board physical dimension keeps not changing words, it is inevitable
Compress the coupling spacing between each difference cabling pair, and the diminution of cabling spacing, the crosstalk increased between signal lead is made an uproar
Sound shadow is rung, meanwhile, the upgrading of cpu chip makes PCIE signal speed be substantially improved again, and then exacerbates crosstalk noise lifting, from
And, the increase of the BER bit error rates, has influence on the stability during system longtime running when can cause the signal to transmit.
With the upgrading of chip functions, to meet feasibility of each Bus bus numbers under PCB layout, typically use
Common design form, to increase pcb board card size area, increases the pcb board lamination number of plies or draws the modes such as interconnection using Cable
The design of each high speed cabling is met, however, such settling mode will certainly bring many constant to system design, with can not
Preferably meet competitiveness commercially after the application and product development of electronic product upgrading.
With the upgrading of chip functions, it supports I/O port quantity and speed to be substantially improved, when pcb board card structure size
And lamination number also keeps not changing, to realize feasibility that more high-speed buses are connected up on pcb board, it is only capable of by compressing each height
The coupling spacing of fast cabling design, and couple spacing be greatly decreased and signal rate lifting, crosstalk between signal can be aggravated
The lifting of noise, so as to have influence on the transmission quality of signal during system operation.
To meet signal transmission quality, traditional approach can be using increase pcb board card area, the increase lamination number of plies and Cable
The modes such as interconnection improve design.However, increase pcb board area and the lamination number of plies, can bring carrying for pcb board card producing cost
Rise, meanwhile, board area becomes big, and the number of plies, which increases, can also increase the complexity of pcb board factory processing, reduce pcb board production yield.
And use the external methods of Cable, also can increasing because of Cable quantity, bring the lifting of development cost, meanwhile, because
Cable quantity is more, can bring more constant to post facility mutual connection and maintenance, have influence on efficiency during product actual use
And reliability.
Based on this, the present invention provides a kind of method for realizing that different impedance signal line cablings are shared and pcb board.When chip work(
Can upgrading, support High-speed I/O number of signals and speed lifting, under the conditions of it is determined that client is apolegamy to each functional requirement of product, this
Invention disclosure satisfy that each high speed cabling is interconnected and signal transmission quality on pcb board card, it is ensured that what board designed and developed cost can
Control property, to reduce the cabling quantity on pcb board, improves the feasibility that each Bus buses are connected up on pcb board.
The content of the invention
The technical assignment of the present invention is to be directed to above weak point to realize that different impedance signal line cablings are shared there is provided one kind
Method and pcb board.
A kind of method for realizing that different impedance signal line cablings are shared, its implementation process is to hinder the difference on pcb board card
The signal wire of anti-value is all connected to Cap electric capacity, and PCB Trace passages, the Cap electric capacity are then shared between all cap electric capacity
Bom switchings are carried out as Bom switching switches, so as to realize that cabling of all signal wires on pcb board merges into one.
The impedance value of shared PCB Trace passages uses the average value of all signal line impedance values, when the average value is
During integer value, impedance value is the average value；When average value is non integer value, it is impedance to take its integer value after rounding up
Value.
The signal wires of the different impedance values refers to the SAS3.0 signal wires and 85ohm that Trace impedance values are 100ohm
PCIE signal line, corresponding, 93ohm impedance values are the impedance value for sharing PCB Trace cablings.
It is determined that before the impedance value of the PCB Trace passages shared, it is first determined the change of Trace characteristic impedances is to signal
The influence of transmission quality, the determination process is：The impedance value of SAS3.0 interconnection traces is become into 85ohm by 100ohm first, led to
Signal simulation simulation is crossed, signal eye diagram waveform is obtained and Trace impedances changes the data of front and rear eye pattern analog-quality, so as to obtain
Relation between impedance variations and signal transmission quality.
A kind of pcb board, a PCB Trace passage is shared using the above method by the signal wire of different impedance values.
Compared to the prior art a kind of method for realizing that different impedance signal line cablings are shared and pcb board of the present invention, have
There is following beneficial effect：
A kind of method for realizing that different impedance signal line cablings are shared and pcb board of the present invention, by different impedance values
Bus carries out the shared scheme of transmission channel on pcb board card, and the high speed cabling quantity on board is reduced with this, each meeting product
Bus functionality can be realized down, reduced board dimensioned area and the lamination number of plies, reduced board development cost, improve product and exist
The competitive strength of in the market, reduces cost, practical, applied widely, with good application value.
Brief description of the drawings
Accompanying drawing 1 is that original design SAS3.0 and PCIE3.0 interface bus each terminate interconnection schematic diagram.
Accompanying drawing 2 is signal simulation eye pattern waveform when SAS3.0 and PCIE3.0 signals are each terminated under existing scheme.
Accompanying drawing 3 is, according to existing scheme, SAS3.0 cabling Trace impedances to be become to signal eye diagram waveform during 85ohm.
When accompanying drawing 4 is Curve guide impeller, SAS3.0 and PCIE3.0 interface bus shares PCB Trace links interconnection schematic diagram.
Accompanying drawing 5 is under improvement project, when to share trace impedances be 93ohm, SAS3.0 and PCIE3.0 signal eye diagram
Simulation waveform.
Embodiment
Below in conjunction with the accompanying drawings and specific embodiment the invention will be further described.
A kind of method for realizing that different impedance signal line cablings are shared, its implementation process is to hinder the difference on pcb board card
The signal wire of anti-value is all connected to Cap electric capacity, and PCB Trace passages, the Cap electric capacity are then shared between all cap electric capacity
Bom switchings are carried out as Bom switching switches, so as to realize that cabling of all signal wires on pcb board merges into one.
The impedance value of shared PCB Trace passages uses the average value of all signal line impedance values, when the average value is
During integer value, impedance value is the average value；When average value is non integer value, it is impedance to take its integer value after rounding up
Value.
The signal wires of the different impedance values refers to the SAS3.0 signal wires and 85ohm that Trace impedance values are 100ohm
PCIE signal line, corresponding, 93ohm impedance values are the impedance value for sharing PCB Trace cablings.
It is determined that before the impedance value of the PCB Trace passages shared, it is first determined the change of Trace characteristic impedances is to signal
The influence of transmission quality, the determination process is：The impedance value of SAS3.0 interconnection traces is become into 85ohm by 100ohm first, led to
Signal simulation simulation is crossed, signal eye diagram waveform is obtained and Trace impedances changes the data of front and rear eye pattern analog-quality, so as to obtain
Relation between impedance variations and signal transmission quality.
Present invention proposition is a kind of to realize the method that different impedance signal lines are shared in pcb board upward wiring, for pcb board card
Exist Trace impedance values 100ohm SAS3.0 signal wires and 85ohm PCIE cablings when.Meanwhile, confirm client to this two kinds
Bus specification is under apolegamy is required, can to carry out Bom switchings by using Cap electric capacity, and cabling of the double bus on pcb board is carried out
Merge into one.
Assessed because double bus trace impedance values have larger difference, it is necessary to be simulated by signal simulation, it is determined that by this two impedance
Value takes conjunction compromise value, i.e. 93ohm impedance values as the impedance value of shared PCB Trace cablings, and the preferably compatible double bus of energy is each
Signal quality when individually transmitting.Thus, quantity when each high-speed bus of pcb board card is individually each interconnected can be reduced, is reduced
Because pcb board area increases the increased risk of expense brought during product development.
As shown in Figure 1；When conventional high rate IO bus interconnections are terminated, because of the Trace impedances on each comfortable pcb board not
Together, all it is respective termination, to ensure the uniformity of signal transmission path impedance, reduces because of signal reflex influence, the signal caused
The problem of transmission quality is deteriorated.Meanwhile, be transmission quality when assessment signal each terminates interconnection, present case for SAS3.0 and
PCIE3.0 cablings topology has built system interconnection simulation model figure using ADS simulation softwares, independent to assess each Bus cablings
Signal eye diagram quality during interconnecting transfer.
Present case is emulated to the signal eye diagram of the PCIE3.0 interface bus of the SAS3.0 and 85ohm impedances of 100ohm impedances
Waveform as shown in Figure 2, wherein, each bus individually each interconnect when eye it is high, the wide data of eye are as shown in table 1 below：
To realize that the bus under different impedance values shares the feasibility of PCB Trace interconnection traces, Trace need to be first assessed special
Influence of the change to signal transmission quality of impedance is levied, thus, present case is by the impedance value of SAS3.0 interconnection traces by 100ohm
Become 85ohm, simulated by signal simulation, as shown in Figure 3, SAS3.0 cabling Trace impedances change its signal eye diagram waveform
Front and rear eye pattern analog-quality data are as shown in table 2 below, it follows that to the high speed signal of 12Gbps speed, the change of impedance, meeting
Obvious reduce is brought to change to signal eye amplitude, it is hereby understood that significantly impedance variations, can be because of the shadow of signal reflex
Ring, the quality of reduction signal transmission.
When bus cabling quantity is more in board, client is to reduce because total when doing matingplan using being to bus functionality
The higher influence of the development cost expense of the more larger generation of PCB construction size brought of line number amount, present case proposes one kind
The design method that different impedance signal lines are shared in pcb board upward wiring is realized, is SAS3.0 and PCIE3.0 two as shown in Figure 4
Bus shares AC Cap devices in PCB Trace passage interconnection structure figures, its structure, not only act as when high speed signal is propagated every
Straight-through friendship effect, meanwhile, it also can be used as Bom switching switches, the selection according to client to bus functionality, to connect or remove AC
Cap mode determines the selection of bus functionality, meanwhile, for reduce impedance significantly change caused by signal reflex influence,
The PCB Trace impedances shared in binding signal theory analysis, this case use 93ohm, and each bus functionality letter of analogue simulation
Number transmission when eye pattern as shown in Figure 5.Its double bus shares signal imitation eye diagram data such as following table during PCB Trace passages
Shown in 3：
Emulation eye diagram data in above-mentioned steps, its SAS3.0 and the cablings of PCIE3.0 two are before PCB Trace are shared
Eye diagram quality data afterwards are as shown in table 4 below, it follows that using 93ohm impedance values, the change of energy preferably balanced signal impedance
Change the influence that signal quality is transmitted for SAS3.0 and the cablings of PCIE3.0 two, be that two different impedance value buses realize shared PCB
The interconnection scheme of Trace cablings provides technical guarantee.
The design method that different impedance signal lines are shared in pcb board upward wiring is realized this paper presents a kind of, its method exists
When determining systemic-function scheme for apolegamy, it can be passed by sharing the signal on PCB Trace link transmission passages, reduction pcb board
Defeated quantity, reduces pcb board physical dimension with this and the board lamination number of plies becomes the risk of the board development cost liftings brought more,
Meeting each bus functionality can realize under application, effectively improve the competitiveness of product in the market.
A kind of pcb board, a PCB Trace passage is shared using the above method by the signal wire of different impedance values.
It is limited that the technical program may be used on all pcb board card structure space-intensives, is unfavorable for the wiring of high-frequency signal cabling
Environment or certain chip possess in itself certain interface support two kinds of different bus multiplexing functions environment in.
By embodiment above, the those skilled in the art can readily realize the present invention.But should
Work as understanding, the present invention is not limited to above-mentioned embodiment.On the basis of disclosed embodiment, the technical field
Technical staff can be combined different technical characteristics, so as to realize different technical schemes.
It is the known technology of those skilled in the art in addition to the technical characteristic described in specification.
Claims (5)
1. a kind of method for realizing that different impedance signal line cablings are shared, it is characterised in that its implementation process is, by pcb board card
On the signal wires of different impedance values be all connected to Cap electric capacity, PCB Trace passages, institute are then shared between all cap electric capacity
Cap electric capacity is stated as Bom switching switches and carries out Bom switchings, so as to realize that cabling of all signal wires on pcb board is merged into
One.
2. a kind of whole machine cabinet monitoring management module according to claim 1, it is characterised in that shared PCB Trace lead to
The impedance value in road uses the average value of all signal line impedance values, and when the average value is integer value, impedance value is the average value；
When average value is non integer value, it is impedance value to take its integer value after rounding up.
3. a kind of whole machine cabinet monitoring management module according to claim 2, it is characterised in that the letter of the different impedance values
Number line refers to the SAS3.0 signal wires that Trace impedance values are 100ohm and 85ohm PCIE signal line, corresponding, 93ohm resistances
Anti- value is the impedance value for sharing PCB Trace cablings.
4. a kind of whole machine cabinet monitoring management module according to claim 3, it is characterised in that it is determined that the PCB shared
Before the impedance value of Trace passages, it is first determined influence of the change of Trace characteristic impedances to signal transmission quality, the determination
Cheng Wei：The impedance value of SAS3.0 interconnection traces is become into 85ohm by 100ohm first, simulated by signal simulation, signal is obtained
The data of eye pattern analog-quality before and after eye pattern waveform and Trace impedances change, so as to obtain impedance variations and signal transmission quality
Between relation.
5. a kind of pcb board, it is characterised in that the signal wire of different impedance values is shared by a PCB Trace using the above method
Passage.
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| CN201710428490.9A CN107124819A (en) | 2017-06-08 | 2017-06-08 | A kind of method for realizing that different impedance signal line cablings are shared and pcb board |
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| CN201710428490.9A CN107124819A (en) | 2017-06-08 | 2017-06-08 | A kind of method for realizing that different impedance signal line cablings are shared and pcb board |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109359070A (en) * | 2018-08-07 | 2019-02-19 | 中国航空无线电电子研究所 | High-speed bus switching module based on electronic switch |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1035949A (en) * | 1987-06-29 | 1989-10-04 | 通用电气公司 | The data converter that is used for the CT data collecting system |
| CN102737002A (en) * | 2011-04-15 | 2012-10-17 | 夏普株式会社 | Interface device and wiring board |
| CN104274906A (en) * | 2013-07-05 | 2015-01-14 | 深圳迈瑞生物医疗电子股份有限公司 | Automated external defibrillator, front end measuring system thereof and measuring method |
| CN104734651A (en) * | 2015-03-26 | 2015-06-24 | 北京卓越信通电子股份有限公司 | Circuit for achieving power amplification of shared audios of analog audio source and differential audio source |
-
2017
- 2017-06-08 CN CN201710428490.9A patent/CN107124819A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1035949A (en) * | 1987-06-29 | 1989-10-04 | 通用电气公司 | The data converter that is used for the CT data collecting system |
| CN102737002A (en) * | 2011-04-15 | 2012-10-17 | 夏普株式会社 | Interface device and wiring board |
| CN104274906A (en) * | 2013-07-05 | 2015-01-14 | 深圳迈瑞生物医疗电子股份有限公司 | Automated external defibrillator, front end measuring system thereof and measuring method |
| CN104734651A (en) * | 2015-03-26 | 2015-06-24 | 北京卓越信通电子股份有限公司 | Circuit for achieving power amplification of shared audios of analog audio source and differential audio source |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109359070A (en) * | 2018-08-07 | 2019-02-19 | 中国航空无线电电子研究所 | High-speed bus switching module based on electronic switch |
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Application publication date: 20170901 |