CN107068708A - 一种浮栅忆阻器 - Google Patents

一种浮栅忆阻器 Download PDF

Info

Publication number
CN107068708A
CN107068708A CN201710177991.4A CN201710177991A CN107068708A CN 107068708 A CN107068708 A CN 107068708A CN 201710177991 A CN201710177991 A CN 201710177991A CN 107068708 A CN107068708 A CN 107068708A
Authority
CN
China
Prior art keywords
nanometers
layer
nano cell
electrode
memristor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201710177991.4A
Other languages
English (en)
Other versions
CN107068708B (zh
Inventor
黄安平
张新江
胡琪
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Beihang University
Original Assignee
Beihang University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Beihang University filed Critical Beihang University
Priority to CN201710177991.4A priority Critical patent/CN107068708B/zh
Priority to US15/674,206 priority patent/US10083974B1/en
Publication of CN107068708A publication Critical patent/CN107068708A/zh
Application granted granted Critical
Publication of CN107068708B publication Critical patent/CN107068708B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/30—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology
    • G06N3/049—Temporal neural networks, e.g. delay elements, oscillating neurons or pulsed inputs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G06N3/065—Analogue means
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/54—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using elements simulating biological cells, e.g. neuron
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5614—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using conductive bridging RAM [CBRAM] or programming metallization cells [PMC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42324—Gate electrodes for transistors with a floating gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7841—Field effect transistors with field effect produced by an insulated gate with floating body, e.g. programmable transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/20—DRAM devices comprising floating-body transistors, e.g. floating-body cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/70—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/30—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors
    • H10B63/34—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors of the vertical channel field-effect transistor type
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
    • H10B63/84—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays
    • H10B63/845—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays the switching components being connected to a common vertical conductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H10N70/231—Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H10N70/24—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H10N70/24—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
    • H10N70/245—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies the species being metal cations, e.g. programmable metallization cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/821—Device geometry
    • H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/883—Oxides or nitrides
    • H10N70/8833—Binary metal oxides, e.g. TaOx
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/77—Array wherein the memory element being directly connected to the bit lines and word lines without any access device being used

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Biomedical Technology (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Molecular Biology (AREA)
  • General Health & Medical Sciences (AREA)
  • Biophysics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Data Mining & Analysis (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • Computational Linguistics (AREA)
  • Artificial Intelligence (AREA)
  • Evolutionary Computation (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Neurology (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)

Abstract

本发明涉及一种浮栅忆阻器，其基本结构依次包括前电极，前介质层，前浮栅层，纳米电池阳极，纳米电池电解质，纳米电池阴极，后浮栅层，后介质层，后电极；其中前电极、前介质层、前浮栅层和纳米电池阳极模拟了突触前膜，利用电子隧穿和场效应将电子信号转化为离子信号，纳米电池电解质作为离子通道模拟了突触间隙，纳米电池阴极、后浮栅、后介质层和后电极模拟了突触后膜，将离子信号转化为电子信号。本发明所述的浮栅忆阻器读写稳定，可控性好，且其结构简单，兼容CMOS，易于集成，可大规模生产和商业化，可促进神经形态计算和类脑计算发展。

Description

一种浮栅忆阻器
技术领域
本发明一种浮栅忆阻器，涉及基于忆阻器的神经形态计算领域，尤其涉及一种基于纳米电池和晶体管浮栅的离子型突触忆阻器。
背景技术
基于神经网络的智能学习系统已经取得了令人瞩目的成就，诸如谷歌DeepMind公司的围棋人工智能AlphaGo，卡耐基梅隆大学的德州扑克程序，斯坦福大学的皮肤癌识别程序。基于神经网络的人工智能系统已经涉及金融、医疗、交通和环境领域中的方方面面。神经网络的基本构建单元是神经突触和神经元，长期以来，人们一直尝试开发电子突触，1971年，加州伯克利大学电子工程系蔡少棠教授首先提出忆阻器模型，2008年HP公司发现了忆阻器，并且测试器件表现出了突触行为，这极大地促进了人们对忆阻器的研究。
目前，不同材料和结构的忆阻器已被广泛研究。从忆阻材料看，主要分为氧化物忆阻器、固体电解质忆阻器、有机和聚合物材料忆阻器、氮化物忆阻器等。从结构看，主要有二端金属-氧化物-金属构型忆阻器和三端场效应构型忆阻神经突触。其中，二端忆阻器，是最早被开发出来的忆阻器，不仅具有开关速度快、能耗低、尺寸小、非易失性存储等优点，更重要的是具备非线性记忆等特征，已被广泛研究。然而，随着研究深入，金属-氧化物-金属构型忆阻器存在忆阻行为不稳定、可控性差、读/写噪声大等问题，限制了其在类脑计算器件中应用。基于三端场效应构型忆阻神经突触通过栅极电压调控离子型电池阴极材料中的阳离子浓度，引起阴极材料电子电导的变化，电导变化可从源漏极电压电流测出，这使得它的阻变依赖导电通道中的离子浓度，而不必引起器件结构性变化，使得其忆阻特性得到了显著改善，尤其是读/写噪声得到了有效抑制，但其三端架构不利于器件尺寸的进一步微缩，严重制约该类器件在神经形态器件领域的可能应用。
神经突触的最重要功能是其可塑性，因为有了可塑性，神经网络才具备了学习能力。神经突触的作用是将上一个神经元中电位信号变为化学信号，传递给下一个神经元，其电位传递依赖的是生物细胞膜中的钠钾泵，钠钾泵可将细胞外相对细胞内较低浓度的钾离子送进细胞，并将细胞内相对细胞外较低浓度的钠离子送出细胞，通过对离子的输运来调控细胞电位。这反映出二端突触器件能更好地模拟突触行为，为了模拟离子从突触前膜传递到突触后膜的过程，可以使用纳米电池。纳米电池可以通过外部电场精确地调控正负极材料的离子浓度，模拟了离子从突触前膜传递到突触后膜的过程。然而，要想读出离子分布变化引起的电导变化，使用二端器件却十分困难，因为电子基本无法通过纳米电池的电介质，而离子的迁移历史只表现为正负极材料中的离子浓度，这就需要引入新的结构去记录和读取纳米电池中的离子迁移历史，以此来模拟突触行为。
发明内容
针对现有的二端忆阻器和三端忆阻器存在的上述问题，本发明提出了浮栅忆阻器，可以模拟生物学神经突触，可以应用于神经形态计算领域和类脑计算领域。
本发明的技术方案是，一种浮栅忆阻器，所述离子种类包括各种碱金属元素或碱土金属元素，例如锂(Li+)、钠(Na+)、钾(K+)、钙(Ca2+)等中的至少一种或两种以上的组合。
本发明采用以下技术方案，如图1所示：
本发明的一种浮栅忆阻器，其基本结构依次包括前电极，前介质层，前浮栅层，纳米电池阳极，纳米电池电解质，纳米电池阴极，后浮栅层，后介质层，后电极，如图2所示。
其中前电极、前介质层、前浮栅层和纳米电池阳极模拟了突触前膜，利用电子隧穿和场效应将电子信号转化为离子信号，纳米电池电解质作为离子通道模拟了突触间隙，纳米电池阴极、后浮栅、后介质层和后电极模拟了突触后膜，将离子信号转化为电子信号，完成一次激活，突触权重表现为纳米电池中离子的迁移历史和前、后浮栅层中储存的电子数量。
本发明所述的浮栅忆阻器利用纳米电池中的电化学反应使电池系统内的碱金属或碱土金属离子在正负电极迁移。利用晶体管中的浮栅结构通过场效应引起电池中的碱金属或碱土金属离子迁移，并通过电子的隧穿机制记录和读取纳米电池中碱金属或碱土金属离子的迁移历史，如图3所示。
对本发明的一种浮栅忆阻器进一步描述如下：
其中，所述前、后电极用于连接外部电源，厚度分别为20纳米～40纳米，采用惰性电极，例如铂(Pt)或者金(Au)。
其中，所述前、后浮栅层用于储存从前、后电极隧穿过来的电子并提供电场诱导纳米电池中的碱金属或碱土金属离子迁移。前、后浮栅层厚度分别为4纳米～10纳米，前、后浮栅层的材料可包括惰性金属、金属氮化物或掺杂半导体，例如铂(Pt)、金(Au)、掺杂多晶硅(Si)、氮化钽(TaN)等。
其中，所述前、后介质层均可分为电子隧穿层和电子阻挡层，靠近前、后电极部分是电子隧穿层，其作用是使电子在前电极和前浮栅层、后电极和后浮栅层之间通过电场作用隧穿并产生隧穿电流，电子隧穿层厚度为2纳米～8纳米；靠近电池阴阳极部分是电子阻挡层，其作用是阻挡电子从前、后浮栅层隧穿进入纳米电池，电子阻挡层厚度为6纳米～12纳米。前介质层加前浮栅层总厚度为12纳米～30纳米。后介质层加后浮栅层总厚度为12纳米～30纳米。前、后介质层材料包括各种高K介质，例如二氧化钛(TiO2)、氮化硅(Si3N4)、二氧化铪(HfO2)、五氧化二钽(Ta2O5)、氧化锆(ZrO2)、氧化铝(Al2O3)、二氧化硅(SiO2)等中的至少一种。
其中，所述纳米电池阳极作为碱金属或碱土金属离子的暂存区，其厚度为4纳米～10纳米，其材料包括碱金属元素化合物、碱土金属元素化合物或半导体氧化物，例如钛酸锂(Li4Ti5O12)，多晶硅(Si)，氧化钛(TiO2)，氧化钒(V2O5)。
其中，所述纳米电池电解质作为碱金属或碱土金属离子的输运通道，使得离子容易通过而电子很难通过，其厚度为6纳米～20纳米，材料包括碱金属或碱土金属化合物，例如锂磷氧氮(LiPON)、钽酸锂(LiTaO3)、铌酸锂(LiNiO3)等。
其中，所述纳米电池阴极作为碱金属或者碱土金属离子源，在浮栅电场诱导下，经过电化学反应驱动，使得离子输运到纳米电池阳极。其厚度为4纳米～12纳米，其材料包括碱金属或碱土金属元素化合物，例如钴酸锂(LiCoO2)、镍酸锂(LiNiO2)、锰酸锂(LiMn2O4)、磷酸亚铁锂(LiFePO4)等。
所述浮栅忆阻器的工作原理：
通过前后浮栅层中的电子记录中间纳米电池的离子输运历史。前后浮栅层和前后电极间通过隧穿实现电子输运，浮栅层和纳米电池层通过电场效应驱动电池中的电化学反应进行离子输运。
电子从前电极隧穿进前浮栅层后，引起纳米电池阳极材料中的电荷分布发生变化，具体来讲，纳米电池阳极材料需要额外的阳离子以中和前浮栅层电子电场，这样一来，纳米电池阴极中的阳离子便被诱导从纳米电池阴极穿到阳极，纳米电池阴极材料中的阳离子走后，富余出来的电子又会引起后浮栅层中的电子隧穿进入后电极。
在写入过程中，通过对前电极施加脉冲使得电子隧穿进入前浮栅层，引起纳米电池中的碱金属或碱土金属离子的分布发生变化，如果后电极能输出脉冲电流，则说明完成一次激活。每完成一次激活，前浮栅层中的电子浓度，纳米电池正负极中的碱金属或碱土金属离子浓度，以及后浮栅层中的电子浓度会发生变化，每一种浓度分布记做一个状态，那么，随着激活次数的增加，器件将越来越容易被激活，如果对前电极施加反向电压，则将抑制后电极下次产生隧穿电流，这种机制很好的模拟了神经生物突触的可塑性。
本发明具有如下特点：
1.本发明利用纳米电池电化学反应和浮栅结构隧穿效应实现电子/离子耦合作用的分离，消除电子/离子耦合作用对忆阻器读/写过程的影响，提高忆阻器的可控性。
2.本发明结合纳米电池和半导体浮栅工艺很好的模拟了神物神经突触的可塑性，在结构和功能上与生物神经突触更加接近，可有效促进基于神经突触可塑性的神经网络研究和类脑研究，所采用的两端结构有利于crossbar(即CrossPoint，交叉开关矩阵或纵横式交换矩阵)结构集成，如图4所示,并且能够兼容CMOS(Complementary Metal OxideSemiconductor，互补金属氧化物半导体)技术,这使得器件可以大规模集成。
3.本发明采取的纳米电池在电池行业已经获得了广泛的应用,所采取的半导体浮栅工艺已广泛应用于闪存技术中，这有利于浮栅忆阻器的大规模生产及产业化应用。
附图说明
图1为本发明所述浮栅忆阻器的技术方案图。
图2为本发明所述浮栅忆阻器的结构图。
图3为本发明所述浮栅忆阻器的原理图。
图4为本发明所述浮栅忆阻器crossbar结构示意图。
图中具体标号如下：101-后电极；102-后介质层；103-后浮栅层；104-纳米电池阴极；105-纳米电池电解质；106-纳米电池阳极；107-前介质层；
108-前浮栅层；109-前电极；201-基底；301-突触前膜；302-突触间隙；
303-突触后膜；1-人工突触；3-生物突触；N-纳米电池；S-半导体浮栅
具体实施方式
本发明结合附图实施例作进一步详细说明，以下所述实施例旨在便于对本发明的了解，其特定的结构细节和功能细节仅是表示描述示例实施例的目的，对其不起任何限定作用。因此，可以以许多可选形式来实施本发明，且本发明不应该被理解为仅仅局限于在此提出的示例实施例，而是应该覆盖落入本发明范围内的所有变化、等价物和可替换物。
实施例1：
本实施例涉及的一种浮栅忆阻器结构如图2所示，一种基于纳米电池和晶体管浮栅的离子型突触忆阻器，器件的基本结构依次包括后电极101，后介质层102，后浮栅层103，纳米电池阴极104，纳米电池电解质105，纳米电池阳极106，前介质层107，前浮栅层108，前电极109。后电极101采用30纳米的铂；后介质层102采用氧化铝，其中电子隧穿层厚度为4纳米，电子阻挡层厚度为10纳米；后浮栅层103采用6纳米的氮化钽；纳米电池阴极104采用4纳米的钴酸锂；纳米电池电解质105采用10纳米的锂磷氧氮；纳米电池阳极106采用6纳米的钛酸锂；前介质层107采用厚度为20纳米的氧化铝，其中电子隧穿层厚度为4纳米，电子阻挡层厚度为10纳米；前浮栅层108采用6纳米的氮化钽；前电极109采用30纳米的铂。
本发明实施例1的结构通过采用等离子体增强脉冲激光沉积(PLD)技术、超高真空多靶磁控溅射与半导体光刻工艺等相结合，由下至上在基底上逐层制备。首先，在平整洁净的基底201上，采用磁控溅射制备一层金属铂作为后电极101，然后采用脉冲激光沉积在后电极101上表面沉积一层氧化铝薄膜作为电子隧穿层，再在电子隧穿层上采用磁控溅射制备一层氮化钽并进行光刻及湿法刻蚀作为后浮栅层103，在后浮栅层上使用脉冲激光沉积制备氧化铝薄膜作为电子阻挡层，完成后介质层102；在后介质层102上使用脉冲激光沉积制备钴酸锂薄膜作为纳米电池阴极104；在纳米电池阴极104上采用脉冲激光沉积制备一层锂磷氧氮薄膜作为纳米电池电解质105；在纳米电池电解质105上采用脉冲激光沉积制备一层钛酸锂作为纳米电池阳极106；在纳米电池阳极106上采用脉冲激光沉积制备一层氧化铝薄膜作为电子阻挡层，再在电子阻挡层上采用磁控溅射制备一层氮化钽并进行光刻及湿法刻蚀作为前浮栅层108，在前浮栅层上使用脉冲激光沉积制备氧化铝薄膜作为电子隧穿层，完成前介质层107；最后在前介质层107表面采用磁控溅射制备一层金属铂作为前电极109。
在写入过程中，对前电极施加电流脉冲使得电子隧穿进入前浮栅层，通过前浮栅层的场效应诱导纳米电池中的锂离子从钴酸锂经过锂磷氧氮移向钛酸锂迁移，引起纳米电池中的锂离子分布发生变化，钴酸锂中富余的电子通过场效应使得电子从后浮栅层隧穿进入后电极，使得后电极输出脉冲电流，完成一次激活。每完成一次激活，前浮栅层中的电子浓度，纳米电池正负极中的锂离子浓度，以及后浮栅层中的电子浓度会发生变化，每一种浓度分布记做一个状态，那么，随着激活次数的增加，器件将越来越容易被激活，如果对前电极施加反向电压，则将抑制后电极下次产生隧穿电流，这种机制很好的模拟了神经生物突触的可塑性。

Claims (8)

1.一种浮栅忆阻器，其特征在于：该浮栅忆阻器的基本结构依次包括前电极，前介质层，前浮栅层，纳米电池阳极，纳米电池电解质，纳米电池阴极，后浮栅层，后介质层，后电极；其中前电极、前介质层、前浮栅层和纳米电池阳极模拟了突触前膜，利用电子隧穿和场效应将电子信号转化为离子信号，纳米电池电解质作为离子通道模拟了突触间隙，纳米电池阴极、后浮栅、后介质层和后电极模拟了突触后膜，将离子信号转化为电子信号。
2.根据权利要求1所述的一种浮栅忆阻器，其特征在于：所述前电极、后电极用于连接外部电源，厚度分别为20纳米～40纳米；所述前、后浮栅层厚度分别为4纳米～10纳米；所述前、后介质层均可分为电子隧穿层和电子阻挡层，靠近前、后电极部分是电子隧穿层，电子隧穿层厚度为2纳米～8纳米，靠近电池阴阳极部分是电子阻挡层，电子阻挡层厚度为6纳米～12纳米；前介质层加前浮栅层总厚度为12纳米～30纳米，后介质层加后浮栅层总厚度为12纳米～30纳米；所述纳米电池阳极厚度为4纳米～10纳米；所述纳米电池电解质厚度为6纳米～20纳米；所述纳米电池阴极厚度为4纳米～12纳米。
3.根据权利要求1所述的一种浮栅忆阻器，其特征在于：所述前、后电极，采用惰性电极，包括但不限于铂(Pt)或者金(Au)。
4.根据权利要求1所述的一种浮栅忆阻器，其特征在于：所述前、后浮栅层的材料为惰性金属、金属氮化物或掺杂半导体，包括但不限于铂(Pt)、金(Au)、掺杂多晶硅(Si)、氮化钽(TaN)中的一种。
5.根据权利要求1所述的一种浮栅忆阻器，其特征在于：所述前、后介质层均可分为电子隧穿层和电子阻挡层，靠近前、后电极部分是电子隧穿层，靠近电池阴阳极部分是电子阻挡层；前、后介质层材料为各种高K介质，包括但不限于二氧化钛(TiO2)、氮化硅(Si3N4)、二氧化铪(HfO2)、五氧化二钽(Ta2O5)、氧化锆(ZrO2)、氧化铝(Al2O3)、二氧化硅(SiO2)中的至少一种。
6.根据权利要求1所述的一种浮栅忆阻器，其特征在于：所述纳米电池阳极的材料为碱金属元素化合物、碱土金属元素化合物或半导体氧化物，包括但不限于钛酸锂(Li4Ti5O12)，多晶硅(Si)，氧化钛(TiO2)，氧化钒(V2O5)中的一种。
7.根据权利要求1所述的一种浮栅忆阻器，其特征在于：所述纳米电池电解质的材料为碱金属或碱土金属化合物，包括但不限于锂磷氧氮(LiPON)、钽酸锂(LiTaO3)、铌酸锂(LiNiO3)中的一种。
8.根据权利要求1所述的一种浮栅忆阻器，其特征在于：所述纳米电池阴极的材料为碱金属或碱土金属元素化合物，包括但不限于钴酸锂(LiCoO2)、镍酸锂(LiNiO2)、锰酸锂(LiMn2O4)、磷酸亚铁锂(LiFePO4)中的一种。
CN201710177991.4A 2017-03-23 2017-03-23 一种浮栅忆阻器 Expired - Fee Related CN107068708B (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201710177991.4A CN107068708B (zh) 2017-03-23 2017-03-23 一种浮栅忆阻器
US15/674,206 US10083974B1 (en) 2017-03-23 2017-08-10 Floating memristor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201710177991.4A CN107068708B (zh) 2017-03-23 2017-03-23 一种浮栅忆阻器

Publications (2)

Publication Number Publication Date
CN107068708A true CN107068708A (zh) 2017-08-18
CN107068708B CN107068708B (zh) 2019-08-06

Family

ID=59620309

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710177991.4A Expired - Fee Related CN107068708B (zh) 2017-03-23 2017-03-23 一种浮栅忆阻器

Country Status (2)

Country Link
US (1) US10083974B1 (zh)
CN (1) CN107068708B (zh)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108962316A (zh) * 2018-06-25 2018-12-07 华中科技大学 基于忆阻器和cmos的内容可寻址存储单元及数据搜索匹配方法
CN109148686A (zh) * 2018-08-24 2019-01-04 中国科学院化学研究所 基于有机晶体管的仿生适应型感受器及其制备方法与应用
WO2019106475A1 (en) * 2017-11-30 2019-06-06 International Business Machines Corporation Multi-state device based on ion trapping
US10467524B1 (en) 2018-06-06 2019-11-05 International Business Machines Corporation Three-terminal neuromorphic vertical sensing
US10748917B2 (en) * 2017-05-04 2020-08-18 Commissariat A L'energie Atomique Et Aux Energies Alternatives Semiconductor memory component integrating a nano-battery, semiconductor device including such a component and method using such a device
CN112634959A (zh) * 2020-11-30 2021-04-09 光华临港工程应用技术研发(上海)有限公司 深层神经网络权重存储器件及其制备方法、电子装置
CN113113535A (zh) * 2021-03-30 2021-07-13 天津理工大学 一种基于MoS2的全固态电解质忆阻器及其制备方法

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10429343B1 (en) * 2017-02-09 2019-10-01 National Technology & Engineering Solutions Of Sandia, Llc Tunable ionic electronic transistor
US10340447B2 (en) * 2017-06-07 2019-07-02 International Business Machines Corporation Three-terminal metastable symmetric zero-volt battery memristive device
FR3076052B1 (fr) * 2017-12-22 2021-12-31 Commissariat Energie Atomique Memoire resistive en trois dimensions et procede permettant d'obtenir une telle memoire
US11823808B2 (en) 2018-09-19 2023-11-21 University Of Massachusetts Conductive composite materials fabricated with protein nanowires
US11825758B2 (en) 2019-02-22 2023-11-21 Massachusetts Institute Of Technology Resistive switching devices containing lithium titanate, and associated systems and methods
CN109978019B (zh) * 2019-03-07 2023-05-23 东北师范大学 图像模式识别模拟与数字混合忆阻设备及制备，实现stdp学习规则和图像模式识别方法
US11227212B2 (en) 2019-04-08 2022-01-18 International Business Machines Corporation Non-volatile resistive processing unit
US10903420B2 (en) 2019-04-16 2021-01-26 International Business Machines Corporation Lithium-compound based solid state memristor device for neuromorphic computing
US11250315B2 (en) * 2019-10-29 2022-02-15 International Business Machines Corporation Electrochemical device of variable electrical conductance
US11201284B2 (en) 2020-03-24 2021-12-14 International Business Machines Corporation Magnesium ion based synaptic device
US11631824B2 (en) * 2020-04-08 2023-04-18 University Of Massachusetts Memristor device comprising protein nanowires
US11982637B2 (en) 2020-04-22 2024-05-14 University Of Massachusetts Sensors comprising electrically-conductive protein nanowires
CN111628078B (zh) * 2020-06-02 2022-09-06 西安电子科技大学 基于二维和三维钙钛矿复合结构的突触晶体管及其制备方法
US11133063B1 (en) 2020-06-22 2021-09-28 International Business Machines Corporation Suppressing undesired programming at half-selected devices in a crosspoint array of 3-terminal resistive memory
JP7525656B2 (ja) 2020-06-25 2024-07-30 レイン・ニューロモーフィックス・インコーポレーテッド リソグラフィックメモリスティブアレイ
CN111785828B (zh) * 2020-07-03 2022-09-09 北京航空航天大学 基于斯格明子的人工突触器件
JP7532284B2 (ja) * 2021-02-24 2024-08-13 株式会社東芝 不揮発性メモリデバイス
CN115835769A (zh) * 2022-10-18 2023-03-21 苏州科技大学 一种氢键有机框架纳米复合材料及其制备方法和应用

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101593810A (zh) * 2009-07-02 2009-12-02 黑龙江大学 纳米结构快速开关忆阻器及其制造方法
US8415652B2 (en) * 2010-06-21 2013-04-09 Hewlett-Packard Development Company, L.P. Memristors with a switching layer comprising a composite of multiple phases
US8737113B2 (en) * 2010-02-08 2014-05-27 Hewlett-Packard Development Company, L.P. Memory resistor having multi-layer electrodes
CN106299114A (zh) * 2016-09-09 2017-01-04 中国科学院宁波材料技术与工程研究所 一种忆阻器

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8586961B2 (en) * 2008-05-09 2013-11-19 The Board Of Trustees Of The University Of Illinois Resistive changing device
TWI469224B (zh) * 2008-10-20 2015-01-11 Ind Tech Res Inst 有機薄膜電晶體及其製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101593810A (zh) * 2009-07-02 2009-12-02 黑龙江大学 纳米结构快速开关忆阻器及其制造方法
US8737113B2 (en) * 2010-02-08 2014-05-27 Hewlett-Packard Development Company, L.P. Memory resistor having multi-layer electrodes
US8415652B2 (en) * 2010-06-21 2013-04-09 Hewlett-Packard Development Company, L.P. Memristors with a switching layer comprising a composite of multiple phases
CN106299114A (zh) * 2016-09-09 2017-01-04 中国科学院宁波材料技术与工程研究所 一种忆阻器

Cited By (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10748917B2 (en) * 2017-05-04 2020-08-18 Commissariat A L'energie Atomique Et Aux Energies Alternatives Semiconductor memory component integrating a nano-battery, semiconductor device including such a component and method using such a device
GB2581902A (en) * 2017-11-30 2020-09-02 Ibm Multi-state device based in ion trapping
CN111279467B (zh) * 2017-11-30 2023-09-29 国际商业机器公司 基于离子阱的多状态器件
WO2019106475A1 (en) * 2017-11-30 2019-06-06 International Business Machines Corporation Multi-state device based on ion trapping
GB2581902B (en) * 2017-11-30 2022-04-20 Ibm Multi-state device based in ion trapping
US10886124B2 (en) 2017-11-30 2021-01-05 International Business Machines Corporation Multi-state device based on ion trapping
US10559463B2 (en) 2017-11-30 2020-02-11 International Business Machines Corporation Multi-state device based on ion trapping
CN111279467A (zh) * 2017-11-30 2020-06-12 国际商业机器公司 基于离子阱的多状态器件
US10936944B2 (en) 2018-06-06 2021-03-02 International Business Machines Corporation Three-terminal neuromorphic vertical sensing
US10885431B2 (en) 2018-06-06 2021-01-05 International Business Machines Corporation Three-terminal neuromorphic vertical sensing
US10467524B1 (en) 2018-06-06 2019-11-05 International Business Machines Corporation Three-terminal neuromorphic vertical sensing
CN108962316B (zh) * 2018-06-25 2020-09-08 华中科技大学 基于忆阻器和cmos的内容可寻址存储单元及数据搜索匹配方法
CN108962316A (zh) * 2018-06-25 2018-12-07 华中科技大学 基于忆阻器和cmos的内容可寻址存储单元及数据搜索匹配方法
CN109148686B (zh) * 2018-08-24 2020-01-31 中国科学院化学研究所 基于有机晶体管的仿生适应型感受器及其制备方法与应用
CN109148686A (zh) * 2018-08-24 2019-01-04 中国科学院化学研究所 基于有机晶体管的仿生适应型感受器及其制备方法与应用
CN112634959A (zh) * 2020-11-30 2021-04-09 光华临港工程应用技术研发(上海)有限公司 深层神经网络权重存储器件及其制备方法、电子装置
CN113113535A (zh) * 2021-03-30 2021-07-13 天津理工大学 一种基于MoS2的全固态电解质忆阻器及其制备方法

Also Published As

Publication number Publication date
US20180277552A1 (en) 2018-09-27
CN107068708B (zh) 2019-08-06
US10083974B1 (en) 2018-09-25

Similar Documents

Publication Publication Date Title
CN107068708B (zh) 一种浮栅忆阻器
Jiang et al. Emerging synaptic devices: from two-terminal memristors to multiterminal neuromorphic transistors
Dai et al. Recent advances in transistor‐based artificial synapses
CN106992249B (zh) 一种具有量子电导效应的离子型忆阻器
CN106910773B (zh) 多栅极神经元晶体管及其制备方法和构成的神经网络
He et al. Recent progress on emerging transistor‐based neuromorphic devices
Cao et al. Memristor-based neural networks: a bridge from device to artificial intelligence
CN110289317B (zh) 铁电石墨烯晶体管及基于它的互补型突触器件和调控方法
CN109148683A (zh) 一种基于黑磷和黑磷氧化物的范德华异质结忆阻器
Zhou et al. Solution-processed chitosan-gated IZO-based transistors for mimicking synaptic plasticity
Zhu et al. Recent advances in emerging neuromorphic computing and perception devices
Monalisha et al. Emulation of synaptic plasticity on a cobalt-based synaptic transistor for neuromorphic computing
TW200307220A (en) Integrated circuit apparatus and neuro element
Shen et al. Artificial synaptic performance with learning behavior for memristor fabricated with stacked solution-processed switching layers
KR102685665B1 (ko) 비휘발성 메모리 디바이스
Tian et al. Bivariate-continuous-tunable interface memristor based on Bi 2 S 3 nested nano-networks
Wu et al. Dynamic resistive switching devices for neuromorphic computing
Xue et al. Native drift and Mott nanochannel in layered V2O5 film for synaptic and nociceptive simulation
Park et al. Robust 2D MoS2 artificial synapse device based on a lithium silicate solid electrolyte for high-precision analogue neuromorphic computing
JP6915744B2 (ja) 抵抗変化素子及びその製造方法、記憶装置
Zhou et al. Recent advances in In-memory computing: exploring memristor and memtransistor arrays with 2D materials
Chen et al. Perspective on oxide-based three-terminal artificial synapses in physical neural networks
CN112349788B (zh) 一种二维/零维混合结构的人工异质突触器件及制备方法
Wang et al. Bio‐Voltage Memristors: From Physical Mechanisms to Neuromorphic Interfaces
Kwak et al. Electrochemical random-access memory: recent advances in materials, devices, and systems towards neuromorphic computing

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20190806

Termination date: 20210323