CN107065339A - A kind of array base palte, display panel and display device - Google Patents
A kind of array base palte, display panel and display device Download PDFInfo
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- CN107065339A CN107065339A CN201610956449.4A CN201610956449A CN107065339A CN 107065339 A CN107065339 A CN 107065339A CN 201610956449 A CN201610956449 A CN 201610956449A CN 107065339 A CN107065339 A CN 107065339A
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- gate line
- array base
- base palte
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- protection structure
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136204—Arrangements to prevent high voltage or static electricity failures
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2202/00—Materials and properties
- G02F2202/22—Antistatic materials or arrangements
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Optics & Photonics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Liquid Crystal (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The embodiment of the invention discloses a kind of array base palte, display panel and display device.The array base palte includes：Substrate, and the gate line on the substrate；The array base palte includes viewing area and the non-display area around the viewing area；The gate line includes the first grid polar curve positioned at the viewing area, and extends to the second gate line of the non-display area, and described second gate line one end is electrically connected with the first grid polar curve, and the other end is electrically connected with the gate driving circuit in the non-display area；Second gate line electrostatic protection structure is provided with the non-display area.The embodiment of the present invention improves the antistatic ability of wounding of gate line.
Description
Technical field
The present embodiments relate to Display Technique, more particularly to a kind of array base palte, display panel and display device.
Background technology
With the development of Display Technique, the display effect of display product is constantly improved, so that liquid crystal display is produced
The application of product is more and more extensive.
In existing design, show that some film layers easily produce electrostatic in the array base palte of product, such as friction matching film is rubbing
Electric charge can be produced during wiping orientation, easily occurs Electro-static Driven Comb when charge accumulated, easily wounds or strike off gate line, is influenceed
Image is shown.
The content of the invention
The present invention provides a kind of array base palte, display panel and display device, is wounded with improving the antistatic of gate line
Ability.
In a first aspect, the embodiments of the invention provide a kind of array base palte, the array base palte includes：
Substrate, and the gate line on the substrate；
The array base palte includes viewing area and the non-display area around the viewing area；The gate line includes being located at institute
State the first grid polar curve of viewing area, and extend to the second gate line of the non-display area, described second gate line one end with
The first grid polar curve electrical connection, the other end is electrically connected with the gate driving circuit in the non-display area；
Second gate line electrostatic protection structure is provided with the non-display area.
Second aspect, the embodiment of the present invention additionally provides a kind of display panel, and it is any that the display panel includes the present invention
Array base palte described in embodiment.
The third aspect, the embodiment of the present invention additionally provides a kind of display device, and it is any that the display device includes the present invention
Display panel described in embodiment.
Gate line includes the first grid polar curve positioned at the viewing area in array base palte provided in an embodiment of the present invention, and
The second gate line of the non-display area is extended to, described second gate line one end is electrically connected with the first grid polar curve, another
End is electrically connected with the gate driving circuit in the non-display area, and second gate line electrostatic protection is provided with the non-display area
Structure, by setting second gate line electrostatic protection structure, it is to avoid second gate line is wounded due to Electro-static Driven Comb, is improved
The antistatic ability of wounding of gate line, so as to improve the job stability of array base palte.
Brief description of the drawings
Fig. 1 is a kind of floor map of array base palte in the embodiment of the present invention；
Fig. 2 is the diagrammatic cross-section in the A-A directions along along Fig. 1；
Fig. 3 is the floor map of another array base palte in the embodiment of the present invention；
Fig. 4 is the diagrammatic cross-section in the B-B directions along along Fig. 3；
Fig. 5 is the floor map of another array base palte in the embodiment of the present invention；
Fig. 6 is the diagrammatic cross-section in the C-C directions along along Fig. 5；
Fig. 7 is the floor map of another array base palte in the embodiment of the present invention；
Fig. 8 is the diagrammatic cross-section in the D-D directions along along Fig. 7；
Fig. 9 is the diagrammatic cross-section of another array base palte in the embodiment of the present invention；
Figure 10 is a kind of schematic diagram of display panel in the embodiment of the present invention；
Figure 11 is a kind of schematic diagram of display device in the embodiment of the present invention.
Embodiment
The present invention is described in further detail with reference to the accompanying drawings and examples.It is understood that this place is retouched
The specific embodiment stated is used only for explaining the present invention, rather than limitation of the invention.It also should be noted that, in order to just
Part related to the present invention rather than entire infrastructure are illustrate only in description, accompanying drawing.
Present embodiments provide a kind of array base palte, Fig. 1 is that a kind of plane of array base palte in the embodiment of the present invention is shown
It is intended to, Fig. 2 is the diagrammatic cross-section in the A-A directions along along Fig. 1, with reference to Fig. 1 and Fig. 2, and the array base palte can include：
Substrate 10, and the gate line 20 on substrate 10.Array base palte includes viewing area 30 and around viewing area 30
Non-display area 40.Gate line 20 includes the first grid polar curve 210 positioned at viewing area 30, and extends to the of non-display area 40
Two gate lines 220, one end of second gate line 220 is electrically connected with first grid polar curve 210, the other end and the grid in non-display area 40
Drive circuit 50 is electrically connected.Second gate line electrostatic protection structure 230 is provided with non-display area 40.
Specifically, gate driving circuit 50 is by driving gate line 20 to realize multiple pictures in array substrate viewing area 30
The gating of plain unit, so as to realize that image is shown.Second gate line electrostatic protection structure 230 is used to prevent array base palte non-display
Second grid 220 is wounded or struck off by the Electro-static Driven Comb of other film layer structures in area 40, and causes the failure effect of gate line 20 battle array
Row substrate works, and by setting second gate line electrostatic protection structure 230, improves the antistatic of second gate line 220 and wounds
Ability, so as to improve the job stability of array base palte.
Optionally, with reference to Fig. 1, along the direction vertical with the bearing of trend of gate line 20, the width D 2 of second gate line 220 is big
In the width D 1 of first grid polar curve 210, second gate line electrostatic protection structure 230 is second gate line 220.
Specifically, second gate line electrostatic protection structure 230 is the broadening second gate line 220 of width.By broadening
The width D 2 of second gate line 220 so that second gate line 220 is difficult to be struck off by electrostatic, enhances the anti-of second gate line 220
Damage by static electricity ability.Wherein, the width D 2 of second gate line 220 can be set according to the intensity of electrostatic, not do specific
Limit.
Fig. 3 is the floor map of another array base palte in the embodiment of the present invention, and Fig. 4 is the B-B directions along along Fig. 3
Diagrammatic cross-section.Optionally, with reference to Fig. 3 and Fig. 4, second gate line electrostatic protection structure 230 is multiple first metal wires.First
Metal wire is located at side of the place film layer away from substrate 10 of gate line 20.Upright projection and second of first metal wire in substrate 10
Gate line 220 is at least partly overlapping in the upright projection of substrate 10.
Specifically, the film layer due to producing electrostatic, such as alignment film 90 is normally at one of gate line 20 away from substrate 10
Side, therefore by setting multiple first metal wires in side of the place film layer of gate line 20 away from substrate 10 so that when quiet release
When, electrostatic charge is directly acted on the first metal wire, it is to avoid second gate line 220 destruction by electrostatic field.
Optionally, with reference to Fig. 3, first metal wire has first size S1, edge and grid along the bearing of trend of gate line 20
There is the second size S2, first size S1 and the second size S2 to be all higher than second gate line in the bearing of trend of polar curve 20 vertical direction
220 edges and the width D of the bearing of trend vertical direction of gate line 20.
Specifically, by setting the first size S1 and the second size S2 of the first metal wire to be all higher than second gate line 220
Width D, it is ensured that the first metal wire will not be breakdown when other film layers of array base palte produce Electro-static Driven Comb, so as to realize pair
The protection of second gate line 220.Wherein, the width D of second gate line 220 can be transmitted according to the signal of gate driving circuit 50
Need to be configured, exemplary could be arranged to 3 microns.First size S1 and the second size S2 can be according to electrostatic
Size is set, and is not specifically limited.
Fig. 5 is the floor map of another array base palte in the embodiment of the present invention, and Fig. 6 is the C-C directions along along Fig. 5
Diagrammatic cross-section.Optionally, with reference to Fig. 5 and Fig. 6, multiple first metal wires are electrically connected to form the first overcoat, the first overcoat
Electrically connected with electrostatic impedor 240, earth terminal or ground connection cabling.
Specifically, the first overcoat is second gate line electrostatic protection structure 230, by the way that multiple first metal wires are electrically connected
Connect to form the first overcoat, further increase the antistatic breakdown capability of second gate line electrostatic protection structure 230, further
Improve the job stability of array base palte.In addition, the main function of electrostatic impedor 240 is that the electrostatic that moment produces is carried out
Absorb and suppress so that destruction of first overcoat from electrostatic.By the way that the first overcoat is connected with electrostatic impedor 240,
The antistatic effect of the first overcoat is enhanced, more preferable protective effect is served to second gate line 220.Furthermore it is also possible to
First overcoat is connected with earth terminal or ground connection cabling, with release electrostatic, the antistatic breakdown capability of the first overcoat is improved.
Optionally, with reference to Fig. 4, the array base palte also includes：Insulating barrier 60, planarization layer 70 and passivation layer 80.
Insulating barrier 60 is located at side of the place film layer away from substrate 10 of gate line 20, and it is remote that planarization layer 70 is located at insulating barrier 60
From the side of the place film layer of gate line 20, passivation layer 80 is located at side of the planarization layer 70 away from the place film layer of gate line 20.The
Two gate line electrostatic protection structures 230 are located between insulating barrier 60 and planarization layer 70.Optionally, with reference to Fig. 6, second gate line
Electrostatic protection structure 230 is located between planarization layer 70 and passivation layer 80.
Specifically, by the way that second gate line electrostatic protection structure 230 is arranged between insulating barrier 60 and planarization layer 70
Or between planarization layer 70 and passivation layer 80, the protective action to second gate line 220 can be not only played, and will not be to shadow
The work of other film layers is rung, and the thickness of array base palte will not be increased.
Fig. 7 is the floor map of another array base palte in the embodiment of the present invention, and Fig. 8 is the D-D directions along along Fig. 7
Diagrammatic cross-section.With reference to Fig. 7 and Fig. 8, array base palte also includes a plurality of touch-control cabling 100, second gate line electrostatic protection structure
230 are set with a plurality of touch-control cabling 100 with layer.
In this way, second gate line electrostatic protection structure 230 and touch-control cabling 100 can be in same techniques using same
One material is formed, and saves processing step and process costs, and will not increase the thickness of array base palte.In addition, with reference to Fig. 8,
Touch-control cabling 100 can be arranged between planarization layer 70 and passivation layer 80.It should be noted that merely exemplary in Fig. 7 and Fig. 8
The shape for showing touch-control cabling 100 and position, other film layers in viewing area 30 of array base palte do not show that, not
Limitation of the invention.
Fig. 9 is the diagrammatic cross-section of another array base palte in the embodiment of the present invention, optionally, with reference to Fig. 9, array base palte
Also include thin film transistor (TFT) 110, source layer 111 and drain electrode of the second gate line electrostatic protection structure 230 with thin film transistor (TFT) 110
Layer 112 is set with layer.
In this way, alloing second gate line electrostatic protection structure 230 and source layer 111 and drain electrode layer 112 same
Formed in one technique using same material, save processing step and process costs, and the thickness of array base palte will not be increased.
In addition, with reference to Fig. 9, the source layer 111 and drain electrode layer 112 of thin film transistor (TFT) 110 can be arranged at insulating barrier 60 and planarization layer
Between 70.It should be noted that the source layer 111 and drain electrode layer 112 that show thin film transistor (TFT) 110 merely exemplary in Fig. 9
Shape and position, other film layers in viewing area 30 of array base palte do not show that, not limitation of the invention.
The embodiment of the present invention additionally provides a kind of display panel.Figure 10 is a kind of display panel in the embodiment of the present invention
Schematic diagram, with reference to Figure 10, the display panel includes the array base palte 200 described in any embodiment of the present invention.The display surface
Plate also includes the color membrane substrates 300 that are oppositely arranged with array base palte 200, and positioned at array base palte 200 and color membrane substrates 300 it
Between liquid crystal layer 400.
The embodiment of the present invention additionally provides a kind of display device.Figure 11 is a kind of display device in the embodiment of the present invention
Schematic diagram, with reference to Figure 11, display device 500 includes the display panel 600 described in any embodiment of the present invention.Display device 500
It can be the mobile phone described in Figure 11, or the display device such as tablet personal computer.
Note, above are only presently preferred embodiments of the present invention and institute's application technology principle.It will be appreciated by those skilled in the art that
The invention is not restricted to specific embodiment described here, can carry out for a person skilled in the art it is various it is obvious change,
Readjust and substitute without departing from protection scope of the present invention.Therefore, although the present invention is carried out by above example
It is described in further detail, but the present invention is not limited only to above example, without departing from the inventive concept, also
Other more equivalent embodiments can be included, and the scope of the present invention is determined by scope of the appended claims.
Claims (10)
1. a kind of array base palte, it is characterised in that including：
Substrate, and the gate line on the substrate；
The array base palte includes viewing area and the non-display area around the viewing area；The gate line includes being located at described show
Show the first grid polar curve in area, and extend to the second gate line of the non-display area, described second gate line one end with it is described
First grid polar curve is electrically connected, and the other end is electrically connected with the gate driving circuit in the non-display area；
Second gate line electrostatic protection structure is provided with the non-display area.
2. array base palte according to claim 1, it is characterised in that along the side vertical with the gate line bearing of trend
To the width of the second gate line is more than the width of the first grid polar curve, and the second gate line electrostatic protection structure is
The second gate line.
3. array base palte according to claim 1, it is characterised in that the second gate line electrostatic protection structure is multiple
First metal wire；
Side of the film layer away from the substrate where first metal wire is located at the gate line；
First metal wire the substrate upright projection and the second gate line the substrate upright projection extremely
Small part is overlapped.
4. array base palte according to claim 3, it is characterised in that first metal wire is along the gate line extension side
To with first size, there is the second size, the first size and institute along the direction vertical with the gate line bearing of trend
State the second size and be all higher than the second gate line along the width with the gate line bearing of trend vertical direction.
5. array base palte according to claim 3, it is characterised in that the multiple first metal wire is electrically connected to form first
Overcoat；First overcoat is electrically connected with electrostatic impedor, earth terminal or ground connection cabling.
6. the array base palte according to claim any one of 3-5, it is characterised in that also include：
Insulating barrier, planarization layer and passivation layer；
Side of the film layer away from the substrate where the insulating barrier is located at the gate line, the planarization layer is located at described exhausted
Side of the edge layer away from film layer where the gate line, the passivation layer is located at the planarization layer away from where the gate line
The side of film layer；
The second gate line electrostatic protection structure is located between the insulating barrier and the planarization layer；Or, described second
Gate line electrostatic protection structure is located between the planarization layer and the passivation layer.
7. the array base palte according to claim any one of 3-5, it is characterised in that also include：
A plurality of touch-control cabling；The second gate line electrostatic protection structure is set with a plurality of touch-control cabling with layer.
8. the array base palte according to claim any one of 3-5, it is characterised in that also include：
Thin film transistor (TFT), the source layer and the same layer of drain electrode layer of the second gate line electrostatic protection structure and the thin film transistor (TFT)
Set.
9. a kind of display panel, it is characterised in that including the array base palte described in claim any one of 1-8.
10. a kind of display device, it is characterised in that including the display panel described in claim 9.
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| CN201610956449.4A CN107065339A (en) | 2016-10-27 | 2016-10-27 | A kind of array base palte, display panel and display device |
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| CN201610956449.4A CN107065339A (en) | 2016-10-27 | 2016-10-27 | A kind of array base palte, display panel and display device |
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| CN201610956449.4A Pending CN107065339A (en) | 2016-10-27 | 2016-10-27 | A kind of array base palte, display panel and display device |
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Application publication date: 20170818 |