CN108666304A - A kind of array substrate and display panel - Google Patents

A kind of array substrate and display panel Download PDF

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Publication number
CN108666304A
CN108666304A CN201810443933.6A CN201810443933A CN108666304A CN 108666304 A CN108666304 A CN 108666304A CN 201810443933 A CN201810443933 A CN 201810443933A CN 108666304 A CN108666304 A CN 108666304A
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CN
China
Prior art keywords
connecting portion
cabling
electrostatic protection
protection electrode
array substrate
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Granted
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CN201810443933.6A
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Chinese (zh)
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CN108666304B (en
Inventor
李珊
陈书志
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to CN201810443933.6A priority Critical patent/CN108666304B/en
Publication of CN108666304A publication Critical patent/CN108666304A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136204Arrangements to prevent high voltage or static electricity failures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/60Protection against electrostatic charges or discharges, e.g. Faraday shields
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2202/00Materials and properties
    • G02F2202/22Antistatic materials or arrangements

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal (AREA)

Abstract

A kind of array substrate of present invention offer and display panel, including:Including the first cabling and the second cabling, wherein first cabling includes main part and first connecting portion, and first connecting portion is arranged in the main part on the side of second cabling;Second cabling is oppositely arranged with the first connecting portion, and the first electrostatic protection electrode is provided between second cabling and the first connecting portion;It has the beneficial effect that:A kind of array substrate provided by the invention and display panel, can reduce the probability of damage by static electricity, even if damage by static electricity occurs, will not influence required metal routing in panel, therefore improve product yield.

Description

A kind of array substrate and display panel
Technical field
The present invention relates to display technology fields, and in particular to a kind of array substrate and display panel.
Background technology
In LCD panel of thin-film transistor design, a large amount of signal is required for being attached using metal routing Peripheral drive circuit is shown and is driven to which external drive signal and pulse sequence signal are supplied to panel pixel region It is dynamic.In peripheral circuit trace, bulk and elongated metal design is commonly used, for reducing dead resistance and parasitic capacitance.
However, in Thin Film Transistor-LCD manufacturing process, need, by many equipment and manufacturing process, making A large amount of electrostatic face on the glass substrate can be accumulated during work, cause bulk and elongated metal routing of layout that static shock occurs Wound makes its abnormal resistance value, open circuit or short circuit, directly affects the yield of Thin Film Transistor-LCD product.
Invention content
A kind of array substrate of offer of the embodiment of the present invention and display panel, can reduce the probability of damage by static electricity, even if hair Raw damage by static electricity, will not influence required metal routing in panel, therefore improve product yield.
The present invention provides a kind of array substrates, including:
First cabling and the second cabling, wherein
First cabling includes body part and first connecting portion, and first connecting portion is arranged in the main part close to institute On the side for stating the second cabling;
Second cabling is oppositely arranged with the first connecting portion, and second cabling and the first connecting portion it Between be provided with the first electrostatic protection electrode;
Second cabling is separated into first part and second part by first cabling, and first cabling further includes Second connecting portion, the first connecting portion are arranged in the main part on the side of the first part, and described second is prominent The portion of rising is arranged in the main part on the side of the second part, wherein the second part and second protrusion Portion is oppositely arranged, and the second electrostatic protection electrode is provided between the second part and the second connecting portion.
According to one preferred embodiment of the present invention, the distance between described first electrostatic protection electrode and the first part etc. In the distance between the first electrostatic protection electrode and the first connecting portion.
According to one preferred embodiment of the present invention, the first connecting portion includes the first end and second end being oppositely arranged, and The first end is connect with the main part, wherein it is default that the distance between the first end and the second end are more than first Value, first preset value is between 5~15um.
According to one preferred embodiment of the present invention, the distance between the first part and the first connecting portion are more than second Preset value, second preset value is between 100~200um.
According to one preferred embodiment of the present invention, second cabling further includes Part III, and the Part III is for connecting Meet the first part and the second part;First cabling, the first electrostatic protection electrode, first part, the second electrostatic Guard electrode and second part are located at same layer, and the Part III and first cabling, the first electrostatic protection electrode, the A part, the second electrostatic protection electrode and second part are located at different layers.
According to one preferred embodiment of the present invention, the Part III is set as overline structure, to avoid first protrusion Portion and the second connecting portion when avoiding the first connecting portion that damage by static electricity occurs with the second connecting portion, cause described With the main part, the first part or the second part short circuit occurs for Part III
Correspondingly, the present invention also provides a kind of display panel, include the array substrate of any embodiment of the present invention.
Array substrate provided by the invention increases the first cabling and second by the way that protrusion is arranged on the first cabling The distance between cabling reduces the probability of damage by static electricity, while an electrode being arranged between protrusion and the second cabling, is formed The effect for shielding electric field allows damage by static electricity to occur on the electrode, even if so generation damage by static electricity, will not influence institute in panel The metal routing needed, this improves product yields.
Description of the drawings
It, below will be to embodiment or the prior art in order to illustrate more clearly of embodiment or technical solution in the prior art Attached drawing needed in description is briefly described, it should be apparent that, the accompanying drawings in the following description is only some invented Embodiment for those of ordinary skill in the art without creative efforts, can also be attached according to these Figure obtains other attached drawings.
Fig. 1 is the cabling planar structure schematic diagram one of array substrate provided in an embodiment of the present invention;
Fig. 2 is the cabling planar structure schematic diagram two of array substrate provided in an embodiment of the present invention;
Fig. 3 is the part routing region planar structure schematic diagram for the array substrate that one embodiment of the present invention provides.
Specific implementation mode
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete Site preparation describes.Obviously, described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on Embodiment in the present invention, the every other implementation that those skilled in the art are obtained without creative efforts Example, shall fall within the protection scope of the present invention.
Embodiment one,
Referring to Fig. 1, Fig. 1 is the cabling planar structure schematic diagram one of array substrate provided in an embodiment of the present invention.This hair Bright embodiment provides a kind of array substrate, including:
First cabling 10 and the second cabling 20;Wherein, first cabling 10 includes main part 101 and first connecting portion 102, first connecting portion 102 is arranged in the main part 101 on the side of second cabling 20;Second cabling 20 It is oppositely arranged with the first connecting portion 102, and the first electrostatic is provided between second cabling 20 and the protrusion 102 Guard electrode 501, so that damage by static electricity is happened on the first electrostatic protection electrode 501.
Second cabling 20 is separated into first part 201 and second part 202 by first cabling 10, and described first Cabling further includes second connecting portion 103, and the first connecting portion 102 is arranged in the main part 101 close to the first part On 201 side, the second connecting portion 103 is arranged in the main part 101 on the side of the second part 202, Wherein, the second part 202 is oppositely arranged with the second connecting portion 103, and the second part 202 is dashed forward with described second Rise portion 103 between be provided with the second electrostatic protection electrode 502 so that damage by static electricity is happened at the second electrostatic protection electrode On 502.
Preferably, the first connecting portion 102 is consistent with shape, the size of the second connecting portion 103, optionally, The shape of the first connecting portion 102 and the second connecting portion 103 can be trapezoidal.
Preferably, the first electrostatic protection electrode 501 and shape, the size of the second electrostatic protection electrode 502 are equal Unanimously, the size of the first electrostatic protection electrode 501 and the second electrostatic protection electrode 502 can be according to actual panel sky Between be designed definition.
Preferably, the distance between the first electrostatic protection electrode 501 and the first part 201 are equal to described first The distance between electrostatic protection electrode 501 and the first connecting portion 102.
It should be noted that the first connecting portion 102 includes the first end 1021 being oppositely arranged and second end 1022, and The first end 1021 is connect with the main part 101, wherein between the first end 1021 and the second end 1022 away from From more than the first preset value, first preset value is between 5~15um.For example, it is preferable to, which is 10um, the distance between the first end 1021 and the second end 1022 are more than 10um.
Preferably, the distance between the first part 201 and the first connecting portion 102 are more than the second preset value, institute The second preset value is stated between 100~200um.Preferably, the second preset value can be 150um, the first part 201 with The distance between described first connecting portion 102 is more than 150um.
Further, referring to Fig. 2, the cabling planar structure that Fig. 2 is array substrate provided in an embodiment of the present invention is illustrated Figure two.As shown in Fig. 2, second cabling 20 further includes including Part III 203, the Part III 203 is for connecting institute First part 201 and the second part 202 are stated, for example, the Part III 203 is overline structure, described first of connection When dividing 201 and the second part 202, first connecting portion 102 and second connecting portion 103 are avoided, 102 He of first connecting portion is avoided When damage by static electricity occurs for second connecting portion 103, lead to Part III 203 and main part 101, first part 201 or second Divide 202 short circuit occurs.
First cabling 10, the first electrostatic protection electrode 501, first part 201,502 and of the second electrostatic protection electrode Second part 202 is located at same layer, and the Part III 203 and first cabling 10, the first electrostatic protection electrode 501, First part 201, the second electrostatic protection electrode 502 and second part 202 are located at different layers.
In the present embodiment, first connecting portion 102 and second connecting portion 103 are set on the first cabling, increases first and walks The distance between line 10 and the second cabling 20 reduce the probability of damage by static electricity, while first connecting portion 102 and first part Be arranged between 201 first electrostatic protection electrode 501 and, the second electrostatic is set between second connecting portion 103 and second part 202 Guard electrode 502 forms the effect of shielding electric field, damage by static electricity is allowed to be happened at the first electrostatic protection electrode 501 and the second electrostatic In guard electrode 502, even if so occur damage by static electricity, required metal routing in panel will not be influenced, therefore, improve Product yield.
Embodiment two,
According to the array substrate described in embodiment one, citing is further described below.
Array substrate provided in an embodiment of the present invention can have the one or more the first cablings and, one or more the second Cabling, which combines, to be implemented.
In the present embodiment will for specifically having first cabling and two the second cablings in the array substrate into Row explanation.
Referring to Fig. 3, Fig. 3 is the part routing region planar structure for the array substrate that one embodiment of the present invention provides Schematic diagram.
The embodiment of the present invention provides a kind of array substrate, including:
First cabling 10, the second cabling 20 and third cabling 30;
Specifically, the first cabling 10 can be peripheral wiring or public electrode wire, the second cabling 20 can be scan line or Public electrode wire, third cabling 30 can be scan line or public electrode wire.
Second cabling 20 is separated into first part 201 and second part 202 by first cabling 10;Wherein, institute It includes main part 101 and first connecting portion 102 to state the first cabling 10, and the setting of first connecting portion 102 is leaned in the main part 101 On the side of the nearly first part 201;The first part 201 is oppositely arranged with the first connecting portion 102, and described It is provided with one first electrostatic protection electrode 501 between a part 201 and the first connecting portion 102, so that damage by static electricity occurs On the first electrostatic protection electrode 501.
The third cabling 30 is separated into Part IV 301 and Part V 302 by first cabling 10;Wherein, institute It includes main part 101 and third protrusion 104 to state the first cabling 10, and the setting of third protrusion 104 is leaned in the main part 101 On the side of the nearly Part IV 301;The Part IV 301 is oppositely arranged with the third protrusion 104, and described A third electrostatic protection electrode 503 is provided between four parts 301 and the third protrusion 104, so that damage by static electricity occurs On the third electrostatic protection electrode 503.
First cabling 10 further includes second connecting portion 103 and the 4th protrusion 105, and the setting of second connecting portion 103 exists The main part 101 is on the side of the second part 202, wherein the second part 202 and the second connecting portion 103 are oppositely arranged, and one second electrostatic protection electrode is provided between the second part 202 and the second connecting portion 103 502, so that damage by static electricity is happened on the second electrostatic protection electrode 502.
4th protrusion 105 is arranged in the main part 101 on the side of the Part V 302, wherein described Part V 302 is oppositely arranged with the 4th protrusion 105, and the Part V 302 and the 4th protrusion 105 it Between be provided with one the 4th electrostatic protection electrode 504 so that damage by static electricity is happened on the 4th electrostatic protection electrode 504.
Specifically, being disposed adjacent respectively on the both sides of peripheral wiring there are two protrusion, peripheral wiring passes through protrusion Induced discharge, at the same increase the distance between peripheral wiring and the first scan line and increase peripheral wiring and the second scan line it Between distance, to reduce the probability of damage by static electricity;Two scan lines are corresponded with four protrusions, each protrusion and two It is provided with an electrode between scan line, for absorbing electrostatic, prevents damage by static electricity to be happened on required metal routing, avoids The problem of metal routing short circuit.In addition, the electrode can be copper electrode, or other electrodes.
Preferably, the first connecting portion 102 is consistent with shape, the size of the second connecting portion 103, optionally, The shape of the first connecting portion 102 and the second connecting portion 103 can be trapezoidal;By taking first connecting portion 102 as an example, first The shape of protrusion 102 can be trapezoidal, wherein trapezoidal one side 121 is connected on main part 101, opposite another side 122 It is oppositely arranged with first part 201;The shape of the first connecting portion 102 and the second connecting portion 103 can also be rectangle; The side that the setting method of third protrusion 104 and the 4th protrusion 105 is arranged with first connecting portion 102 and second connecting portion 103 Method is consistent, and details are not described herein.
Preferably, the first electrostatic protection electrode 501 and shape, the size of the second electrostatic protection electrode 502 are equal Unanimously, quiet with first specifically, the shape of the first electrostatic protection electrode 501 and the second electrostatic protection electrode 502 can be rectangle For electric guard electrode 501, when the shape of the first electrostatic protection electrode 501 is rectangle, the first electrostatic protection electrode 501 Two long sides can be oppositely arranged with first part 201, first connecting portion 102 respectively, and the first electrostatic protection electrode 501 can be with It absorbs and the electrostatic radiated, the problem for avoiding causing the short circuit of first part 2011 is induced by first connecting portion 102.In addition, first The size of electrostatic protection electrode 501 and the second electrostatic protection electrode 502 can be designed definition according to actual panel space, need It is noted that third electrostatic protection electrode 503 is consistent with the shape of the 4th electrostatic protection electrode 504, size, please specifically join The first electrostatic protection electrode 501 and the second electrostatic protection electrode 502 are read, details are not described herein.
Preferably, the distance between the first electrostatic protection electrode 501 and the first part 201 are equal to described first The distance between electrostatic protection electrode 501 and the first connecting portion 102, for example, the first electrostatic protection electrode 501 can be arranged Between first connecting portion 102 and first part 201 on the center line of distance, the first electrostatic protection electrode 501 can also be arranged Closer on the position of first connecting portion 102, in addition, the first electrostatic protection electrode 501 can also be provided closer to first On points 201 position, the second electrostatic protection electrode 502, third electrostatic protection electrode 503 and the 4th electrostatic protection electrode 504 Setting method is consistent with the setting method of the first electrostatic protection electrode 501, please refers to the setting of the first electrostatic protection of front electrode 501 Method, details are not described herein.
It should be noted that the first connecting portion 102 includes the first end 1021 being oppositely arranged and second end 1022, and The first end 1021 is connect with the main part 101, wherein between the first end 1021 and the second end 1022 away from From more than the first preset value, the first preset value is between 5~15um;For example, it is preferable to, the first end 1021 and described the The distance between two ends 1022 can be arranged more than 10um, and electrostatic is radiated by the induction of first connecting portion 102, works as damage by static electricity When generation, will not because the distance between first end 1021 and second end 1022 are too close and cause main part 101 occur short circuit or Other abnormal problems of person.In addition, the setting method of second connecting portion 103, third protrusion 104 and the 4th protrusion 105 Can be identical as first connecting portion 102, it is specifically referred to the setting method of front first connecting portion 102, details are not described herein.
Preferably, the distance between the first part 201 and the first connecting portion 102 are more than the second preset value, the Two preset values are between 100~200um, it is preferred that and the second preset value can be 150um, when damage by static electricity occurs, first Part 201 will not cause the short circuit of first part 201 or other exceptions because of too close with the distance between first connecting portion 102 The problem of, for example, when peripheral wiring 10 is by 102 induced discharge of first connecting portion, first connecting portion 102 and scan line 10 it Between distance be more than 150um, then scan line 20 will not be because of too close with the distance between first connecting portion 102, and causes to scan Line 20 leads to the problem of the exception such as short circuit or open circuit.Likewise, the distance between second part 202 and second connecting portion 103 The distance between setting, Part IV 301 and third protrusion 104 setting and Part V 302 and the 4th protrusion 105 it Between distance setting it is identical as the method that this example is mentioned, details are not described herein.
Second cabling 20 further include include Part III 203, the Part III 203 is for connecting described first Divide 201 and the second part 202, specifically, the Part III 203 can be overline structure, for connecting described first Part 201 and the second part 202, for example, the first scan line includes first part 201, second part 202 and third portion Divide 203, when Part III 203 needs to connect first part 201 and second part 202, Part III 203 can avoid first Protrusion 102 and second connecting portion 103 are attached, accordingly even when the first connecting portion 102 and the second protrusion of peripheral wiring 10 When damage by static electricity occurs for portion 103, the Part III 203 of the first scan line 20 will not be caused to be scanned with peripheral wiring 10, first Short circuit occurs for the second part 202 of the first part 201 of line 20 or the first scan line 20.
The third cabling 20 further include include Part VI 303, the Part VI 303 is for connecting described 4th Divide 301 and the Part V 302, specifically, the Part VI 303 can be overline structure, for connecting the described 4th Part 301 and the Part V 302, for example, the second scan line includes Part IV 301, Part V 302 and the 6th Divide 303, when Part VI 303 needs to connect Part IV 301 and Part V 302, Part VI 303 can avoid third Protrusion 104 and the 4th protrusion 105 are attached, accordingly even when the third protrusion 104 and the 4th protrusion of peripheral wiring 10 When damage by static electricity occurs for portion 105, the Part VI 303 of the second scan line 30 will not be caused to be scanned with peripheral wiring 10, second Short circuit occurs for the Part IV 301 of line 30 or the Part V 302 of the second scan line 30.
First cabling 10, the first electrostatic protection electrode 501, first part 201,502 and of the second electrostatic protection electrode Second part 202 is located at same layer, and the Part III 203 and first cabling 10, the first electrostatic protection electrode 501, First part 201, the second electrostatic protection electrode 502 and second part 202 are located at different layers.For example, the of the first scan line 20 The second part 202 of a part of 201, first scan line 20 is arranged with peripheral wiring 10 in same layer, and the first electrostatic protection electricity The second part of pole 501 and the first part 201 of the second electrostatic protection electrode 502 and the first scan line 20, the first scan line 20 202 and peripheral wiring 10 be arranged in same layer, and the Part III 203 of the first scan line 20 and peripheral wiring 10, first are quiet Electric guard electrode 501, the first part 201 of scan line, the second electrostatic protection electrode 502 and scan line second part 202 set It sets in different layers, it is preferred that the protrusion that peripheral wiring is avoided when 203 cross-line of Part III of the first scan line 20 avoids outer Enclose the problem of cabling 10 occurs damage by static electricity and makes the short circuit of the first scan line 20 or open circuit.
It should be noted that first cabling 10, third electrostatic protection electrode 503, Part IV 301, the 4th electrostatic Guard electrode 504 and Part V 302 are located at same layer, and the Part VI 303 and first cabling 10, third electrostatic Guard electrode 503, Part IV 301, the 4th electrostatic protection electrode 504 and Part V 302 are located at different layers, and specific location closes System please refers to the position relationship of the first cabling 10 and the second cabling 20 that above example is mentioned, and details are not described herein.
The present invention also provides a kind of display panels, including any array substrate of above-described embodiment, and for details, reference can be made to fronts Embodiment, details are not described herein.
In the present embodiment, 10 setting first connecting portions 102 and second connecting portion 103, increase first on the first cabling The distance between cabling 10 and the second cabling 20 reduce the probability of damage by static electricity, while first connecting portion 102 and first part Be arranged between 201 first electrostatic protection electrode 501 and, the second electrostatic is set between second connecting portion 103 and second part 202 Guard electrode 502 forms the effect of shielding electric field, damage by static electricity is allowed to be happened at the first electrostatic protection electrode 501 and the second electrostatic In guard electrode 502, even if so occur damage by static electricity, required metal routing in panel will not be influenced, therefore, improve Product yield.
Array substrate provided in an embodiment of the present invention and display panel are described in detail above, it is used herein Principle and implementation of the present invention are described for specific case, and the explanation of above example is only intended to help to understand The present invention.Meanwhile for those skilled in the art, according to the thought of the present invention, in specific embodiments and applications There will be changes, in conclusion the content of the present specification should not be construed as limiting the invention.

Claims (8)

1. a kind of array substrate, which is characterized in that including the first cabling and the second cabling,;Wherein,
First cabling includes main part and first connecting portion, and first connecting portion setting is in the main part close to described the On the side of two cablings;
Second cabling is oppositely arranged with the first connecting portion, and is set between second cabling and the first connecting portion It is equipped with the first electrostatic protection electrode.
2. array substrate according to claim 1, which is characterized in that second cabling is separated by first cabling First part and second part, first cabling further includes second connecting portion, and the first connecting portion is arranged in the main body On the side of the first part, one close to the second part in the main part is arranged in the second connecting portion in portion On side, wherein the second part is oppositely arranged with the second connecting portion, and the second part and the second connecting portion Between be provided with the second electrostatic protection electrode.
3. array substrate according to claim 1, which is characterized in that the first electrostatic protection electrode and described first Point the distance between be equal to the distance between the first electrostatic protection electrode and the first connecting portion.
4. array substrate according to claim 1, which is characterized in that the first connecting portion includes first be oppositely arranged End and second end, and the first end is connect with the main part, wherein the distance between the first end and the second end More than the first preset value, first preset value is between 5~15um.
5. array substrate according to claim 4, which is characterized in that between the first part and the first connecting portion Distance be more than the second preset value, second preset value is between 100~200um.
6. according to Claims 1 to 5 any one of them array substrate, which is characterized in that second cabling further includes third Part, the Part III is for connecting the first part and the second part;First cabling, the first electrostatic protection Electrode, first part, the second electrostatic protection electrode and second part are located at same layer, and the Part III is walked with described first Line, the first electrostatic protection electrode, first part, the second electrostatic protection electrode and second part are located at different layers.
7. array substrate according to claim 6, which is characterized in that the Part III is set as overline structure, to keep away The first connecting portion and the second connecting portion are opened, avoids the first connecting portion that static shock occurs with the second connecting portion When hindering, cause the Part III that short circuit occurs with the main part, the first part or the second part.
8. a kind of display panel, which is characterized in that including claim 1~7 any one of them array substrate.
CN201810443933.6A 2018-05-10 2018-05-10 Array substrate and display panel Active CN108666304B (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109634006A (en) * 2018-12-03 2019-04-16 深圳市华星光电技术有限公司 The production method and tft array substrate of tft array substrate
CN110098198A (en) * 2019-04-25 2019-08-06 上海中航光电子有限公司 A kind of array substrate and display panel
WO2020140285A1 (en) * 2019-01-04 2020-07-09 京东方科技集团股份有限公司 Electrostatic discharge protection circuit, display substrate, and display device
CN113064510A (en) * 2021-03-05 2021-07-02 武汉华星光电半导体显示技术有限公司 Display panel

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101568950A (en) * 2006-12-22 2009-10-28 夏普株式会社 Active matrix substrate and display panel equipped with the same
CN102096496A (en) * 2009-12-10 2011-06-15 乐金显示有限公司 Touch screen panel
CN103984430A (en) * 2013-02-08 2014-08-13 胜华科技股份有限公司 Touch panel with electrostatic protection
CN107065339A (en) * 2016-10-27 2017-08-18 厦门天马微电子有限公司 A kind of array base palte, display panel and display device
CN107731791A (en) * 2017-11-20 2018-02-23 深圳市华星光电技术有限公司 A kind of structure for improving cross-line area damage by static electricity and repairing yield

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101568950A (en) * 2006-12-22 2009-10-28 夏普株式会社 Active matrix substrate and display panel equipped with the same
CN102096496A (en) * 2009-12-10 2011-06-15 乐金显示有限公司 Touch screen panel
CN103984430A (en) * 2013-02-08 2014-08-13 胜华科技股份有限公司 Touch panel with electrostatic protection
CN107065339A (en) * 2016-10-27 2017-08-18 厦门天马微电子有限公司 A kind of array base palte, display panel and display device
CN107731791A (en) * 2017-11-20 2018-02-23 深圳市华星光电技术有限公司 A kind of structure for improving cross-line area damage by static electricity and repairing yield

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109634006A (en) * 2018-12-03 2019-04-16 深圳市华星光电技术有限公司 The production method and tft array substrate of tft array substrate
CN109634006B (en) * 2018-12-03 2021-07-23 Tcl华星光电技术有限公司 Manufacturing method of TFT array substrate and TFT array substrate
WO2020140285A1 (en) * 2019-01-04 2020-07-09 京东方科技集团股份有限公司 Electrostatic discharge protection circuit, display substrate, and display device
CN111656521A (en) * 2019-01-04 2020-09-11 京东方科技集团股份有限公司 Electrostatic discharge protection circuit, display substrate and display device
US11579667B2 (en) * 2019-01-04 2023-02-14 Chongqing Boe Optoelectronics Technology Co., Ltd. Electrostatic discharge protection circuit, display substrate and display apparatus
CN111656521B (en) * 2019-01-04 2023-12-26 京东方科技集团股份有限公司 Electrostatic discharge protection circuit, display substrate and display device
CN110098198A (en) * 2019-04-25 2019-08-06 上海中航光电子有限公司 A kind of array substrate and display panel
CN113064510A (en) * 2021-03-05 2021-07-02 武汉华星光电半导体显示技术有限公司 Display panel
CN113064510B (en) * 2021-03-05 2022-10-04 武汉华星光电半导体显示技术有限公司 Display panel

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