CN106992250B - Ferroelectric heterojunction-based nonvolatile resistive random access memory unit with multi-value storage characteristics and preparation method thereof - Google Patents
Ferroelectric heterojunction-based nonvolatile resistive random access memory unit with multi-value storage characteristics and preparation method thereof Download PDFInfo
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- H10N70/24—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
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Abstract
A nonvolatile resistive random access memory unit with multi-value memory characteristics based on a ferroelectric heterojunction and a preparation method thereof belong to the technical field of semiconductor solid-state memories. The ferroelectric single crystal memory comprises a writing bottom electrode, a ferroelectric single crystal substrate, a resistance change layer and a top electrode; a writing bottom electrode is prepared on the lower surface of the ferroelectric single crystal substrate, and a resistance change layer is prepared on the upper surface of the ferroelectric single crystal substrate; a top electrode is prepared on the resistance change layer, the top electrode is composed of four strip electrodes, the middle two strip electrodes are reading electrodes in a resistance state, the two strip electrodes symmetrically distributed on the outer side of the reading electrodes are writing top electrodes, and the two strip electrodes are connected through an external lead; or the top electrode is composed of an annular electrode and two strip electrodes, the annular electrode is symmetrically distributed around the two strip electrodes in a surrounding mode, the annular electrode is a writing top electrode, and the two strip electrodes are reading electrodes in a resistance state; the write top electrode and the write bottom electrode together constitute a resistive write electrode. The device has the characteristics of simple structure, strong stability, low manufacturing cost and capability of working at room temperature.
Description
Technical Field
The invention belongs to the technical field of semiconductor solid-state memories, and particularly relates to a ferroelectric heterojunction-based nonvolatile resistive random access memory unit with multi-value storage characteristics and a preparation method thereof.
Background
Information storage devices are one of the fundamental devices in the modern information industry, and most electronic products have the existence of the information storage devices, including mobile phones, computers, cameras, automobile electronic systems, global positioning systems and the like. The memory is classified into two categories, i.e., a nonvolatile memory and a volatile memory, according to whether data can be stored after power-off. The volatile memory cannot store data after power is off, and the non-volatile memory can still store data after power is off.
The traditional nonvolatile storage is mainly based on magnetic storage and optical storage, while the solid-state storage has no read-write head and does not need to rotate, so that the power consumption is low, the shock resistance is high, and the solid-state storage can realize higher-speed data writing and reading in an electric writing and reading mode. Solid-state memories based on semiconductor technology have now gained rapid development due to their excellent performance advantages. Especially the emergence of Dynamic Random Access Memory (DRAM) and Flash memory (Flash) led to a revolution in the field of storage. However, the demand for high memory density and high read and write speed has led to a continuous development of technology, a continuous reduction in device size, and a reduction in DRAM and Flash to its physical limits. After the characteristic size of a dozen nanometers is reached, the quantum effect is very obvious, and the technical route of realizing higher storage density by simply depending on the reduction of the characteristic size of the storage unit finally goes to the end.
Taking the dynamic memory as an example, if the capacitance in the storage unit is too small, a sufficient number of electrons cannot be provided to the amplifier, a sufficient signal-to-noise ratio cannot be obtained, and the reliability of information storage cannot be ensured. It follows that the need for high density information storage cannot be addressed by merely relying on the reduction in device size, and therefore, a multi-value storage technique for storing a plurality of bits in one memory cell is becoming increasingly important. Because in a conventional memory cell, only two resistance states, "on" and "off", are "on" and "off" corresponding to "0" and "1" in binary. The storage density of the memory can be greatly improved by realizing the storage of a plurality of states in a single storage unit.
Disclosure of Invention
Aiming at the problems, the invention provides a nonvolatile resistive random access memory unit with multi-value storage characteristics based on a ferroelectric heterojunction at room temperature and a preparation method thereof.
A nonvolatile resistive random access memory cell with multi-valued storage characteristics based on ferroelectric heterojunction is shown in figure 1 and comprises a write bottom electrode, a ferroelectric single crystal substrate, a resistive layer and a top electrode(ii) a The writing bottom electrode (the thickness of the electrode is 0.1-100 mu m) is made of one or more of simple substance metal materials (such as Al, Pt, Au, W, Ag and the like), metal alloy materials (such as Au-Ni, Al-Ni, Au-Ti and the like) and conductive metal compounds (such as ITO, IZGO and the like) and is prepared on the lower surface of the ferroelectric single crystal substrate; the ferroelectric single crystal substrate may be selected from single crystal materials having ferroelectric properties, such as BaTiO3、BaxSr1-xTiO3、LiNbO3、(1-x)Pb(Mg1/3Nb2/3)O3/xPbTiO3X is more than 0 and less than 1, and the like (the thickness is 0.3-0.6 mm); preparing TiO on the upper surface of a ferroelectric single crystal substrate2The thickness of the thin film resistance change layer is 10-70 nm; in TiO2A top electrode (the material of the top electrode is made of one or more of a simple substance metal material, a metal alloy material and a conductive metal compound, the thickness of the top electrode is 10-100 nm) is prepared on the thin film resistance change layer, the top electrode is composed of four strip-shaped electrodes, two strip-shaped electrodes in the middle are reading electrodes in a resistance state, two strip-shaped electrodes symmetrically distributed on the outer side of each reading electrode are writing top electrodes, and the two strip-shaped electrodes are connected through an external lead; or the top electrode is composed of an annular electrode and two strip electrodes, the annular electrode is symmetrically distributed around the two strip electrodes in a surrounding mode, the annular electrode is a writing top electrode, and the two strip electrodes are reading electrodes in a resistance state; the write top electrode and the write bottom electrode together constitute a resistive write electrode.
The invention also provides a method for manufacturing a nonvolatile resistive random access memory unit with multi-value storage characteristics based on a ferroelectric heterojunction, which comprises the following steps:
(1) cleaning of ferroelectric single crystal substrate
Sequentially carrying out ultrasonic cleaning on the ferroelectric single crystal substrate by using acetone, ethanol and deionized water, or cleaning by using a plasma cleaning machine to ensure that the surface of the single crystal substrate is free from pollution;
(2) pulsed laser deposition of TiO with oxygen vacancies on ferroelectric single crystal substrates2Film as a resistive layer
Selecting high purity (purity) by pulsed laser deposition>99.9%) of TiO2Ceramic as targetMaterial, deposition of TiO with oxygen vacancies on a ferroelectric single crystal substrate in an oxygen atmosphere2A film; the distance between the target material and the ferroelectric single crystal substrate is 50-60 mm, the oxygen partial pressure in the cavity is 0.05-1 Pa, the temperature of the ferroelectric single crystal substrate is 650-750 ℃, the frequency of the pulse laser is 1-4 Hz, the deposition time is 0.5-2 hours, and the ferroelectric single crystal substrate is naturally cooled to the room temperature after the deposition is finished;
(3) preparing an electrode to obtain a multi-value resistance change memory unit;
the preparation method of the electrode comprises the methods of vacuum coating, magnetron sputtering, laser deposition or screen printing and the like. The bottom electrode is completely covered on the bottom surface of the ferroelectric single crystal substrate, and the top electrode is prepared on TiO2A film surface; the reading electrode in the resistance state is connected to an external resistance measuring element, and the writing electrode in the resistance state is connected to an external voltage output component; thus, the nonvolatile resistive random access memory unit with the multi-value storage characteristic based on the ferroelectric heterojunction is prepared.
The invention realizes the multi-valued storage based on TiO2The basic principle that oxygen vacancies in thin film resistive layers can migrate under the action of an electric field. By reaction on TiO2A resistance writing top electrode is constructed on the surface of the film, a resistance writing bottom electrode is constructed on the lower surface of the ferroelectric single crystal substrate, and a direct current voltage is applied between the writing top electrode and the writing bottom electrode to realize that oxygen vacancy is in TiO2The upper surface of the thin film and the interface between the thin film and the ferroelectric substrate. In TiO2A resistance reading electrode is constructed on the surface of the film, and different states of oxygen vacancies can be applied to the reading electrode and TiO2The barrier height and width of the schottky contact of the film are affected and different resistance states are obtained. Under the condition of room temperature, the oxygen vacancy in the film can keep the relative position in the space after the external writing electric field is removed, so that the state of the resistance of the film can be kept for a long time. The substrate material selected in the invention is the ferroelectric single crystal, and because the ferroelectric single crystal material has spontaneous polarization, residual polarization can adsorb and maintain charges at the interface of the film and the substrate after an external electric field is removed. Therefore, when the applied electric field exceeds the coercive field, the polarization state of the ferroelectric single crystal substrate can be adjustedTo thereby realize the preparation of the TiO2The regulation and control of the carrier concentration in the film can obtain a larger change rate between high and low resistance states.
The TiO is realized by an external electric field between the writing electrodes2And the thin film reads multiple resistance states between the electrodes, so that the storage of the multiple resistance states is realized. Different resistance states are coded to realize multi-bit information storage, and multi-value storage on the same unit can greatly improve the density of information storage.
The invention has the advantages that:
the present invention adopts the commonly used pulse laser deposition growth method to grow TiO on the commonly used ferroelectric single crystal substrate which can be directly purchased2And manufacturing the thin film and then manufacturing the resistive random access memory unit. The resistance change memory cell can excite the resistance of the resistance change layer to different states through writing signals with different voltages at room temperature, and the different resistance states can be kept for a long time at room temperature, so that the resistance change memory cell is a nonvolatile memory mode. Different resistance states are coded to realize multi-bit information storage, and the information storage density can be greatly improved. The resistive random access memory unit is simple in structure, strong in stability, low in manufacturing cost and compatible with the existing CMOS process.
Drawings
FIG. 1 is a schematic diagram of a ferroelectric heterojunction based multivalued memory cell of the present invention;
the names of the parts are: write bottom electrode 1, ferroelectric single crystal substrate 2, TiO2A thin film resistance change layer 3, a write top electrode 4, a read electrode 5;
FIG. 2 is a cycle curve of a multi-valued memory cell of the ferroelectric heterojunction of the present invention under different writing voltages (35V, 50V, 60V, 100V, 150V, 200V, 300V, respectively) at room temperature;
FIG. 3 is a graph of the on-off ratio of the multi-valued memory cell of the ferroelectric heterojunction of the present invention at different writing voltages (35V, 50V, 60V, 100V, 150V, 200V, 300V, respectively) at room temperature;
FIG. 4 is a test chart of the memory characteristics of a multi-value memory cell of a ferroelectric heterojunction of the present invention at a pulse write voltage of. + -. 60V under room temperature conditions;
fig. 5 is a test chart of the memory characteristics of the multi-value memory cell of the ferroelectric heterojunction of the present invention at a pulse write voltage of ± 70V under room temperature conditions.
Fig. 6 is a retention characteristic test chart after resistance writing under room temperature conditions.
Detailed Description
Example 1
Step 1: and (4) cleaning the ferroelectric single crystal substrate.
The ferroelectric single crystal substrate is 0.5mm thick 0.7Pb (Mg) with surface normal direction (001)1/3Nb2/3)O3/0.3PbTiO3Single-side polishing of a single crystal substrate. And (3) alternately using acetone, ethanol and deionized water for ultrasonic cleaning, so that the surface of the ferroelectric single crystal substrate is free from pollution.
Step 2: pulsed laser deposition based preparation of TiO with oxygen vacancies on ferroelectric single crystal substrates2The film acts as a resistive layer.
Selection of TiO2(purity of>99.9%) ceramic as target material, 0.7Pb (Mg)1/3Nb2/3)O3/0.3PbTiO3The target is a ferroelectric single crystal substrate, and the distance between the target and the ferroelectric single crystal substrate is 60 mm. The oxygen partial pressure and the temperature of the ferroelectric single crystal substrate are respectively 0.1Pa and 700 ℃, the frequency of KrF pulse laser is 4Hz, the deposition time is 0.5 hour, and the ferroelectric single crystal substrate is naturally cooled to the room temperature after the deposition is finished. Prepared TiO2The thickness of the film was 40 nm.
And step 3: and preparing a bottom electrode and a top electrode to form the resistive random access memory unit.
In TiO2Covering the mask plate with electrode on the surface of the film, and evaporating the metallic silver to TiO by using a vacuum thermal evaporation coating mode2Write top electrodes and read electrodes (4 strip electrodes with a length of 3mm, a width of 0.5mm, an electrode spacing of 1mm, and an electrode thickness of 30nm) were prepared on the surface of the film. Writing bottom electrodes (electrode thickness 50 μm) were prepared with silver paste on the back of a ferroelectric single crystal substrate, and two reading electrodes were connected to external resistance measurement via wiresAnd (3) connecting a writing top electrode and a writing bottom electrode on the element (a Keithley2400 digital source table) to an external voltage output element (a Keithley6487 voltage source) through leads so as to obtain the resistance type multivalued memory cell.
The memory cell based on the ferroelectric heterojunction is a nonvolatile memory cell capable of realizing multi-value storage. Under room temperature, when electric field pulses with different magnitudes are applied through the writing electrode, the electric field pulses can be applied to TiO2Different resistance states are realized on the film, and the magnitude of the resistance can be read through the reading electrode. The on-off ratio of the memory cell is characterized by the ratio of the resistance between the high resistance state and the low resistance state.
Referring to fig. 2, in a nonvolatile resistive random access memory cell having a multi-value memory characteristic based on a ferroelectric heterojunction, scan voltage signals of different sizes (35V, 50V, 60V, 100V, 150V, 200V, and 300V) are applied to a write electrode and cycled (in a cycling manner of 0 → V → 0 → -V → 0) at room temperature, so that the sizes of low-resistance states of the cycling voltages of different sizes are substantially the same, but the difference in high-resistance states is large, that is, the resistive random access memory cell can be excited to different high-resistance states by different write voltages, and the high-resistance states of the resistive random access memory cell can be maintained after external voltages are removed. Referring to fig. 3, the on-off ratio (resistance in the high resistance state/resistance in the low resistance state) of the high and low resistance states changes at different applied write voltages. It can be seen that the on-off ratio between the high and low resistance states gradually increases with increasing write voltage. Therefore, the multi-value storage of the resistance change unit can be realized by using different writing voltages.
Referring to fig. 4, in the nonvolatile resistive random access memory cell having the multivalued memory characteristic based on the ferroelectric heterojunction, the resistance of the memory cell is in the high-resistance state by applying a voltage pulse signal of +60 v to the write electrode, and the on-off ratio of the high-resistance state and the low-resistance state is 10.5 by returning the resistance of the memory cell to the initial low-resistance state by applying a voltage pulse signal of-60 v to the write electrode under the room temperature condition. And the switching ratio is kept stable after the positive and negative pulses are alternately written.
Referring to fig. 5, under room temperature conditions, the resistance of the nonvolatile resistive random access memory cell based on the ferroelectric heterojunction and having the multi-value storage characteristic provided by the present invention is in a high-resistance state when a voltage pulse signal of +70 v is applied to the write electrode, and the switching ratio of the high-resistance state and the low-resistance state is 17 when a voltage pulse signal of-70 v is applied to the write electrode, so that the resistance of the memory cell returns to the original low-resistance state. And the switching ratio is kept stable after the positive and negative pulses are alternately written.
Referring to fig. 6, under room temperature, after a voltage pulse signal of +125V is applied to a write electrode, the resistance of the nonvolatile resistive random access memory unit with the multi-value memory characteristic based on the ferroelectric heterojunction provided by the present invention is in a high resistance state of 10 mega ohms, and after a voltage pulse signal of-125V is applied to the write electrode, the memory unit returns to an initial low resistance state, and the high resistance state and the low resistance state can be stable for a long time, which indicates that the resistive random access memory unit has a good nonvolatile characteristic.
It can be seen that the resistance of the thin film in the memory cell can be modulated to different sized states by different sized write voltage pulses. The information storage of a plurality of bits is realized by encoding different resistance states, and the information storage of the information of the plurality of bits can only be realized by non-on or off of the traditional storage. The multi-value storage realized on the same unit greatly improves the information storage density.
Claims (6)
1. A nonvolatile resistive random access memory unit with multivalue storage characteristics based on a ferroelectric heterojunction is characterized in that: the ferroelectric single crystal memory comprises a writing bottom electrode, a ferroelectric single crystal substrate, a resistance change layer and a top electrode; a write bottom electrode is prepared on the lower surface of the ferroelectric single crystal substrate; preparing TiO on the upper surface of a ferroelectric single crystal substrate2The thickness of the thin film resistance change layer is 10-70 nm; in TiO2A top electrode is prepared on the thin film resistance change layer, the top electrode is composed of four strip electrodes, the middle two strip electrodes are reading electrodes in a resistance state, the two strip electrodes symmetrically distributed on the outer side of the reading electrodes are writing top electrodes, and the two strip electrodes are connected through an external lead; orThe top electrode is composed of an annular electrode and two strip electrodes, the annular electrode is symmetrically distributed around the two strip electrodes in a surrounding mode, the annular electrode is a writing top electrode, and the two strip electrodes are reading electrodes in a resistance state; the write top electrode and the write bottom electrode together constitute a resistive write electrode.
2. A ferroelectric heterojunction based nonvolatile resistance change memory cell having multivalued memory characteristics as claimed in claim 1, wherein: the writing bottom electrode and the top electrode are made of one or more of simple substance metal materials, metal alloy materials and conductive metal compounds.
3. A ferroelectric heterojunction based nonvolatile resistance change memory cell having multivalued memory characteristics as claimed in claim 1, wherein: the ferroelectric single crystal substrate is BaTiO3、BaxSr1-xTiO3、LiNbO3Or (1-x) Pb (Mg)1/3Nb2/3)O3/xPbTiO3Wherein x is more than 0 and less than 1.
4. A ferroelectric heterojunction based nonvolatile resistance change memory cell having multivalued memory characteristics as claimed in claim 1, wherein: the thickness of the write bottom electrode is 0.1-100 μm, the thickness of the ferroelectric single crystal substrate is 0.3-0.6 mm, and the thickness of the top electrode is 10-100 nm.
5. The method for preparing the nonvolatile resistive random access memory unit with the multivalued storage characteristic based on the ferroelectric heterojunction as claimed in claim 1, comprises the following steps:
(1) cleaning of ferroelectric single crystal substrate
Sequentially carrying out ultrasonic cleaning on the ferroelectric single crystal substrate by using acetone, ethanol and deionized water, or cleaning by using a plasma cleaning machine, so that the surface of the single crystal substrate is free from pollution;
(2) pulsed laser deposition of TiO with oxygen vacancies on ferroelectric single crystal substrates2Film as a resistive layer
Selecting high-purity TiO by using pulse laser deposition technology2Ceramic as target material, TiO with oxygen vacancy deposited on ferroelectric single crystal substrate in oxygen environment2The film is deposited, and then the ferroelectric single crystal substrate is naturally cooled to room temperature;
(3) preparing an electrode to obtain a multi-value resistance change memory unit;
the preparation method of the electrode is a vacuum coating, magnetron sputtering, laser deposition or screen printing method; the bottom electrode is completely covered on the bottom surface of the ferroelectric single crystal substrate, and the top electrode is prepared on TiO2A film surface; the reading electrode in the resistance state is connected to an external resistance measuring element, and the writing electrode in the resistance state is connected to an external voltage output component; and thus, the nonvolatile resistance change memory unit with the multi-value memory characteristic based on the ferroelectric heterojunction is prepared.
6. The method for preparing the nonvolatile resistive random access memory unit with the multivalued memory characteristic based on the ferroelectric heterojunction as the claim 5, is characterized in that: TiO 22The distance between the ceramic target and the ferroelectric single crystal substrate is 50-60 mm, the oxygen partial pressure in the cavity is 0.05-1 Pa, the temperature of the ferroelectric single crystal substrate is 650-750 ℃, the frequency of the pulse laser is 1-4 Hz, and the deposition time is 0.5-2 hours.
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Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101789490A (en) * | 2010-01-28 | 2010-07-28 | 复旦大学 | Ferroelectric oxide/semiconductor composite film diode resistance change memory |
CN101864592A (en) * | 2010-05-14 | 2010-10-20 | 南京大学 | Ferroelectric metal hetero-junction based memristor and preparation method thereof |
CN101894908A (en) * | 2010-06-01 | 2010-11-24 | 中山大学 | Resistive random access memory and preparation method thereof |
CN103065679A (en) * | 2012-12-03 | 2013-04-24 | 中国科学技术大学 | Electric field write-in and resistance readout solid-state storage component, storer and read-write method of storer |
CN103811473A (en) * | 2014-01-28 | 2014-05-21 | 天津师范大学 | Multi-source controllable resistive random access memory with multi-layer film structure and preparation method thereof |
CN105679933A (en) * | 2016-04-12 | 2016-06-15 | 湘潭大学 | Multi-value memory unit based on common control for conductive wires and polarization |
CN105762197A (en) * | 2016-04-08 | 2016-07-13 | 中国科学院上海硅酸盐研究所 | Lead magnesium niobate and lead titanate monocrystalline-based semiconductor ferroelectric field effect heterostructure, manufacture method therefor and application thereof |
-
2017
- 2017-04-11 CN CN201710230438.2A patent/CN106992250B/en not_active Expired - Fee Related
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101789490A (en) * | 2010-01-28 | 2010-07-28 | 复旦大学 | Ferroelectric oxide/semiconductor composite film diode resistance change memory |
CN101864592A (en) * | 2010-05-14 | 2010-10-20 | 南京大学 | Ferroelectric metal hetero-junction based memristor and preparation method thereof |
CN101894908A (en) * | 2010-06-01 | 2010-11-24 | 中山大学 | Resistive random access memory and preparation method thereof |
CN103065679A (en) * | 2012-12-03 | 2013-04-24 | 中国科学技术大学 | Electric field write-in and resistance readout solid-state storage component, storer and read-write method of storer |
CN103811473A (en) * | 2014-01-28 | 2014-05-21 | 天津师范大学 | Multi-source controllable resistive random access memory with multi-layer film structure and preparation method thereof |
CN105762197A (en) * | 2016-04-08 | 2016-07-13 | 中国科学院上海硅酸盐研究所 | Lead magnesium niobate and lead titanate monocrystalline-based semiconductor ferroelectric field effect heterostructure, manufacture method therefor and application thereof |
CN105679933A (en) * | 2016-04-12 | 2016-06-15 | 湘潭大学 | Multi-value memory unit based on common control for conductive wires and polarization |
Non-Patent Citations (1)
Title |
---|
"Electric-Field-Modulated Nonvolatile Resistance Switching in VO2/PMN-PT(111) Heterostructures";Bowen Zhi et al.;《Applied Materials &Interfaces》;20140317;第6卷(第7期);4603-4608 * |
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