CN106952966B - Gallium nitride Schottky diode and manufacturing method thereof - Google Patents

Gallium nitride Schottky diode and manufacturing method thereof Download PDF

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CN106952966B
CN106952966B CN201710073039.XA CN201710073039A CN106952966B CN 106952966 B CN106952966 B CN 106952966B CN 201710073039 A CN201710073039 A CN 201710073039A CN 106952966 B CN106952966 B CN 106952966B
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gallium nitride
nitride layer
layer
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schottky
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CN106952966A (en
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张葶葶
朱廷刚
李亦衡
王东盛
苗操
魏鸿源
严文胜
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JIANGSU NENGHUA MICROELECTRONIC TECHNOLOGY DEVELOPMENT Co Ltd
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JIANGSU NENGHUA MICROELECTRONIC TECHNOLOGY DEVELOPMENT Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/872Schottky diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003Nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/6609Diodes
    • H01L29/66143Schottky diodes

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  • Power Engineering (AREA)
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Abstract

The invention relates to a gallium nitride Schottky diode which comprises a substrate, an N + gallium nitride layer, an N-gallium nitride layer table board and a P-type gallium nitride layer etched with a groove, wherein a Schottky metal layer used as an anode is formed on the P-type gallium nitride layer, and an ohmic metal layer used as a cathode is formed on the N + gallium nitride layer. The manufacturing method comprises the steps of sequentially growing an N + gallium nitride layer, an N-gallium nitride layer and a P-type gallium nitride layer on the upper surface of a substrate; forming a mesa with a P-type gallium nitride layer and an N-gallium nitride layer, and partially etching the P-type gallium nitride layer on each mesa to form a series of grooves; the Schottky metal layer is deposited on the P-type gallium nitride layer to serve as an anode, and the ohmic metal layer is deposited on the N + gallium nitride layer to serve as a cathode. The Schottky barrier structure can exhaust carriers under the Schottky electrode, improve the Schottky barrier height, reduce leakage current and increase breakdown voltage, and the groove under the Schottky electrode can reduce forward conduction voltage, so that the forward and reverse characteristics of the device are improved simultaneously.

Description

Gallium nitride Schottky diode and manufacturing method thereof
Technical Field
The invention relates to the field of semiconductors, in particular to a gallium nitride Schottky diode structure and a manufacturing method thereof.
Background
in the prior art, the structure of a gan schottky diode is shown in fig. 1: an N + gallium nitride layer 2 and an N-gallium nitride layer 3 are grown on a sapphire, silicon or silicon carbide substrate 1, the N-gallium nitride layer 3 is etched to the N + gallium nitride layer 2, a Schottky metal layer 5 is deposited on the N-gallium nitride layer 3 to serve as an anode, and an ohmic metal layer 6 is deposited on the N + gallium nitride layer 2 to serve as a cathode, so that the Schottky diode is formed.
the existing gallium nitride Schottky diode structure has the following defects: because intrinsic gallium nitride is N-type, and the doping in the growth process is limited to reduce the electron concentration in the N-type gallium nitride layer, the Schottky barrier height cannot be effectively increased to achieve the purposes of reducing leakage current and increasing breakdown voltage.
Disclosure of Invention
it is an object of the present invention to provide a gan schottky diode.
In order to achieve the purpose, the invention adopts the technical scheme that:
a gallium nitride Schottky diode comprises a substrate, an N + gallium nitride layer formed on the substrate, a table top formed on the N + gallium nitride layer and provided with an N-gallium nitride layer, and a P-type gallium nitride layer formed on the table top of the N-gallium nitride layer and etched with a groove, wherein a Schottky metal layer is formed on the P-type gallium nitride layer, an ohmic metal layer is formed on the N + gallium nitride layer, the Schottky metal layer forms an anode of the diode, and the ohmic metal layer forms a cathode of the diode.
preferably, the distance from the bottom of the groove to the N ~ gallium nitride layer is 0 ~ 50 nm.
preferably, the thickness of the P ~ type gallium nitride layer is 3nm ~ 3 um.
preferably, the P-type gallium nitride layer is provided with a plurality of grooves.
Another objective of the present invention is to provide a method for manufacturing a gan schottky diode.
In order to achieve the purpose, the invention adopts the technical scheme that:
a method for manufacturing a gallium nitride Schottky diode comprises the steps of growing an N + gallium nitride layer on the upper surface of a substrate, growing an N-gallium nitride layer on the upper surface of the N + gallium nitride layer, and growing a P-type gallium nitride layer on the upper surface of the N-gallium nitride layer; carrying out an etching process: forming mesas with a P-type gallium nitride layer and an N-gallium nitride layer, and etching part of the P-type gallium nitride layer on each mesa to form grooves; a Schottky metal layer is deposited on the P-type gallium nitride layer to serve as an anode, and an ohmic metal layer is deposited on the N + gallium nitride layer to serve as a cathode.
Preferably, when the etching process is performed: etching part of the P-type gallium nitride layer to form a groove, and then etching the P-type gallium nitride layer and the N-gallium nitride layer to the N + gallium nitride layer to form a table top.
Preferably, when the etching process is performed: etching the P-type gallium nitride layer and the N-gallium nitride layer to the N + gallium nitride layer to form a table top, and etching part of the P-type gallium nitride layer on the table top to form a groove.
further preferably, the P ~ type GaN layer is etched to a distance of 0 ~ 50nm from the N ~ GaN layer.
preferably, the growth thickness of the P ~ type gallium nitride layer is 3nm ~ 3 um.
preferably, the substrate is a sapphire, silicon or silicon carbide substrate.
Due to the application of the technical scheme, compared with the prior art, the invention has the following advantages and effects:
the structure of the invention can exhaust the current carrier under the Schottky electrode, thereby improving the Schottky barrier height, reducing the leakage current and increasing the breakdown voltage, and the groove structure under the Schottky electrode can reduce the forward conduction voltage, thereby simultaneously improving the forward and reverse characteristics of the device.
drawings
FIG. 1 is a schematic cross-sectional view of a GaN Schottky diode structure in the prior art;
FIG. 2 is a schematic diagram of step (I) in this embodiment;
FIG. 3 is a first schematic diagram of step (II) in this embodiment;
FIG. 4 is a second schematic diagram of step (II) in this embodiment;
Fig. 5 is a schematic cross-sectional view of the present embodiment.
Wherein: 1. a substrate; 2. an N + gallium nitride layer; 3. an N-gallium nitride layer; 4. a P-type gallium nitride layer; 40. a groove; 5. a Schottky metal layer; 6. an ohmic metal layer.
Detailed Description
The invention is further described below with reference to the accompanying drawings and examples:
As shown in fig. 5: a gallium nitride Schottky diode comprises a substrate 1, an N + gallium nitride layer 2 formed on the substrate 1, a table top formed on the N + gallium nitride layer 2 and provided with an N-gallium nitride layer 3, and a P-type gallium nitride layer 4 formed on the table top of the N-gallium nitride layer 3 and etched with a groove 40, wherein a Schottky metal layer 5 is formed on the P-type gallium nitride layer 4, an ohmic metal layer 6 is formed on the N + gallium nitride layer 2, the Schottky metal layer 5 forms an anode of the diode, and the ohmic metal layer 6 forms a cathode of the diode.
The following specifically describes a method for manufacturing the gan schottky diode, which includes the following steps:
growing an N + gallium nitride layer 2 on a sapphire, silicon or silicon carbide substrate 1, growing an N ~ gallium nitride layer 3 on the upper surface of the N + gallium nitride layer 2, and growing a P ~ type gallium nitride layer 4 of 3nm ~ 3um on the upper surface of the N ~ gallium nitride layer 3, as shown in figure 2;
performing dry etching on the P-type gallium nitride layer 4 and the N-gallium nitride layer 3 to form table tops and ensure that the P-type gallium nitride layer 4 on each table top is provided with the groove 40, as shown in figure 4;
or dry etching is carried out on the P ~ type gallium nitride layer 4 and the N ~ gallium nitride layer 3 to form a table top, the P ~ type gallium nitride layer 4 on the table top is etched to a distance of 30 ~ 50nm from the N ~ gallium nitride layer by a dry method to form a groove 40, a plurality of grooves 40 are etched, and the space width of the grooves is 0.1 ~ 10 um;
And (III) depositing a Schottky metal layer 5 on the P-type gallium nitride layer 4 as an anode and depositing an ohmic metal layer 6 on the N + gallium nitride layer 3 as a cathode to form the gallium nitride Schottky diode, as shown in FIG. 5.
The above embodiments are merely illustrative of the technical ideas and features of the present invention, and the purpose thereof is to enable those skilled in the art to understand the contents of the present invention and implement the present invention, and not to limit the protection scope of the present invention. All equivalent changes and modifications made according to the spirit of the present invention should be covered within the protection scope of the present invention.

Claims (8)

1. A gallium nitride schottky diode, comprising: the diode comprises a substrate, an N + gallium nitride layer formed on the substrate, a table top formed on the N + gallium nitride layer and provided with an N-gallium nitride layer, and a P-type gallium nitride layer formed on the table top of the N-gallium nitride layer, wherein a plurality of grooves are formed on the P-type gallium nitride layer by etching part of the P-type gallium nitride layer, a Schottky metal layer is formed on the P-type gallium nitride layer, an ohmic metal layer is formed on the N + gallium nitride layer, the Schottky metal layer forms the anode of the diode, and the ohmic metal layer forms the cathode of the diode.
2. the GaN Schottky diode according to claim 1, wherein the distance from the bottom of the trench to the N ~ GaN layer is 30 ~ 50 nm.
3. the Schottky diode with gallium nitride according to claim 1, wherein the thickness of the P ~ type gallium nitride layer is 3nm ~ 3 um.
4. A method for manufacturing a gallium nitride Schottky diode comprises the steps of growing an N + gallium nitride layer on the upper surface of a substrate and growing an N-gallium nitride layer on the upper surface of the N + gallium nitride layer, and is characterized in that: growing a P-type gallium nitride layer on the upper surface of the N-gallium nitride layer; carrying out an etching process: forming mesas with a P-type gallium nitride layer and an N-gallium nitride layer, and etching part of the P-type gallium nitride layer on each mesa to form a plurality of grooves; a Schottky metal layer is deposited on the P-type gallium nitride layer to serve as an anode, and an ohmic metal layer is deposited on the N + gallium nitride layer to serve as a cathode.
5. A method for manufacturing a gallium nitride Schottky diode comprises the steps of growing an N + gallium nitride layer on the upper surface of a substrate and growing an N-gallium nitride layer on the upper surface of the N + gallium nitride layer, and is characterized in that: growing a P-type gallium nitride layer on the upper surface of the N-gallium nitride layer; carrying out an etching process: etching part of the P-type gallium nitride layer to form a plurality of grooves, etching the P-type gallium nitride layer and the N-gallium nitride layer to the N + gallium nitride layer to form table tops, and ensuring that the P-type gallium nitride layer on each table top is provided with a plurality of grooves; a Schottky metal layer is deposited on the P-type gallium nitride layer to serve as an anode, and an ohmic metal layer is deposited on the N + gallium nitride layer to serve as a cathode.
6. the method of claim 4 or 5, wherein the P ~ type GaN layer is etched to a distance of 30 ~ 50nm from the N ~ GaN layer.
7. the method for manufacturing the GaN Schottky diode according to claim 4 or 5, wherein the growth thickness of the P ~ type GaN layer is 3nm ~ 3 um.
8. The method of claim 4 or 5, wherein the step of forming the Schottky diode comprises: the substrate is a sapphire, silicon or silicon carbide substrate.
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CN107492575B (en) * 2017-08-28 2019-04-16 江苏能华微电子科技发展有限公司 A kind of Schottky pole structure, Schottky diode and manufacturing method
CN114400246A (en) * 2021-12-13 2022-04-26 晶通半导体(深圳)有限公司 Reverse conducting high mobility transistor

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CN105895708A (en) * 2016-05-28 2016-08-24 复旦大学 GaN-based power diode and preparation method thereof
CN106024623A (en) * 2016-06-29 2016-10-12 江苏能华微电子科技发展有限公司 Gallium nitride schottky diode and manufacturing method thereof
CN106169417A (en) * 2016-07-11 2016-11-30 厦门市三安集成电路有限公司 A kind of silicon carbide power device of hetero-junctions terminal and preparation method thereof

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US8969994B2 (en) * 2012-08-14 2015-03-03 Avogy, Inc. Method of fabricating a gallium nitride merged P-i-N Schottky (MPS) diode by regrowth and etch back

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105895708A (en) * 2016-05-28 2016-08-24 复旦大学 GaN-based power diode and preparation method thereof
CN106024623A (en) * 2016-06-29 2016-10-12 江苏能华微电子科技发展有限公司 Gallium nitride schottky diode and manufacturing method thereof
CN106169417A (en) * 2016-07-11 2016-11-30 厦门市三安集成电路有限公司 A kind of silicon carbide power device of hetero-junctions terminal and preparation method thereof

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