CN106952966A - Gallium nitride Schottky diode and preparation method thereof - Google Patents
Gallium nitride Schottky diode and preparation method thereof Download PDFInfo
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- CN106952966A CN106952966A CN201710073039.XA CN201710073039A CN106952966A CN 106952966 A CN106952966 A CN 106952966A CN 201710073039 A CN201710073039 A CN 201710073039A CN 106952966 A CN106952966 A CN 106952966A
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- gallium nitride
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- 229910002601 GaN Inorganic materials 0.000 title claims abstract description 126
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 title claims abstract description 98
- 238000002360 preparation method Methods 0.000 title claims abstract description 12
- 229910052751 metal Inorganic materials 0.000 claims abstract description 25
- 239000002184 metal Substances 0.000 claims abstract description 25
- 239000000758 substrate Substances 0.000 claims abstract description 17
- 238000005530 etching Methods 0.000 claims abstract description 8
- 238000001556 precipitation Methods 0.000 claims abstract 2
- 230000015572 biosynthetic process Effects 0.000 claims description 11
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 8
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 7
- 229910052733 gallium Inorganic materials 0.000 claims description 7
- 238000000034 method Methods 0.000 claims description 6
- 230000008859 change Effects 0.000 claims description 4
- 229910052757 nitrogen Inorganic materials 0.000 claims description 4
- 229910052594 sapphire Inorganic materials 0.000 claims description 4
- 239000010980 sapphire Substances 0.000 claims description 4
- 229910052710 silicon Inorganic materials 0.000 claims description 4
- 239000010703 silicon Substances 0.000 claims description 4
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 4
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 3
- 230000004888 barrier function Effects 0.000 abstract description 3
- 230000015556 catabolic process Effects 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 4
- 238000001312 dry etching Methods 0.000 description 4
- 239000002244 precipitate Substances 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 239000000047 product Substances 0.000 description 1
- 239000013049 sediment Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/2003—Nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66143—Schottky diodes
Abstract
The present invention relates to a kind of gallium nitride Schottky diode, including substrate, N+ gallium nitride layers, N gallium nitride layers table top, the reeded p-type gallium nitride layer of etching, the ohmic metal layer being formed with the schottky metal layer as anode, N+ gallium nitride layers as negative electrode is formed with p-type gallium nitride layer.Its preparation method is included in substrate top surface and grows N+ gallium nitride layers, N gallium nitride layers, p-type gallium nitride layer successively；The table top with p-type gallium nitride layer and N gallium nitride layers is formed, the p-type gallium nitride layer partly etched on each table top forms a series of grooves；Schottky metal layer is precipitated on p-type gallium nitride layer as anode, precipitation ohmic metal layer is used as negative electrode on N+ gallium nitride layers.The present invention can exhaust the carrier under Schottky electrode, lift schottky barrier height, reduce leakage current, low forward conduction voltage can be dropped by increasing the groove under breakdown voltage, Schottky electrode so that the forward and reverse characteristic of device gets a promotion simultaneously.
Description
Technical field
The present invention relates to semiconductor applications, more particularly to a kind of gallium nitride Schottky diode structure and its making side
Method.
Background technology
In the prior art, the structure of gallium nitride Schottky diode is as shown in Figure 1：In sapphire, silicon or silicon carbide substrates 1
Upper growth N+ gallium nitride layers 2 and N- gallium nitride layers 3, etching N- gallium nitride layers 3 form sediment to N+ gallium nitride layers 2 on N- gallium nitride layers 3
Product schottky metal layer 5 deposits ohmic metal layer 6 as negative electrode, so as to constitute Schottky as anode on N+ gallium nitride layers 2
Diode.
The shortcoming of existing gallium nitride Schottky diode structure is：Because intrinsic gallium nitride is N-type, and by growth
During doping it is limited to reduce the electron concentration in n type gallium nitride layer, therefore can not effectively lift schottky barrier height
And reach reduction leakage current and increase the purpose of breakdown voltage.
The content of the invention
It is an object of the present invention to provide a kind of gallium nitride Schottky diode.
To reach above-mentioned purpose, the technical solution adopted by the present invention is：
A kind of gallium nitride Schottky diode, including substrate, the N+ gallium nitride layers formed on described substrate, formation are described
N+ gallium nitride layers on have N- gallium nitride layers table top, formed etched on the table top of described N- gallium nitride layers it is reeded
It is formed with p-type gallium nitride layer, described p-type gallium nitride layer on schottky metal layer, described N+ gallium nitride layers and is formed with Europe
Nurse metal level, described schottky metal layer forms the anode of diode, and described ohmic metal layer forms the negative electrode of diode.
Preferably, the distance of described bottom portion of groove to described N- gallium nitride layers is 0 ~ 50nm.
Preferably, the thickness of described p-type gallium nitride layer is 3nm ~ 3um.
Preferably, there are multiple grooves on described p-type gallium nitride layer.
It is a further object to provide a kind of preparation method of gallium nitride Schottky diode.
To reach above-mentioned purpose, the technical solution adopted by the present invention is：
A kind of preparation method of gallium nitride Schottky diode, is included in substrate top surface growth N+ gallium nitride layers, in N+ nitridations
Gallium layer upper surface growth N- gallium nitride layers, are additionally included in N- gallium nitride layers upper surface growing P-type gallium nitride layer；It is etched work
Skill：The table top with p-type gallium nitride layer and N- gallium nitride layers is formed, and etches the part p-type gallium nitride layer on each table top
Form groove；Schottky metal layer is precipitated on p-type gallium nitride layer as anode, ohmic metal layer is precipitated on N+ gallium nitride layers
It is used as negative electrode.
Preferably, when being etched technique：First etching part p-type gallium nitride layer formation groove, then etch p-type gallium nitride layer
With N- gallium nitride layers to N+ gallium nitride layers formation table top.
Preferably, when being etched technique：First etching p-type gallium nitride layer and N- gallium nitride layers to N+ gallium nitride layers form platform
Face, then etch part p-type gallium nitride layer formation groove on table top.
It is further preferred that etching p-type gallium nitride layer is to apart from 0 ~ 50nm of N- gallium nitride layers.
Preferably, the growth thickness of described p-type gallium nitride layer is 3nm ~ 3um.
Preferably, described substrate is sapphire, silicon or silicon carbide substrates.
Because above-mentioned technical proposal is used, the present invention has following advantages and effect compared with prior art：
The structure of the present invention can exhaust the carrier under Schottky electrode, so that schottky barrier height is lifted, reduction electric leakage
Stream, increases breakdown voltage, and low forward conduction voltage can drop in the groove structure under Schottky electrode, hence in so that device is just
Got a promotion simultaneously to reverse characteristic.
Brief description of the drawings
Accompanying drawing 1 is gallium nitride Schottky diode feature cross-section schematic diagram in the prior art；
Accompanying drawing 2 is step in the present embodiment（One）Schematic diagram；
Accompanying drawing 3 is step in the present embodiment（Two）Schematic diagram one；
Accompanying drawing 4 is step in the present embodiment（Two）Schematic diagram two；
Accompanying drawing 5 is the cross-sectional view of the present embodiment.
Wherein：1st, substrate；2nd, N+ gallium nitride layers；3rd, N- gallium nitride layers；4th, p-type gallium nitride layer；40th, groove；5th, Schottky
Metal level；6th, ohmic metal layer.
Embodiment
The invention will be further described with case study on implementation below in conjunction with the accompanying drawings：
As shown in Figure 5：A kind of gallium nitride Schottky diode, including substrate 1, form N+ gallium nitride layers 2 on substrate 1, shape
Fluted 40 are etched on the table top of N- gallium nitride layers 3 into the table top, formation on N+ gallium nitride layers 2 with N- gallium nitride layers 3
P-type gallium nitride layer 4, be formed with schottky metal layer 5, N+ gallium nitride layers 2 on p-type gallium nitride layer 4 and be formed with ohmic metal
Layer 6, the anode of the formation diode of schottky metal layer 5, the negative electrode of the formation diode of ohmic metal layer 6.
The preparation method for illustrating lower this implementation gallium nitride Schottky diode in detail below, comprises the following steps：
（One）, N+ gallium nitride layers 2 are grown on the substrate 1 of sapphire, silicon or carborundum, looked unfamiliar in the upper table of N+ gallium nitride layers 2
Long N- gallium nitride layers 3, grow 3nm ~ 3um p-type gallium nitride layer 4, as shown in Figure 2 in the upper surface of N- gallium nitride layers 3；
（Two）, dry etching p-type gallium nitride layer 4 to apart from N- 30 ~ 50nm of gallium nitride layer, form groove 40, etch multiple grooves
40, as shown in Figure 3；Dry etching formation table top is carried out to p-type gallium nitride layer 4 and N- gallium nitride layers 3, and is ensured on each table top
P-type gallium nitride layer 4 on be respectively provided with groove 40, as shown in Figure 4；
Or the p-type nitrogen that dry etching is formed on table top, dry etching table top is carried out to p-type gallium nitride layer 4 and N- gallium nitride layers 3
Change gallium layer 4 to apart from N- 30 ~ 50nm of gallium nitride layer, form groove 40, etch multiple grooves 40, groove spacing width 0.1um ~
10um；
（Three）, on p-type gallium nitride layer 4 precipitate schottky metal layer 5 as anode, on N+ gallium nitride layers 3 precipitate ohm gold
Belong to layer 6 as negative electrode, gallium nitride Schottky diode is made, as shown in Figure 5.
The above embodiments merely illustrate the technical concept and features of the present invention, and its object is to allow person skilled in the art
Scholar can understand present disclosure and implement according to this, and it is not intended to limit the scope of the present invention.It is all according to the present invention
The equivalent change or modification that Spirit Essence is made, should all be included within the scope of the present invention.
Claims (10)
1. a kind of gallium nitride Schottky diode, it is characterised in that：Including substrate, the N+ gallium nitride formed on described substrate
Layer, formed on described N+ gallium nitride layers with N- gallium nitride layers table top, formed described N- gallium nitride layers table top
Schottky metal layer, described N+ nitridations are formed with the upper reeded p-type gallium nitride layer of etching, described p-type gallium nitride layer
Ohmic metal layer is formed with gallium layer, described schottky metal layer forms the anode of diode, described ohmic metal layer shape
Into the negative electrode of diode.
2. a kind of gallium nitride Schottky diode according to claim 1, it is characterised in that：Described bottom portion of groove is to institute
The distance for the N- gallium nitride layers stated is 0 ~ 50nm.
3. a kind of gallium nitride Schottky diode according to claim 1, it is characterised in that：Described p-type gallium nitride layer
Thickness be 3nm ~ 3um.
4. a kind of gallium nitride Schottky diode according to claim 1, it is characterised in that：Described p-type gallium nitride layer
It is upper that there are multiple grooves.
5. a kind of preparation method of gallium nitride Schottky diode, is included in substrate top surface growth N+ gallium nitride layers, in N+ nitrogen
Change gallium layer upper surface growth N- gallium nitride layers, it is characterised in that：It is additionally included in N- gallium nitride layers upper surface growing P-type gallium nitride
Layer；It is etched technique：The table top with p-type gallium nitride layer and N- gallium nitride layers is formed, and etches the portion on each table top
Divide p-type gallium nitride layer formation groove；Schottky metal layer is precipitated on p-type gallium nitride layer as anode, on N+ gallium nitride layers
Precipitation ohmic metal layer is used as negative electrode.
6. the preparation method of gallium nitride Schottky diode according to claim 5, it is characterised in that：It is etched technique
When：First etching part p-type gallium nitride layer formation groove, then p-type gallium nitride layer and N- gallium nitride layers are etched to N+ gallium nitride layer shapes
Into table top.
7. the preparation method of gallium nitride Schottky diode according to claim 5, it is characterised in that：It is etched technique
When：First etching p-type gallium nitride layer and N- gallium nitride layers are to N+ gallium nitride layers formation table top, then etch p-type nitridation in part on table top
Gallium layer forms groove.
8. the preparation method of the gallium nitride Schottky diode according to claim 6 or 7, it is characterised in that：Etch p-type nitrogen
Change gallium layer to apart from 0 ~ 50nm of N- gallium nitride layers.
9. the preparation method of gallium nitride Schottky diode according to claim 5, it is characterised in that：Described p-type nitrogen
The growth thickness for changing gallium layer is 3nm ~ 3um.
10. the preparation method of gallium nitride Schottky diode according to claim 5, it is characterised in that：Described substrate
For sapphire, silicon or silicon carbide substrates.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710073039.XA CN106952966B (en) | 2017-02-10 | 2017-02-10 | Gallium nitride Schottky diode and manufacturing method thereof |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201710073039.XA CN106952966B (en) | 2017-02-10 | 2017-02-10 | Gallium nitride Schottky diode and manufacturing method thereof |
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| CN106952966A true CN106952966A (en) | 2017-07-14 |
| CN106952966B CN106952966B (en) | 2019-12-13 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107492575A (en) * | 2017-08-28 | 2017-12-19 | 江苏能华微电子科技发展有限公司 | A kind of Schottky pole structure, Schottky diode and manufacture method |
| CN114400246A (en) * | 2021-12-13 | 2022-04-26 | 晶通半导体(深圳)有限公司 | Reverse conducting high mobility transistor |
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| US20140048902A1 (en) * | 2012-08-14 | 2014-02-20 | Avogy , Inc. | Method of fabricating a gallium nitride merged p-i-n schottky (mps) diode by regrowth and etch back |
| CN105895708A (en) * | 2016-05-28 | 2016-08-24 | 复旦大学 | GaN-based power diode and preparation method thereof |
| CN106024623A (en) * | 2016-06-29 | 2016-10-12 | 江苏能华微电子科技发展有限公司 | Gallium nitride schottky diode and manufacturing method thereof |
| CN106169417A (en) * | 2016-07-11 | 2016-11-30 | 厦门市三安集成电路有限公司 | A kind of silicon carbide power device of hetero-junctions terminal and preparation method thereof |
-
2017
- 2017-02-10 CN CN201710073039.XA patent/CN106952966B/en active Active
Patent Citations (4)
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|---|---|---|---|---|
| US20140048902A1 (en) * | 2012-08-14 | 2014-02-20 | Avogy , Inc. | Method of fabricating a gallium nitride merged p-i-n schottky (mps) diode by regrowth and etch back |
| CN105895708A (en) * | 2016-05-28 | 2016-08-24 | 复旦大学 | GaN-based power diode and preparation method thereof |
| CN106024623A (en) * | 2016-06-29 | 2016-10-12 | 江苏能华微电子科技发展有限公司 | Gallium nitride schottky diode and manufacturing method thereof |
| CN106169417A (en) * | 2016-07-11 | 2016-11-30 | 厦门市三安集成电路有限公司 | A kind of silicon carbide power device of hetero-junctions terminal and preparation method thereof |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107492575A (en) * | 2017-08-28 | 2017-12-19 | 江苏能华微电子科技发展有限公司 | A kind of Schottky pole structure, Schottky diode and manufacture method |
| WO2019041468A1 (en) * | 2017-08-28 | 2019-03-07 | 江苏能华微电子科技发展有限公司 | Schottky base structure, schottky diode and manufacturing method therefor |
| CN107492575B (en) * | 2017-08-28 | 2019-04-16 | 江苏能华微电子科技发展有限公司 | A kind of Schottky pole structure, Schottky diode and manufacturing method |
| CN114400246A (en) * | 2021-12-13 | 2022-04-26 | 晶通半导体(深圳)有限公司 | Reverse conducting high mobility transistor |
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