CN106952951B - Method for manufacturing InP-based heterojunction bipolar transistor - Google Patents
Method for manufacturing InP-based heterojunction bipolar transistor Download PDFInfo
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- CN106952951B CN106952951B CN201710160773.XA CN201710160773A CN106952951B CN 106952951 B CN106952951 B CN 106952951B CN 201710160773 A CN201710160773 A CN 201710160773A CN 106952951 B CN106952951 B CN 106952951B
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- 238000000034 method Methods 0.000 title claims abstract description 15
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 11
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- 229920003229 poly(methyl methacrylate) Polymers 0.000 claims abstract description 20
- 238000005260 corrosion Methods 0.000 claims abstract description 18
- 230000007797 corrosion Effects 0.000 claims abstract description 18
- 229910001092 metal group alloy Inorganic materials 0.000 claims description 28
- 238000001704 evaporation Methods 0.000 claims description 12
- 230000008020 evaporation Effects 0.000 claims description 12
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 claims description 9
- 238000001451 molecular beam epitaxy Methods 0.000 claims description 7
- 239000000758 substrate Substances 0.000 claims description 3
- 229920002120 photoresistant polymer Polymers 0.000 abstract description 5
- 239000000126 substance Substances 0.000 abstract description 5
- 239000003153 chemical reaction reagent Substances 0.000 abstract description 4
- 238000000276 deep-ultraviolet lithography Methods 0.000 abstract description 4
- 230000005533 two-dimensional electron gas Effects 0.000 abstract description 4
- 238000005530 etching Methods 0.000 abstract 2
- 239000010931 gold Substances 0.000 description 18
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- 238000010586 diagram Methods 0.000 description 11
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- 229910021641 deionized water Inorganic materials 0.000 description 9
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- 235000019441 ethanol Nutrition 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/737—Hetero-junction transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/6631—Bipolar junction transistors [BJT] with an active layer made of a group 13/15 material
- H01L29/66318—Heterojunction transistors
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- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
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- Computer Hardware Design (AREA)
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- Manufacturing & Machinery (AREA)
- Bipolar Transistors (AREA)
Abstract
The invention provides a manufacturing method of an InP-based heterojunction bipolar transistor. The method comprises the following steps: photoetching an emitter epitaxial layer on the surface of the InP-based heterojunction bipolar transistor by using a deep ultraviolet light source to form an emitter electrode; etching an emitter epitaxial layer containing the emitter electrode to expose a base epitaxial layer of the InP-based heterojunction bipolar transistor; photoetching the exposed base epitaxial layer by using a deep ultraviolet light source to form a base electrode; etching a base epitaxial layer containing the base electrode to expose a collector epitaxial layer of the InP-based heterojunction bipolar transistor; and photoetching the exposed collector epitaxial layer by using a deep ultraviolet light source to form a collector electrode. The invention uses PMMA photoresist to match with deep ultraviolet lithography, avoids using alkaline reagent, thereby effectively avoiding chemical corrosion of alkaline substances to GaAsSb, ensuring the electrical properties of a conducting channel and two-dimensional electron gas to the maximum extent, and improving the device performance of the HBT of InP-based GaAsSb.
Description
Technical field
The present invention relates to technical field of semiconductors more particularly to a kind of production methods of InP-base heterojunction bipolar transistor.
Background technique
As new and high technology is constantly applied to military field, the frequency of frequency microwave signal is higher and higher, and frequency range is increasingly
The processing capacity of width, digit chip is more and more stronger, and modern war has progressed into information age and digital times.Electronics device
The fast development of part is getting faster the transmission rate of signal, and the semiconductor devices of III-V compound relies on its excellent frequency
Rate characteristic becomes the modernization national defence dress such as military communication, radar, guidance, space defense, high-speed intelligent weapon and electronic countermeasure
One of standby core component.Especially in Terahertz research field, indium phosphide (InP) sill using in the ascendant.
In the semiconductor devices of numerous III-V compound, InP-base material has unique advantage.InP-base transistor
With very excellent high frequency and high-power performance, wherein InP-base HBT (Heterojunction Bipolar
Transistor, heterojunction bipolar transistor) be more widely applied.In complicated InP-base epitaxial structure, InP-base
The HBT of GaAsSb has some peculiar advantages.Compared to the HBT structure with InP-base GaAsIn, the HBT of InP-base GaAsSb has more
High hole mobility, higher breakdown voltage and lower cut-in voltage.But in the HBT processing and fabricating of InP-base GaAsSb
Aspect has the problem of itself again, and wherein the problem of most critical is exactly photoetching process.
In the implementation of the present invention, inventor's discovery at least has the following technical problems in the prior art:
Common photoetching process uses ultraviolet band photoresist and developer solution, and ultraviolet band developer solution is generally alkalinity, and
Alkaline-based developer can corrode GaAsSb epitaxial layer, cause device function substantially reduce in addition HBT structure failure.
Summary of the invention
A kind of production method of InP-base heterojunction bipolar transistor provided by the invention, uses PMMA (polymethylacrylic acid
Methyl esters) photoresist cooperation deep-UV lithography, it avoids using alkaline reagent, thus alkaline matter is efficiently avoided to GaAsSb's
Chemical attack ensure that the electric property of conducting channel and two-dimensional electron gas to greatest extent, improve InP-base GaAsSb's
The device performance of HBT.
The present invention provides a kind of production method of InP-base heterojunction bipolar transistor, comprising:
Photoetching is carried out using emitter epitaxial layer of the deep ultraviolet light source to InP-base heterojunction bipolar transistor surface, is formed
Emitter electrode；
Corrosion contains the emitter epitaxial layer of the emitter electrode, exposes the InP-base heterojunction bipolar transistor
Base epitaxial layer；
Photoetching is carried out using base epitaxial layer of the deep ultraviolet light source to the InP-base heterojunction bipolar transistor of exposing,
Form base electrode；
Corrosion contains the base epitaxial layer of the base electrode, exposes the current collection of the InP-base heterojunction bipolar transistor
Pole epitaxial layer；
Light is carried out using collector epitaxial layer of the deep ultraviolet light source to the InP-base heterojunction bipolar transistor of exposing
It carves, forms collector electrode.
Optionally, it is described using deep ultraviolet light source to the emitter epitaxial layer on InP-base heterojunction bipolar transistor surface into
Row photoetching, forming emitter electrode includes:
Polymetylmethacrylate is coated on InP-base heterojunction bipolar transistor surface；
Photoetching is carried out using emitter epitaxial layer of the deep ultraviolet light source to InP-base heterojunction bipolar transistor surface；
In the InP-base heterojunction bipolar transistor surface evaporation metal alloy；
Corrode the metal alloy, forms emitter electrode.
Optionally, the metal alloy be Ti/Pt/Au/Ti/Au, the Ti/Pt/Au/Ti/Au with a thickness of 15nm/
15nm/400nm/10nm/400nm。
Optionally, it is described using deep ultraviolet light source to the base stage extension of the InP-base heterojunction bipolar transistor of exposing
Layer carries out photoetching, forms base electrode and includes:
Polymethyl methacrylate is coated on the base epitaxial layer surface of the InP-base heterojunction bipolar transistor of exposing
PMMA；
Photoetching is carried out using base epitaxial layer of the deep ultraviolet light source to the InP-base heterojunction bipolar transistor of exposing；
In the base epitaxial layer surface evaporation metal alloy of the InP-base heterojunction bipolar transistor of the exposing；
Corrode the metal alloy, forms base electrode.
Optionally, the metal alloy be Pt/Ti/Pt/Au, the Pt/Ti/Pt/Au with a thickness of 2nm/15nm/
15nm/120nm。
Optionally, it is described using deep ultraviolet light source to the collector of the InP-base heterojunction bipolar transistor of exposing outside
Prolong layer and carry out photoetching, forming collector electrode includes:
Poly-methyl methacrylate is coated on the collector epitaxial layer surface of the InP-base heterojunction bipolar transistor of exposing
Ester PMMA；
Light is carried out using collector epitaxial layer of the deep ultraviolet light source to the InP-base heterojunction bipolar transistor of exposing
It carves；
In the collector epitaxial layer surface evaporation metal alloy of the InP-base heterojunction bipolar transistor of the exposing；
Corrode the metal alloy, forms collector electrode.
Optionally, the metal alloy be Ti/Pt/Au, the Ti/Pt/Au with a thickness of 15nm/15nm/400nm.
Optionally, the wavelength of the deep ultraviolet light source is 180nm to 240nm.
Optionally, described using deep ultraviolet light source to the emitter epitaxial layer on InP-base heterojunction bipolar transistor surface
Photoetching is carried out, is formed before emitter electrode, the method also includes:
The heterojunction double-pole transistor of InP/GaAsSb is grown using molecular beam epitaxy.
Optionally, the heterojunction double-pole transistor packet that InP/GaAsSb is grown using molecular beam epitaxy
It includes:
Successively growth thickness is 250nm to 270nm in InP substrate, doping concentration is 1.2 × 1019N-type it is highly doped
InP epitaxial layer,
It is 2 × 10 with a thickness of 50nm to 60nm, doping concentration19The highly doped InGaAs collector epitaxial layer of N-type,
It is 1 × 10 with a thickness of 150nm to 170nm, doping concentration19InP buffer layer,
It is 1 × 10 with a thickness of 20nm to 40nm, doping concentration17The highly doped GaAsSb base epitaxial layer of p-type,
It is 2 × 10 with a thickness of 130nm to 150nm, doping concentration17InP buffer layer,
It is 3 × 10 with a thickness of 100nm to 120nm, doping concentration19The highly doped InGaAs emitter epitaxial layer of N-type.
The production method of InP-base heterojunction bipolar transistor provided in an embodiment of the present invention, using deep ultraviolet light source to InP
The emitter epitaxial layer on base heterojunction bipolar transistor surface carries out photoetching, forms emitter electrode；Corrosion contains the transmitting
The emitter epitaxial layer of pole electrode exposes the base epitaxial layer of the InP-base heterojunction bipolar transistor；Use deep ultraviolet light source
Photoetching is carried out to the base epitaxial layer of the InP-base heterojunction bipolar transistor of exposing, forms base electrode；Corrosion is containing
The base epitaxial layer for stating base electrode exposes the collector epitaxial layer of the InP-base heterojunction bipolar transistor；Use deep ultraviolet
Light source carries out photoetching to the collector epitaxial layer of the InP-base heterojunction bipolar transistor of exposing, forms collector electrode.Make
Cooperate deep-UV lithography with PMMA (polymethyl methacrylate) photoresist, avoid using alkaline reagent, thus is effectively prevented from
Chemical attack of the alkaline matter to GaAsSb, ensure that the electric property of conducting channel and two-dimensional electron gas to greatest extent,
Improve the device performance of the HBT of InP-base GaAsSb.
Detailed description of the invention
Fig. 1 is the flow chart of the production method of one embodiment of the invention InP-base heterojunction bipolar transistor；
Fig. 2 is the heterojunction bipolar transistor that one embodiment of the invention grows InP/GaAsSb using molecular beam epitaxy
Schematic diagram；
Fig. 3 is schematic diagram of the one embodiment of the invention in InP-base heterojunction bipolar transistor surface coating PMMA；
Fig. 4 is schematic diagram of the one embodiment of the invention to InP-base heterojunction bipolar transistor photoetching；
Fig. 5 is schematic diagram of the one embodiment of the invention in InP-base heterojunction bipolar transistor surface evaporation metal alloy；
Fig. 6 is the schematic diagram for the emitter epitaxial layer that one embodiment of the invention corrodes InP-base heterojunction bipolar transistor；
Fig. 7 is one embodiment of the invention in the base epitaxial layer surface of InP-base heterojunction bipolar transistor coating PMMA
Schematic diagram；
Fig. 8 is that one embodiment of the invention is closed in the base epitaxial layer surface evaporation metal of InP-base heterojunction bipolar transistor
The schematic diagram of gold；
Fig. 9 is the schematic diagram for the base epitaxial layer that one embodiment of the invention corrodes InP-base heterojunction bipolar transistor；
Figure 10 is one embodiment of the invention in the collector epitaxial layer surface of InP-base heterojunction bipolar transistor coating PMMA
Schematic diagram；
Figure 11 is collector epitaxial layer surface evaporation metal of the one embodiment of the invention in InP-base heterojunction bipolar transistor
The schematic diagram of alloy；
Figure 12 is the schematic diagram that one embodiment of the invention forms collector electrode in InP-base heterojunction bipolar transistor.
Specific embodiment
In order to make the object, technical scheme and advantages of the embodiment of the invention clearer, below in conjunction with the embodiment of the present invention
In attached drawing, technical scheme in the embodiment of the invention is clearly and completely described, it is clear that described embodiment is only
It is only a part of the embodiment of the present invention, instead of all the embodiments.Based on the embodiments of the present invention, ordinary skill
Personnel's every other embodiment obtained without making creative work, shall fall within the protection scope of the present invention.
The present invention provides a kind of production method of InP-base heterojunction bipolar transistor, as shown in Figure 1, which comprises
S10, the heterojunction double-pole transistor that InP/GaAsSb is grown using molecular beam epitaxy.
Specifically, as shown in Fig. 2, the heterogenous dual-pole crystal for growing InP/GaAsSb using molecular beam epitaxy
Pipe structure includes:
Successively growth thickness is 250nm to 270nm in InP substrate, doping concentration is 1.2 × 1019N-type it is highly doped
InP epitaxial layer,
It is 2 × 10 with a thickness of 50nm to 60nm, doping concentration19The highly doped InGaAs collector epitaxial layer of N-type,
It is 1 × 10 with a thickness of 150nm to 170nm, doping concentration19InP buffer layer,
It is 1 × 10 with a thickness of 20nm to 40nm, doping concentration17The highly doped GaAsSb base epitaxial layer of p-type,
It is 2 × 10 with a thickness of 130nm to 150nm, doping concentration17InP buffer layer,
It is 3 × 10 with a thickness of 100nm to 120nm, doping concentration19The highly doped InGaAs emitter epitaxial layer of N-type.
S11, photoetching is carried out using emitter epitaxial layer of the deep ultraviolet light source to InP-base heterojunction bipolar transistor surface,
Form emitter electrode.
Specifically, it is described using deep ultraviolet light source to the emitter epitaxial layer on InP-base heterojunction bipolar transistor surface into
Row photoetching, forming emitter electrode includes:
S111, InP-base heterojunction bipolar transistor surface coating thickness be 500nm polymethyl methacrylate
PMMA, as shown in Figure 3；
S112, the InP-base heterojunction bipolar transistor toasted 3 minutes using 180 DEG C of hot plates under vacuum conditions；
S113, it is carried out using emitter epitaxial layer of the deep ultraviolet light source to InP-base heterojunction bipolar transistor surface
Photoetching, obtained litho pattern are as shown in Figure 4；
S114, using volume ratio be 1:2 methyl iso-butyl ketone (MIBK) and isopropanol solution to the InP-base heterogenous dual-pole
Transistor develops；
S115, it first using deionized water rinses the InP-base heterojunction bipolar transistor after development and with being dried with nitrogen, then makes
With solution corrosion InGaAs emitter 10 seconds of HCl and water that volume ratio is 1:10, and is rinsed with deionized water and use nitrogen
Air-blowing is dry；
S116, in the InP-base heterojunction bipolar transistor surface evaporation metal alloy, as shown in Figure 5, wherein described
Metal alloy is Ti/Pt/Au/Ti/Au, the Ti/Pt/Au/Ti/Au with a thickness of 15nm/15nm/400nm/10nm/
400nm；
S117, first N methyl pyrrolidone is used to impregnate the metal alloy 15 minutes, reuses acetone soak 20 minutes,
It is then rinsed 30 seconds with ethyl alcohol, to remove PMMA, forms emitter electrode.
S12, corrosion contain the emitter epitaxial layer of the emitter electrode, expose the InP-base heterogenous dual-pole crystal
The base epitaxial layer of pipe, as shown in Figure 6.
Specifically, the corrosive liquid of corrosion InGaAs emitter epitaxial layer is the H that volume ratio is 3:1:503PO4、H2O2And water
Solution, corrode 1 minute；The corrosive liquid of corrosion layer of InP is the HCl and H that volume ratio is 1:43PO4Solution, corrode 45 seconds；
It is then cleaned with deionized water, with being dried with nitrogen.
S13, light is carried out using base epitaxial layer of the deep ultraviolet light source to the InP-base heterojunction bipolar transistor of exposing
It carves, forms base electrode.
Specifically, it is described using deep ultraviolet light source to the base stage extension of the InP-base heterojunction bipolar transistor of exposing
Layer carries out photoetching, forms base electrode and includes:
S131, exposing the InP-base heterojunction bipolar transistor base epitaxial layer surface coating thickness be 450nm
Polymetylmethacrylate, as shown in Figure 7；
S132, the InP-base heterojunction bipolar transistor toasted 3 minutes using 180 DEG C of hot plates under vacuum conditions；
S133, it is carried out using base epitaxial layer of the deep ultraviolet light source to the InP-base heterojunction bipolar transistor of exposing
Photoetching；
S134, using volume ratio be 1:2 methyl iso-butyl ketone (MIBK) and isopropanol solution to the InP-base heterogenous dual-pole
Transistor develops；
S135, it first using deionized water rinses the InP-base heterojunction bipolar transistor after development and with being dried with nitrogen, then makes
With solution corrosion GaAsSb base stage 10 seconds of HCl and water that volume ratio is 1:10, and rinsed with deionized water and with nitrogen gas
Drying；
S136, the exposing the InP-base heterojunction bipolar transistor base epitaxial layer surface evaporation metal close
Gold, as shown in Figure 8, wherein the metal alloy be Pt/Ti/Pt/Au, the Pt/Ti/Pt/Au with a thickness of 2nm/15nm/
15nm/120nm。
S137, first N methyl pyrrolidone is used to impregnate the metal alloy 15 minutes, reuses acetone soak 20 minutes,
It is then rinsed 30 seconds with ethyl alcohol, to remove PMMA, forms base electrode.
S14, corrosion contain the base epitaxial layer of the base electrode, expose the InP-base heterojunction bipolar transistor
Collector epitaxial layer, as shown in Figure 9.
Specifically, the corrosive liquid of corrosion GaAsSb base epitaxial layer is H3PO4, H2O2 and water that volume ratio is 3:1:50
Solution corrodes 90 seconds；The corrosive liquid of corrosion layer of InP is the solution of HCl and H3PO4 that volume ratio is 1:4, is corroded 90 seconds；
InP-base heterojunction bipolar transistor 5 minutes described in acetone soak are rinsed 30 seconds using ethyl alcohol, then clear with deionized water
It washes, with being dried with nitrogen.
S15, it is carried out using collector epitaxial layer of the deep ultraviolet light source to the InP-base heterojunction bipolar transistor of exposing
Photoetching forms collector electrode.
Specifically, it is described using deep ultraviolet light source to the collector of the InP-base heterojunction bipolar transistor of exposing outside
Prolong layer and carry out photoetching, forming collector electrode includes:
S151, it is in the collector epitaxial layer surface coating thickness of the InP-base heterojunction bipolar transistor of exposing
The polymetylmethacrylate of 500nm, as shown in Figure 10；
S152, the InP-base heterojunction bipolar transistor toasted 3 minutes using 180 DEG C of hot plates under vacuum conditions；
S153, using deep ultraviolet light source to the collector epitaxial layer of the InP-base heterojunction bipolar transistor of exposing into
Row photoetching；
S154, using volume ratio be 1:2 methyl iso-butyl ketone (MIBK) and isopropanol solution to the InP-base heterogenous dual-pole
Transistor develops；
S155, it first using deionized water rinses the InP-base heterojunction bipolar transistor after development and with being dried with nitrogen, then makes
With solution corrosion InGaAs emitter 10 seconds of HCl and water that volume ratio is 1:10, and is rinsed with deionized water and use nitrogen
Air-blowing is dry；
S156, the exposing the InP-base heterojunction bipolar transistor collector epitaxial layer surface evaporation metal
Alloy, as shown in figure 11, wherein the metal alloy be Ti/Pt/Au, the Ti/Pt/Au with a thickness of 15nm/15nm/
400nm；
S157, it is impregnated the metal alloy 15 minutes using N methyl pyrrolidone, corrodes the metal alloy, then used
Deionized water cleaning forms collector electrode, as shown in figure 12 with being dried with nitrogen.
Optionally, the wavelength of deep ultraviolet light source provided by the invention is 180nm to 240nm.
The production method of InP-base heterojunction bipolar transistor provided in an embodiment of the present invention, using deep ultraviolet light source to InP
The emitter epitaxial layer on base heterojunction bipolar transistor surface carries out photoetching, forms emitter electrode；Corrosion contains the transmitting
The emitter epitaxial layer of pole electrode exposes the base epitaxial layer of the InP-base heterojunction bipolar transistor；Use deep ultraviolet light source
Photoetching is carried out to the base epitaxial layer of the InP-base heterojunction bipolar transistor of exposing, forms base electrode；Corrosion is containing
The base epitaxial layer for stating base electrode exposes the collector epitaxial layer of the InP-base heterojunction bipolar transistor；Use deep ultraviolet
Light source carries out photoetching to the collector epitaxial layer of the InP-base heterojunction bipolar transistor of exposing, forms collector electrode.Make
Cooperate deep-UV lithography with PMMA (polymethyl methacrylate) photoresist, avoid using alkaline reagent, thus is effectively prevented from
Chemical attack of the alkaline matter to GaAsSb, ensure that the electric property of conducting channel and two-dimensional electron gas to greatest extent,
Improve the device performance of the HBT of InP-base GaAsSb.
The above description is merely a specific embodiment, but scope of protection of the present invention is not limited thereto, any
In the technical scope disclosed by the present invention, any changes or substitutions that can be easily thought of by those familiar with the art, all answers
It is included within the scope of the present invention.Therefore, protection scope of the present invention should be subject to the protection scope in claims.
Claims (9)
1. a kind of production method of InP-base heterojunction bipolar transistor characterized by comprising
Photoetching is carried out using emitter epitaxial layer of the deep ultraviolet light source to InP-base heterojunction bipolar transistor surface, forms transmitting
Pole electrode；
Corrosion contains the emitter epitaxial layer of the emitter electrode, exposes the base stage of the InP-base heterojunction bipolar transistor
Epitaxial layer；
Polymethyl methacrylate is coated on the base epitaxial layer surface of the InP-base heterojunction bipolar transistor of exposing
PMMA；
Photoetching is carried out using base epitaxial layer of the deep ultraviolet light source to the InP-base heterojunction bipolar transistor of exposing；
In the base epitaxial layer surface evaporation metal alloy of the InP-base heterojunction bipolar transistor of the exposing；
Corrode the metal alloy, forms base electrode；
Corrosion contains the base epitaxial layer of the base electrode, outside the collector for exposing the InP-base heterojunction bipolar transistor
Prolong layer；
Photoetching, shape are carried out using collector epitaxial layer of the deep ultraviolet light source to the InP-base heterojunction bipolar transistor of exposing
At collector electrode.
2. the method according to claim 1, wherein described use deep ultraviolet light source to InP-base heterogenous dual-pole
The emitter epitaxial layer of transistor surface carries out photoetching, forms emitter electrode and includes:
Polymetylmethacrylate is coated on InP-base heterojunction bipolar transistor surface；
Photoetching is carried out using emitter epitaxial layer of the deep ultraviolet light source to InP-base heterojunction bipolar transistor surface；
In the InP-base heterojunction bipolar transistor surface evaporation metal alloy；
Corrode the metal alloy, forms emitter electrode.
3. according to the method described in claim 2, it is characterized in that, the metal alloy is Ti/Pt/Au/Ti/Au, the Ti/
Pt/Au/Ti/Au with a thickness of 15nm/15nm/400nm/10nm/400nm.
4. the method according to claim 1, wherein the metal alloy is Pt/Ti/Pt/Au, the Pt/Ti/
Pt/Au with a thickness of 2nm/15nm/15nm/120nm.
5. the method according to claim 1, wherein it is described using deep ultraviolet light source to the InP-base of exposing
The collector epitaxial layer of heterojunction bipolar transistor carries out photoetching, forms collector electrode and includes:
Polymethyl methacrylate is coated on the collector epitaxial layer surface of the InP-base heterojunction bipolar transistor of exposing
PMMA；
Photoetching is carried out using collector epitaxial layer of the deep ultraviolet light source to the InP-base heterojunction bipolar transistor of exposing；
In the collector epitaxial layer surface evaporation metal alloy of the InP-base heterojunction bipolar transistor of the exposing；
Corrode the metal alloy, forms collector electrode.
6. according to the method described in claim 5, it is characterized in that, the metal alloy is Ti/Pt/Au, the Ti/Pt/Au
With a thickness of 15nm/15nm/400nm.
7. method according to any one of claim 1 to 6, which is characterized in that the wavelength of the deep ultraviolet light source is
180nm to 240nm.
8. the method according to claim 1, wherein described double to InP-base hetero-junctions using deep ultraviolet light source
The emitter epitaxial layer on gated transistors surface carries out photoetching, is formed before emitter electrode, the method also includes:
The heterojunction double-pole transistor of InP/GaAsSb is grown using molecular beam epitaxy.
9. according to the method described in claim 8, it is characterized in that, described grow InP/GaAsSb using molecular beam epitaxy
Heterojunction double-pole transistor include:
Successively growth thickness is 250nm to 270nm in InP substrate, doping concentration is 1.2 × 1019The highly doped InP of N-type outside
Prolong layer,
It is 2 × 10 with a thickness of 50nm to 60nm, doping concentration19The highly doped InGaAs collector epitaxial layer of N-type,
It is 1 × 10 with a thickness of 150nm to 170nm, doping concentration19InP buffer layer,
It is 1 × 10 with a thickness of 20nm to 40nm, doping concentration17The highly doped GaAsSb base epitaxial layer of p-type,
It is 2 × 10 with a thickness of 130nm to 150nm, doping concentration17InP buffer layer,
It is 3 × 10 with a thickness of 100nm to 120nm, doping concentration19The highly doped InGaAs emitter epitaxial layer of N-type.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0810645A2 (en) * | 1996-05-13 | 1997-12-03 | Trw Inc. | Method of fabricating double photoresist layer self-aligned heterojunction bipolar transistor |
| CN1317832A (en) * | 2001-06-06 | 2001-10-17 | 山东大学 | Dual-heterojunction CaAsSb/Inp transistor and its preparing process |
| CN1855533A (en) * | 2005-04-21 | 2006-11-01 | 松下电器产业株式会社 | Heterojunction bipolar transistor and method for fabricating the same |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0810645A2 (en) * | 1996-05-13 | 1997-12-03 | Trw Inc. | Method of fabricating double photoresist layer self-aligned heterojunction bipolar transistor |
| CN1317832A (en) * | 2001-06-06 | 2001-10-17 | 山东大学 | Dual-heterojunction CaAsSb/Inp transistor and its preparing process |
| CN1855533A (en) * | 2005-04-21 | 2006-11-01 | 松下电器产业株式会社 | Heterojunction bipolar transistor and method for fabricating the same |
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