CN100511596C - Method for producing transistor T type nano grid using once electron beam exposure - Google Patents
Method for producing transistor T type nano grid using once electron beam exposure Download PDFInfo
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- CN100511596C CN100511596C CNB2007100648531A CN200710064853A CN100511596C CN 100511596 C CN100511596 C CN 100511596C CN B2007100648531 A CNB2007100648531 A CN B2007100648531A CN 200710064853 A CN200710064853 A CN 200710064853A CN 100511596 C CN100511596 C CN 100511596C
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Abstract
The invention discloses a method for using once electric beam exposure to manufacture transistor T-shaped nanometer gate, comprising the steps of: A, coating a first layer electric beam glue which is liable to realize glue-stripping and peeling on a cleaned epitaxial wafer, and then soft-baking; B, coating a second layer electric beam glue ZEP520A on the first layer electric beam glue, and then soft-baking; C, coating a third layer electric beam glue which is liable to realize glue-stripping and peeling on the second layer electric beam glue ZEP520A, and then soft-baking; D, coating a fourth layer electric beam glue ZEP520A on the third layer electric beam glue, and then soft-baking; E, carrying out gate electric beam exposure; F, sequentially developing the four layer electric beam glue ZEP520A, the third layer electric beam glue which is liable to realize glue-stripping and peeling, the second layer electric beam glue ZEP520A and the first layer electric beam glue which is liable to realize glue-stripping and peeling; G, eroding the gate groove, evaporating and peeling off gate metals to form the transistor T-shaped nanometer gate. The invention has strong reliability, simple processes and is easy to peel off and strip the glue.
Description
Technical field
The present invention relates to the compound semiconductor technical field, relate in particular to a kind of method that adopts the once electron beam exposure technology to prepare High Electron Mobility Transistor T type nanometer grid.
Background technology
The preparation of grid is the technology of most critical in High Electron Mobility Transistor (HEMT) device making technics.The characteristics such as the little frequency that directly determines the HEMT device, noise because grid are grown up, grid are long more little, the current cut-off frequency (f of device
T) and power gain cutoff frequency (f
Max) high more, the noise factor of device is also more little, and people obtain the device of better characteristic by the grid length that constantly reduces High Electron Mobility Transistor (HEMT) device.
Shorten along with grid are long, gate resistance increases, and when grid length reduces to 0.5 μ m when following, the lossy microwave of gate resistance makes gain reduction more serious.Therefore to construct big cross section metal at the top of grid metal, thereby form the manufacture method of T shape grid.
At present domestic and international application is extensively, the typical method of the preparation HEMT device T type grid reported has following two kinds:
A kind of method adopts three layers of electron beam adhesive structure of PMMA/PMGI/PMMA, by once electron beam exposure prepare grid (onyx sweet smell, Haiying ZHANG, Liu Xunchun etc. a kind of new high finished product rate InP base T type nanometer grid preparation method. the semiconductor journal, 2003,23 (4): 411～415);
Another kind method adopts three layers of electron beam adhesive structure of ZEP520A/PMGI/ZEP520A, prepare grid (Yoshimi Yamashita by twice electron beam exposure, Akira Endoh, KeisukeShinohara, ec al.Ultra-Short 25-nm-Gate Lattice-Matched InAlAs/InGaAsHEMTs within the Range of 400GHz Cutoff Frequency.IEEE Electron DeviceLetters, Aug 2001,22 (8): 367～369).
As shown in Figure 1, Fig. 1 prepares the schematic diagram of grid for adopting three layers of electron beam adhesive structure of PMMA/PMGI/PMMA and once electron beam exposure at present.This method adopts three layers of electron beam adhesive structure of PMMA/PMGI/PMMA, prepares grid by once electron beam exposure, only uses once electron beam exposure, does not have the alignment issues of grid cover and grid pin.But because the PMMA electron beam adhesive is very responsive to developer solution, make developing time wayward, be not apt to do the nanometer grid line bar of very small dimensions.
As shown in Figure 2, Fig. 2 prepares the schematic diagram of grid for adopting at present three layers of electron beam adhesive structure of ZEP520A/PMGI/ZEP520A and twice electron beam exposure.This method adopts three layers of electron beam adhesive structure of ZEP520A/PMGI/ZEP520A, prepares grid by twice electron beam exposure.Certainly exist certain alignment error between twice electron beam exposure of grid pin version and grid cover version, make for the T type grid of nano-scale, alignment precision requires high, and technology realizes that difficulty is bigger.
In addition, because ZEP520A and epitaxial wafer adhesiveness are bad, need first deposit one deck medium before the even glue, this medium is generally silicon nitride or silicon dioxide, also the dielectric etch at grid groove place will be fallen behind the exposure imaging, the hachure etching of nano-scale is difficult to control, has also increased technology difficulty greatly, and the ZEP520A electron beam adhesive of bottom is difficult to be removed, and influences Devices Characteristics easily.
Summary of the invention
(1) technical problem that will solve
In view of this, main purpose of the present invention is to provide a kind of method that adopts the once electron beam exposure technology to prepare High Electron Mobility Transistor T type nanometer grid, the deficiency that exists when preparing to overcome present High Electron Mobility Transistor (HEMT) T type nanometer grid.
(2) technical scheme
For achieving the above object, technical scheme of the present invention is achieved in that
A kind of method that adopts once electron beam exposure to prepare transistor T-shaped nano grid, this method may further comprise the steps:
A, on the epitaxial wafer that cleans up even one deck ground floor electron beam adhesive, then before baking;
B, on described ground floor electron beam adhesive even second layer electron beam adhesive ZEP520A, then before baking;
C, on described second layer electron beam adhesive ZEP520A even the 3rd layer of electron beam adhesive of one deck, then before baking;
D, on described the 3rd layer of electron beam adhesive even the 4th layer of electron beam adhesive ZEP520A, then before baking;
E, carry out grid version electron beam exposure;
F, the 4th layer of electron beam adhesive ZEP520A that develop successively, the 3rd layer of electron beam adhesive, second layer electron beam adhesive ZEP520A and ground floor electron beam adhesive;
G, corrosion grid groove, evaporation grid metal is also peeled off, and forms transistor T-shaped nano grid.
Further comprise before the described steps A: clean epitaxial wafer, on the epitaxial wafer that in the vacuum drying oven of 130 degree, hexamethyldisilazane HMDS evaporation is being cleaned up, be used to increase the adhesiveness of epitaxial wafer and glue.
The step of described cleaning epitaxial wafer comprises: use acetone rinsing earlier, use alcohol flushing again, use deionized water rinsing then, at least 6 times so repeatedly, dry up with nitrogen at last.
Described ground floor electron beam adhesive and the 3rd layer of electron beam adhesive are the PMGI electron beam adhesive, or are LOR glue.
The thickness of the electron beam adhesive of ground floor described in the steps A before preceding baking is 300 to 700 dusts, and the thickness after preceding baking is 200 to 600 dusts, and preceding baking condition is to dry by the fire 6 minutes in 180 degree baking ovens.
The thickness of the electron beam adhesive of the second layer described in step B ZEP520A before preceding baking is 1000 to 1800 dusts, and the thickness after preceding baking is 900 to 1500 dusts, and preceding baking condition is to dry by the fire 30 minutes in 180 degree baking ovens.
The thickness of the 3rd layer of electron beam adhesive described in the step C before preceding baking is 3000 to 5500 dusts, and the thickness after preceding baking is 2500 to 5000 dusts, and preceding baking condition is to dry by the fire 6 minutes in 180 degree baking ovens.
The thickness of the 4th layer of electron beam adhesive ZEP520A described in the step D before preceding baking is 1700 to 4000 dusts, and the thickness after preceding baking is 1500 to 3500 dusts, and preceding baking condition is to dry by the fire 30 minutes in 180 degree baking ovens.
The condition of the version of grid described in step e electron beam exposure is: exposure dose 60 to 150 μ C/cm
2, line is smaller or equal to 50pA.
The grid of corrosion described in step G groove comprises:
For cap layer/corrosion cutoff layer is the material of GaAs GaAs/ aluminium arsenide AlAs, and adopt phosphoric acid: hydrogen peroxide: water volume ratio is that the solution of 3:1:50 corrodes;
For cap layer/corrosion cutoff layer is the material of indium gallium arsenic InGaAs/ indium phosphide InP, and adopt citric acid: the hydrogen peroxide volume ratio is that the solution of 1:1 corrodes;
The grid metal that evaporates described in the step H upwards is followed successively by titanium Ti/ platinum Pt/ gold Au by the epitaxial wafer surface, and its thickness is respectively
(3) beneficial effect
From technique scheme as can be seen, the present invention has following beneficial effect:
1, this employing once electron beam exposure provided by the invention prepares the method for transistor T-shaped nano grid, compare with the conventional method that adopts PMMA/PMGI/PMMA or ZEP520A/PMGI/ZEP520A electron beam adhesive structure to prepare High Electron Mobility Transistor (HEMT) T type grid, the problem that does not exist cover to aim at, remove photoresist easily, technology is simple, make undersized grid line bar, characteristics such as good reliability easily.
2, adopt PMMA/PMGI/PMMA electron beam structure to prepare the conventional method of High Electron Mobility Transistor (HEMT) T type nanometer grid, because the PMMA electron beam adhesive is very responsive to developer solution, the line size that of developing becomes big easily, the bad control of this method developing time is difficult for making the nanometer grid line bar of very small dimensions.Used the ZEP520A electron beam adhesive in four layers of electron beam adhesive structure of PMGI/ZEP520A/PMGI/ZEP520A that the present invention adopts, the ZEP520A electron beam adhesive is lower to the developer solution susceptibility, the line size that of developing changes very little in time, developing time is controlled easily, produce undersized grid line bar easily, good reliability.
3, adopt ZEP520A/PMGI/ZEP520A electron beam structure to prepare the conventional method of High Electron Mobility Transistor (HEMT) T type nanometer grid, because after grid cover version electron beam exposure is finished, needing that epitaxial wafer is taken out the electron beam lithography machine develops, be reentered into the electron beam exposure that the electron beam lithography machine carries out the grid pin afterwards again, the increase grid cover that so repeatedly mobile epitaxial wafer will be artificial and the alignment error of grid pin.In addition, this conventional method is because bottom ZEP520A electron beam adhesive and epitaxial wafer adhesiveness are bad, need be on epitaxial wafer first deposit one deck medium (being generally silicon nitride or silicon dioxide), after development, again the dielectric etch at grid groove place is fallen, but the hachure etching of nano-scale is difficult to control, and technology difficulty is bigger; And remove because the ZEP520A electron beam adhesive of bottom is difficult, influence Devices Characteristics easily.The present invention only uses once electron beam exposure, and the change (as shown in Figure 5 and Figure 6) of ground floor and the 3rd layer of electron beam adhesive pattern forms grid cover and grid pin when utilizing evaporation grid metal, and T type grid are made in autoregistration, the problem that does not exist cover to aim at.
4, this employing once electron beam exposure provided by the invention prepares the method for transistor T-shaped nano grid, adopt four layers of electron beam adhesive structure of PMGI/ZEP520A/PMGI/ZEP520A, earlier even one deck PMGI electron beam adhesive on epitaxial wafer, to increase the adhesiveness of ZEP520A electron beam adhesive and epitaxial wafer, do not need growth and etching medium, reduced technology difficulty greatly, and, do not had the problem of removing photoresist because PMGI and LOR glue remove photoresist and is easy to.
Description of drawings
Fig. 1 prepares the schematic diagram of grid for adopting three layers of electron beam adhesive structure of PMMA/PMGI/PMMA and once electron beam exposure at present;
Fig. 2 prepares the schematic diagram of grid for adopting at present three layers of electron beam adhesive structure of ZEP520A/PMGI/ZEP520A and twice electron beam exposure;
Fig. 3 prepares the realization flow figure of transistor T-shaped nano grid overall technological scheme for employing once electron beam exposure provided by the invention;
Fig. 4 is for adopting once electron beam exposure to prepare the method flow diagram of transistor T-shaped nano grid according to the embodiment of the invention;
Fig. 5 develops for the present invention adopts four layers of electron beam adhesive structure of PMGI/ZEP520A/PMGI/ZEP520A and once electron beam exposure, the schematic diagram behind the corrosion grid groove;
Fig. 6 develops for the present invention adopts four layers of electron beam adhesive structure of PMGI/ZEP520A/PMGI/ZEP520A and once electron beam exposure, the schematic diagram after corroding the grid groove and evaporating the grid metal.
Embodiment
For making the purpose, technical solutions and advantages of the present invention clearer, below in conjunction with specific embodiment, and with reference to accompanying drawing, the present invention is described in more detail.
As shown in Figure 3, Fig. 3 is the realization flow figure that employing once electron beam exposure provided by the invention prepares the transistor T-shaped nano grid overall technological scheme, and this method may further comprise the steps:
Step 301: even one deck is easy to realize the ground floor electron beam adhesive of removing photoresist and peeling off on the epitaxial wafer that cleans up, then before baking;
Step 302: even second layer electron beam adhesive ZEP520A on described ground floor electron beam adhesive, preceding then baking;
Step 303: even one deck is easy to realize the 3rd layer of electron beam adhesive of removing photoresist and peeling off on described second layer electron beam adhesive ZEP520A, then before baking;
Step 304: even the 4th layer of electron beam adhesive ZEP520A on described the 3rd layer of electron beam adhesive, preceding then baking;
Step 305: carry out grid version electron beam exposure;
Step 306: the 4th layer of electron beam adhesive ZEP520A that develop successively, be easy to realize the 3rd layer of electron beam adhesive of removing photoresist and peeling off, second layer electron beam adhesive ZEP520A and being easy to realizes the ground floor electron beam adhesive of removing photoresist and peeling off;
Step 307: corrosion grid groove, evaporation grid metal is also peeled off, and forms transistor T-shaped nano grid.
Further comprise before the above-mentioned steps 301: clean epitaxial wafer, 130 the degree vacuum drying ovens in hexamethyldisilazane (Hexamethyldisilazane, HMDS) evaporation its role is to increase the adhesiveness of epitaxial wafer and glue on the epitaxial wafer that cleans up.
The step of described cleaning epitaxial wafer comprises: use acetone rinsing earlier, use alcohol flushing again, use deionized water rinsing then, at least 6 times so repeatedly, dry up with nitrogen at last.
Above-mentioned ground floor electron beam adhesive and the 3rd layer of electron beam adhesive that is easy to realize to remove photoresist and peels off can be the PMGI electron beam adhesive, also can be LOR glue.
The thickness of the electron beam adhesive of ground floor described in the step 301 before preceding baking is 300 to 700 dusts, and representative value is 500 dusts; Thickness after preceding baking is 200 to 600 dusts, and representative value is 300 dusts; Preceding baking condition is to dry by the fire 6 minutes in 180 degree baking ovens.
The thickness of the electron beam adhesive of the second layer described in the step 302 ZEP520A before preceding baking is 1000 to 1800 dusts, and representative value is 1400 dusts; Thickness after preceding baking is 900 to 1500 dusts, and representative value is 1200 dusts; Preceding baking condition is to dry by the fire 30 minutes in 180 degree baking ovens.
The thickness of the 3rd layer of electron beam adhesive described in the step 303 before preceding baking is 3000 to 5500 dusts, and representative value is 4500 dusts; Thickness after preceding baking is 2500 to 5000 dusts, and representative value is 4000 dusts; Preceding baking condition is to dry by the fire 6 minutes in 180 degree baking ovens.
The thickness of the 4th layer of electron beam adhesive ZEP520A described in the step 304 before preceding baking is 1700 to 4000 dusts, and representative value is 2600 dusts; Thickness after preceding baking is 1500 to 3500 dusts, and representative value is 2400 dusts; Preceding baking condition is to dry by the fire 30 minutes in 180 degree baking ovens.
The condition of the version of grid described in the step 305 electron beam exposure is: exposure dose 60 to 150 μ C/cm
2, line is smaller or equal to 50pA.
The grid of corrosion described in the step 307 groove comprises:
For cap layer/corrosion cutoff layer is the material of GaAs (GaAs)/aluminium arsenide (AlAs), and adopt phosphoric acid: the solution of hydrogen peroxide: water=3:1:50 (volume ratio) corrodes;
For cap layer/corrosion cutoff layer is the material of indium gallium arsenic (InGaAs)/indium phosphide (InP), adopts the solution of citric acid: hydrogen peroxide=1:1 (volume ratio) to corrode;
The grid metal of evaporation upwards is followed successively by titanium (Ti)/platinum (Pt)/gold (Au) by the epitaxial wafer surface described in the step 307, and the representative value of its thickness is respectively
Prepare the realization flow figure of transistor T-shaped nano grid overall technological scheme based on the described employing once electron beam exposure of Fig. 3, the method that the present invention adopts once electron beam exposure to prepare High Electron Mobility Transistor T type nanometer grid is further described below in conjunction with specific embodiment.
Embodiment
The method of High Electron Mobility Transistor in the present embodiment (HEMT) T type nanometer grid preparations is the some shortcomings that exist when preparing at present High Electron Mobility Transistor (HEMT) T type nanometer grid, adopts four layers of electron beam lithography plastic structure of PMGI/ZEP520A/PMGI/ZEP520A (as shown in table 1) and once electron beam exposure method to prepare High Electron Mobility Transistor (HEMT) T type nanometer grid.
Four layers of electron beam resist structural representation of the PMGI/ZEP520A/PMGI/ZEP520A table that is adopted in the method for table 1 for the preparation of High Electron Mobility Transistor of the present invention (HEMT) T type nanometer grid:
Table 1
In the present embodiment, ground floor electron beam adhesive and the 3rd layer of electron beam adhesive of being easy to realize to remove photoresist and peeling off are the PMGI electron beam adhesive, the four layers of electron beam lithography plastic structure of PMGI/ZEP520A/PMGI/ZEP520A that adopted in the method for High Electron Mobility Transistor (HEMT) T type nanometer grid preparation, the effect of each layer glue is as follows:
1, the effect that is positioned at the ground floor electron beam adhesive PMGI of the bottom is to increase the adhesiveness of second layer glue ZEP520A electron beam adhesive and epitaxial wafer, helps simultaneously to remove photoresist;
The change definition grid pin (deformation process is seen Fig. 5 and Fig. 6) of its pattern when 2, the effect of second layer glue ZEP520A electron beam adhesive is exposure imaging by this layer and evaporation grid metal;
3, the effect of the 3rd layer of glue PMGI electron beam adhesive is to isolate second layer glue ZEP520A electron beam adhesive and the 4th layer of glue ZEP520A electron beam adhesive, and helps the grid metal-stripping;
The change definition grid cover (deformation process is seen Fig. 5 and Fig. 6) of its pattern when 4, the effect of the 4th layer of glue ZEP520A electron beam adhesive is exposure imaging by this layer and evaporation grid metal.
As shown in Figure 4, Fig. 4 is for adopting once electron beam exposure to prepare the method flow diagram of transistor T-shaped nano grid according to the embodiment of the invention, and this method may further comprise the steps:
Step 401: clean epitaxial wafer.With the acetone soln flushing, use alcohol flushing more earlier, use deionized water rinsing then, at least 6 times so repeatedly, dry up with nitrogen at last.
Step 402: on the epitaxial wafer that in the vacuum drying oven of 130 degree, hexamethyldisilazane (HMDS) evaporation is being cleaned up, be used to increase the adhesiveness of epitaxial wafer and glue.
Step 403: an even layer thickness is the electron beam adhesive PMGI of 500 dusts on described epitaxial wafer, dries by the fire 6 minutes in 180 degree baking ovens then, and the thickness of baking back this layer glue is the 300 Izod right sides.
Step 404: even thickness is the second layer glue of 1400 dusts on described ground floor electron beam adhesive PMGI, and promptly the ZEP520A electron beam adhesive was dried by the fire 30 minutes in 180 degree baking ovens then, and the thickness of baking back this layer glue is the 1200 Izod right sides.
Step 405: even thickness is the 3rd layer of glue PMGI electron beam adhesive of 4500 dusts on described second layer glue, dries by the fire 6 minutes in 180 degree baking ovens then, and the thickness of baking back this layer glue is the 4000 Izod right sides.
Step 406: even thickness is the 4th layer of glue ZEP520A electron beam adhesive of 2600 dusts on described the 3rd layer of glue, dries by the fire 30 minutes in 180 degree baking ovens then, and the thickness of baking back this layer glue is the 2400 Izod right sides.
Step 407: carry out grid version electron beam exposure, exposure dose 60 to 150 μ C/cm
2, line is smaller or equal to 50pA.
Step 408: the 4th layer of glue ZEP520A electron beam adhesive of developing successively, the 3rd layer of glue PMGI electron beam adhesive, second layer glue ZEP520A electron beam adhesive and ground floor glue PMGI electron beam adhesive.
Step 409: corrosion grid groove, evaporation grid metal is also peeled off, and forms transistor T-shaped nano grid.
In this step, be the material of GaAs GaAs/ aluminium arsenide AlAs for cap layer/corrosion cutoff layer, can adopt phosphoric acid: hydrogen peroxide: the solution of water=3:1:50 (volume ratio) corrodes;
For cap layer/corrosion cutoff layer is the material of indium gallium arsenic InGaAs/ indium phosphide InP, can adopt and can adopt the solution of citric acid: hydrogen peroxide=1:1 (volume ratio) to corrode;
The grid metal of described evaporation upwards is followed successively by titanium Ti/ platinum Pt/ gold Au by the epitaxial wafer surface, and the representative value of its thickness is respectively
The present invention for this embodiment in, be easy to realize to remove photoresist and ground floor electron beam adhesive and the 3rd layer of electron beam adhesive of peeling off are the PMGI electron beam adhesive.In actual applications, described ground floor electron beam adhesive can be the PMGI electron beam adhesive, also can be LOR glue; The 3rd layer of electron beam adhesive can be the PMGI electron beam adhesive, also can be LOR glue.Such technical scheme is consistent on technical thought with technical scheme provided by the invention, should be included within protection scope of the present invention.
Above-described specific embodiment; purpose of the present invention, technical scheme and beneficial effect are further described; institute is understood that; the above only is specific embodiments of the invention; be not limited to the present invention; within the spirit and principles in the present invention all, any modification of being made, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1, a kind of method that adopts once electron beam exposure to prepare transistor T-shaped nano grid is characterized in that, this method may further comprise the steps:
A, on the epitaxial wafer that cleans up even one deck ground floor electron beam adhesive, then before baking;
B, on described ground floor electron beam adhesive even second layer electron beam adhesive ZEP520A, then before baking;
C, on described second layer electron beam adhesive ZEP520A even the 3rd layer of electron beam adhesive of one deck, then before baking;
D, on described the 3rd layer of electron beam adhesive even the 4th layer of electron beam adhesive ZEP520A, then before baking;
E, carry out grid version electron beam exposure;
F, the 4th layer of electron beam adhesive ZEP520A that develop successively, the 3rd layer of electron beam adhesive, second layer electron beam adhesive ZEP520A and ground floor electron beam adhesive;
G, corrosion grid groove, evaporation grid metal is also peeled off, and forms transistor T-shaped nano grid.
2, employing once electron beam exposure according to claim 1 prepares the method for transistor T-shaped nano grid, it is characterized in that, further comprises before the described steps A:
Clean epitaxial wafer, on the epitaxial wafer that in the vacuum drying oven of 130 degree, hexamethyldisilazane HMDS evaporation is being cleaned up, be used to increase the adhesiveness of epitaxial wafer and glue.
3, employing once electron beam exposure according to claim 2 prepares the method for transistor T-shaped nano grid, it is characterized in that, the step of described cleaning epitaxial wafer comprises:
Earlier use acetone rinsing, use alcohol flushing again, use deionized water rinsing then, at least 6 times so repeatedly, dry up with nitrogen at last.
4, employing once electron beam exposure according to claim 1 prepares the method for transistor T-shaped nano grid, it is characterized in that, described ground floor electron beam adhesive and the 3rd layer of electron beam adhesive are the PMGI electron beam adhesive, or are LOR glue.
5, employing once electron beam exposure according to claim 1 prepares the method for transistor T-shaped nano grid, it is characterized in that, the thickness of the electron beam adhesive of ground floor described in the steps A before preceding baking is 300 to 700 dusts, thickness after preceding baking is 200 to 600 dusts, and preceding baking condition is to dry by the fire 6 minutes in 180 degree baking ovens.
6, employing once electron beam exposure according to claim 1 prepares the method for transistor T-shaped nano grid, it is characterized in that, the thickness of the electron beam adhesive of the second layer described in step B ZEP520A before preceding baking is 1000 to 1800 dusts, thickness after preceding baking is 900 to 1500 dusts, and preceding baking condition is to dry by the fire 30 minutes in 180 degree baking ovens.
7, employing once electron beam exposure according to claim 1 prepares the method for transistor T-shaped nano grid, it is characterized in that, the thickness of the 3rd layer of electron beam adhesive described in the step C before preceding baking is 3000 to 5500 dusts, thickness after preceding baking is 2500 to 5000 dusts, and preceding baking condition is to dry by the fire 6 minutes in 180 degree baking ovens.
8, employing once electron beam exposure according to claim 1 prepares the method for transistor T-shaped nano grid, it is characterized in that, the thickness of the 4th layer of electron beam adhesive ZEP520A described in the step D before preceding baking is 1700 to 4000 dusts, thickness after preceding baking is 1500 to 3500 dusts, and preceding baking condition is to dry by the fire 30 minutes in 180 degree baking ovens.
9, employing once electron beam exposure according to claim 1 prepares the method for transistor T-shaped nano grid, it is characterized in that,
The condition of the version of grid described in step e electron beam exposure is: exposure dose 60 to 150 μ C/cm
2, line is smaller or equal to 50pA.
10, employing once electron beam exposure according to claim 1 prepares the method for transistor T-shaped nano grid, it is characterized in that, the grid of corrosion described in step G groove comprises:
For cap layer/corrosion cutoff layer is the material of GaAs GaAs/ aluminium arsenide AlAs, and adopt phosphoric acid: hydrogen peroxide: water volume ratio is that the solution of 3:1:50 corrodes;
For cap layer/corrosion cutoff layer is the material of indium gallium arsenic InGaAs/ indium phosphide InP, and adopt citric acid: the hydrogen peroxide volume ratio is that the solution of 1:1 corrodes;
The grid metal that evaporates described in the step H upwards is followed successively by titanium Ti/ platinum Pt/ gold Au by the epitaxial wafer surface, and its thickness is respectively
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| CN102569046A (en) * | 2010-12-07 | 2012-07-11 | 中国科学院微电子研究所 | Method for fabricating T-shaped gate on InP substrate |
| CN102569047B (en) * | 2010-12-07 | 2015-05-20 | 中国科学院微电子研究所 | Method for preparing T-shaped gate on InP (indium phosphide) substrate |
| CN102509704B (en) * | 2011-12-26 | 2014-01-08 | 中国科学院微电子研究所 | Method for manufacturing T-shaped gate by adopting single electron beam exposure |
| CN103065953B (en) * | 2012-12-26 | 2015-06-24 | 中国电子科技集团公司第五十五研究所 | Method of preparing fine grid on gallium nitride (GaN) materials by using electroplating technology |
| CN104701154A (en) * | 2015-03-11 | 2015-06-10 | 北京工业大学 | Preparation method for sub-half-micron T-shaped gate via chemical shrinkage method |
| CN112271133A (en) * | 2020-09-25 | 2021-01-26 | 华东光电集成器件研究所 | Metal stripping method based on three layers of glue |
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| JP2001189283A (en) * | 2000-01-05 | 2001-07-10 | Matsushita Electronics Industry Corp | Manufacturing method for semiconductor device |
| CN1464527A (en) * | 2002-06-19 | 2003-12-31 | 中国科学院微电子中心 | Process for making T shape grating |
| CN1675779A (en) * | 2002-08-14 | 2005-09-28 | 富士通株式会社 | Method of manufacturing fine T-shaped electrode |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001189283A (en) * | 2000-01-05 | 2001-07-10 | Matsushita Electronics Industry Corp | Manufacturing method for semiconductor device |
| CN1464527A (en) * | 2002-06-19 | 2003-12-31 | 中国科学院微电子中心 | Process for making T shape grating |
| CN1675779A (en) * | 2002-08-14 | 2005-09-28 | 富士通株式会社 | Method of manufacturing fine T-shaped electrode |
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