CN106952840A - The detection method of defective hole - Google Patents
The detection method of defective hole Download PDFInfo
- Publication number
- CN106952840A CN106952840A CN201710169784.4A CN201710169784A CN106952840A CN 106952840 A CN106952840 A CN 106952840A CN 201710169784 A CN201710169784 A CN 201710169784A CN 106952840 A CN106952840 A CN 106952840A
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- China
- Prior art keywords
- hole
- test structure
- detection method
- wafer
- defective
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Automation & Control Theory (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
The present invention provides a kind of detection method of defective hole, including：Wafer is provided, test structure is formed in the wafer, multistage silicide layer that the test structure includes being sequentially distributed, on the through hole and the adjacent two sections of silicides of connection at each section of silicide layer two ends through hole multistage metal wire；One end of the test structure is connected into ground terminal, other end connection current source；Increase the current value of the current source successively, detect the resistance of the test structure, when resistance increases to predetermined ratio, the current value of record now is the electric current tolerance value of the through hole.In the present invention, the interference of metal wire and silicide layer to test in test structure can be excluded, it is ensured that the reliability of test.In addition, test structure is placed in the Cutting Road of wafer, the space of wafer is made full use of.
Description
Technical field
The present invention relates to semiconductor integrated circuit manufacturing technology field, more particularly to a kind of detection method of defective hole.
Background technology
In integrated circuit fabrication, the purpose of microcircuit connection is realized using through hole or metal wire.Adopt in a manufacturing process
The through hole made of tungsten, because the resistance to electric migration performance of tungsten is good, and the length of through hole is short, it is not easy to occurs electricity and moves
Phenomenon is moved, therefore when tungsten through hole has significant defective workmanship, it is difficult to evaluate its security risk.
The content of the invention
It is an object of the invention to provide the detection method of defective hole, solution is difficult to judge defective hole in the prior art
Technical problem.
In order to solve the above technical problems, the present invention provides a kind of detection method of defective hole, including：
Wafer is provided, test structure is formed in the wafer, the test structure includes the multistage silication being sequentially distributed
The multistage metal wire of through hole on nitride layer, the through hole positioned at each section of silicide layer two ends and the adjacent two sections of silicides of connection；
One end of the test structure is connected into ground terminal, other end connection current source；
Increase the current value of the current source successively, the resistance of the test structure is detected, when resistance increases to predetermined ratio
During example, the current value of record now is the electric current tolerance value of the through hole.
Optionally, the test structure is formed in the Cutting Road of the wafer.
Optionally, also include：The wafer and normal wafer that there will be defective hole are compared, and judgement has defective hole
Wafer reliability.
Optionally, the width of the silicide layer be more than the through hole width, and for the through hole width 3~6
Times.
Optionally, the width of the metal wire is more than the width of the through hole, and is 3~6 times of width of the through hole.
Optionally, the preset ratio is 5%~20%.
Optionally, the metal wire connection ground terminal of described test structure one end, the through hole connection current source of the other end.
Optionally, the test structure includes 2~1000 sections of silicide layers.
Optionally, the material of the through hole is tungsten.
Optionally, the material of the metal wire is metallic copper or metallic aluminium.
Compared with prior art, in the detection method for the defective hole that the present invention is provided, test structure is formed in wafer,
When existing defects in wafer, one end of test structure is connected into ground terminal, other end connection current source gradually increases current source
Current value, detects the resistance of test structure, and certain predetermined Belgium is increased when the resistance of test structure is unexpected, it is determined that now
Current value is the tolerance current value of through hole, and the reliability of through hole is determined according to the tolerance current value.In the present invention, survey can be excluded
Try the interference of metal wire and silicide layer to test in structure, it is ensured that the reliability of test.In addition, test structure is placed in into wafer
Cutting Road in, make full use of the space of wafer.
Brief description of the drawings
Fig. 1 is the flow chart of defective hole detection method in one embodiment of the invention；
Fig. 2 is the top view of test structure in one embodiment of the invention；
Fig. 3 is the profile of test structure in one embodiment of the invention.
Embodiment
The detection method of the defective hole of the present invention is described in more detail below in conjunction with schematic diagram, wherein representing
The preferred embodiments of the present invention, it should be appreciated that those skilled in the art can change invention described herein, and still real
The advantageous effects of the existing present invention.Therefore, description below is appreciated that for the widely known of those skilled in the art, and simultaneously
Not as limitation of the present invention.
For clarity, not describing whole features of practical embodiments.In the following description, it is not described in detail known function
And structure, because they can make the present invention chaotic due to unnecessary details.It will be understood that opening in any practical embodiments
In hair, it is necessary to make a large amount of implementation details to realize the specific objective of developer, such as according to relevant system or relevant business
Limitation, another embodiment is changed into by one embodiment.Additionally, it should think that this development is probably complicated and expended
Time, but it is only to those skilled in the art routine work.
The present invention is more specifically described by way of example referring to the drawings in the following passage.Will according to following explanation and right
Book is sought, advantages and features of the invention will become apparent from.It should be noted that, accompanying drawing is using very simplified form and using non-
Accurately ratio, only for the purpose of facilitating and clarifying the purpose of the embodiments of the invention.
Inventor is by research, and finding the subject matter of current process is：In the forming process of through hole, due to there is particle dirty
Contaminate thing introducing so that the effective dimensions of through hole diminishes, cause when have in through hole electric current by when, the current density of through hole can be carried
, there is the hidden danger of moment partial burnt-out in height, local joule heat rise.But, the structure being connected with through hole also can be close in high current
Degree is lower to occur the phenomenon of partial burnt-out, so needing carefully design test structure, it is ensured that what is be burned out is through hole, rather than connection
Tungsten through-hole structure.
The core concept of the present invention is to design new test structure domain, and through hole office is tested by the test structure
Required current value is burnt in portion, to assess the security risk of through hole.In the detection method of the defective hole of the present invention, in wafer
Middle formation test structure, when existing defects in wafer, ground terminal is connected by one end of test structure, the other end connects current source,
Gradually the current value of increase current source, detects the resistance of test structure, when the resistance of test structure increases certain make a reservation for suddenly
Belgium, it is determined that current value now is the tolerance current value of through hole, the reliability of through hole is determined according to the tolerance current value.This
In invention, the interference of metal wire and silicide layer to test in test structure can be excluded, it is ensured that the reliability of test.In addition,
Test structure is placed in the Cutting Road of wafer, the space of wafer is made full use of.
Detection method below in conjunction with 1~3 pair of defective hole of the invention of accompanying drawing is described in detail, and Fig. 1 lacks for through hole
The flow chart of detection method is fallen into, Fig. 2~Fig. 3 is the schematic diagram of test structure, specifically, the detection method of defective hole is included such as
Lower step：
Step S1 is performed there is provided wafer, test structure 10 is formed in the wafer, it is described referring to figs. 2 and 3 shown
Multistage silicide layer 110 that test structure 10 includes being sequentially distributed, the through hole 120 positioned at each section of two ends of silicide layer 110 and even
Connect the multistage metal wire 130 of through hole 120 on adjacent two sections of silicides 110.In the present embodiment, the test structure include 2~
1000 sections of silicide layers, it may for example comprise 100 sections, 350 sections, 600 sections, 800 sections etc., the material of the through hole 120 is tungsten,
The metal, 130 material is metallic copper or metallic aluminium, and metal silicide layer 110, through hole 120 and metal wire 130 are formed successively
Connected structure, and be electrically connected with successively.
In the present embodiment, the width of the silicide layer 110 is more than the width of the through hole 120, for example, silicide layer
110 width is 3~6 times of the width of the through hole 120.Also, the width of the metal wire 130 is more than the through hole 120
Width, for example, 3~6 times of width for the through hole 120 of the width of the metal wire 130.The width of through hole 120 is less than
The width of metal wire and silicide layer, when in wafer power supply by when, the through hole burnt at first, rather than metal wire and silicide
Layer, so as to exclude the interference of metal wire and silicide layer to test.
Further, the test structure 10 is formed in the Cutting Road of the wafer, so as to make full use of the sky of wafer
Between.
Then, step S2, one end connection ground terminal of the test structure, other end connection current source, for example, described are performed
The metal wire connection ground terminal of test structure one end, the through hole connection current source of the other end.
Step S3 is performed, increases the current value of current source successively, the resistance of the test structure is detected, when the resistance increases
When greatly to predetermined ratio, the current value of record now is the electric current tolerance value of the through hole.In the present embodiment, set described default
Ratio is 5%~20%, for example, 10%.When the resistance of test structure increases 10% suddenly, it is determined that current value now is logical
The tolerance current value in hole
Afterwards, the wafer and normal wafer that there will be defective hole are compared, it is determined that there is the wafer of defective hole
Reliability.In order to avoid when testing the current value needed for tungsten through hole burns, the electric current applied in advance burns connection metal wire
The phenomenon ruined, can be assessed beforehand through the tungsten through hole test structure for designing the different width for connecting metal wires and ensure tungsten through hole
The minimum dimension of connection metal wire needed for burning.When designing final test structure, the size of connection metal wire can not be less than
The minimum dimension drawn is assessed, the risk of reduction connection metal wire partial burnt-out improves the detectivity of tungsten via process problem.
In summary, the present invention is provided in the detection method of defective hole, test structure is formed in wafer, when in wafer
During existing defects, one end of test structure is connected into ground terminal, other end connection current source gradually increases the current value of current source,
The resistance of test structure is detected, when the resistance of test structure increases certain predetermined Belgium suddenly, it is determined that current value now
For the tolerance current value of through hole, the reliability of through hole is determined according to the tolerance current value.In the present invention, test structure can be excluded
The interference of middle metal wire and silicide layer to test, it is ensured that the reliability of test.In addition, test structure to be placed in the cutting of wafer
In road, the space of wafer is made full use of..
Obviously, those skilled in the art can carry out the essence of various changes and modification without departing from the present invention to the present invention
God and scope.So, if these modifications and modification of the present invention belong to the scope of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to comprising including these changes and modification.
Claims (10)
1. a kind of detection method of defective hole, it is characterised in that including：
Wafer is provided, test structure is formed in the wafer, multistage silicide layer that the test structure includes being sequentially distributed,
The multistage metal wire of through hole on the through hole and the adjacent two sections of silicides of connection at each section of silicide layer two ends；
One end of the test structure is connected into ground terminal, other end connection current source；
Increase the current value of the current source successively, detect the resistance of the test structure, when resistance increases to predetermined ratio,
The current value of record now is the electric current tolerance value of the through hole.
2. the detection method of defective hole as claimed in claim 1, it is characterised in that the test structure is formed at the crystalline substance
In round Cutting Road.
3. the detection method of defective hole as claimed in claim 1, it is characterised in that also include：There will be defective hole
Wafer is compared with normal wafer, judges there is the reliability of the wafer of defective hole.
4. the detection method of defective hole as claimed in claim 1, it is characterised in that the width of the silicide layer is more than institute
State the width of through hole, and 3~6 times of the width for the through hole.
5. the detection method of defective hole as claimed in claim 1, it is characterised in that the width of the metal wire is more than described
The width of through hole, and be 3~6 times of width of the through hole.
6. the detection method of defective hole as claimed in claim 1, it is characterised in that the preset ratio is 5%~20%.
7. the detection method of defective hole as claimed in claim 1, it is characterised in that the metal wire of described test structure one end
Connect ground terminal, the through hole connection current source of the other end.
8. the detection method of defective hole as claimed in claim 1, it is characterised in that the test structure includes 2~1000
Section silicide layer.
9. the detection method of defective hole as claimed in claim 1, it is characterised in that the material of the through hole is tungsten.
10. the detection method of defective hole as claimed in claim 1, it is characterised in that the material of the metal wire is metal
Copper or metallic aluminium.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710169784.4A CN106952840A (en) | 2017-03-21 | 2017-03-21 | The detection method of defective hole |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710169784.4A CN106952840A (en) | 2017-03-21 | 2017-03-21 | The detection method of defective hole |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106952840A true CN106952840A (en) | 2017-07-14 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710169784.4A Pending CN106952840A (en) | 2017-03-21 | 2017-03-21 | The detection method of defective hole |
Country Status (1)
| Country | Link |
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| CN (1) | CN106952840A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115881696A (en) * | 2023-01-31 | 2023-03-31 | 广州粤芯半导体技术有限公司 | Test structure and test method for detecting metal bottom internal cutting defects |
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| CN1635619A (en) * | 2003-12-31 | 2005-07-06 | 中芯国际集成电路制造(上海)有限公司 | Method for online test of wafer metal interconnection line reliability |
| JP2008270632A (en) * | 2007-04-24 | 2008-11-06 | Fujitsu Ltd | Testing apparatus and method |
| CN105097778A (en) * | 2014-04-23 | 2015-11-25 | 中芯国际集成电路制造(上海)有限公司 | Through hole array test structure for improving detection capability of current ramp test |
| CN105304614A (en) * | 2014-07-17 | 2016-02-03 | 中芯国际集成电路制造(上海)有限公司 | Test structure and test method |
| CN105336728A (en) * | 2014-07-10 | 2016-02-17 | 中芯国际集成电路制造(上海)有限公司 | Test structure, manufacturing method of the test structure and test method |
| CN104124235B (en) * | 2014-07-30 | 2017-02-01 | 上海华力微电子有限公司 | Testing structure and testing method implemented by same |
-
2017
- 2017-03-21 CN CN201710169784.4A patent/CN106952840A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1635619A (en) * | 2003-12-31 | 2005-07-06 | 中芯国际集成电路制造(上海)有限公司 | Method for online test of wafer metal interconnection line reliability |
| JP2008270632A (en) * | 2007-04-24 | 2008-11-06 | Fujitsu Ltd | Testing apparatus and method |
| CN105097778A (en) * | 2014-04-23 | 2015-11-25 | 中芯国际集成电路制造(上海)有限公司 | Through hole array test structure for improving detection capability of current ramp test |
| CN105336728A (en) * | 2014-07-10 | 2016-02-17 | 中芯国际集成电路制造(上海)有限公司 | Test structure, manufacturing method of the test structure and test method |
| CN105304614A (en) * | 2014-07-17 | 2016-02-03 | 中芯国际集成电路制造(上海)有限公司 | Test structure and test method |
| CN104124235B (en) * | 2014-07-30 | 2017-02-01 | 上海华力微电子有限公司 | Testing structure and testing method implemented by same |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115881696A (en) * | 2023-01-31 | 2023-03-31 | 广州粤芯半导体技术有限公司 | Test structure and test method for detecting metal bottom internal cutting defects |
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Application publication date: 20170714 |
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