CN106936431B - High-performance low-noise chip and manufacturing method thereof - Google Patents
High-performance low-noise chip and manufacturing method thereof Download PDFInfo
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- CN106936431B CN106936431B CN201511024646.4A CN201511024646A CN106936431B CN 106936431 B CN106936431 B CN 106936431B CN 201511024646 A CN201511024646 A CN 201511024646A CN 106936431 B CN106936431 B CN 106936431B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/08—Continuously compensating for, or preventing, undesired influence of physical parameters of noise
- H03M1/0845—Continuously compensating for, or preventing, undesired influence of physical parameters of noise of power supply variations, e.g. ripple
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Abstract
The invention discloses a high-performance low-noise chip, which comprises a reference voltage module, an analog-to-digital converter and a signal processing module connected with the analog-to-digital converter, wherein the reference voltage module comprises: the first lead welding point is connected with a reference voltage output end of the reference voltage module; the first pin is connected with the first lead welding point through a lead; the second lead welding point is connected with the first pin through a lead wire and is connected with the positive phase input end of the analog-to-digital converter; the third lead welding point is connected with the grounding end of the reference voltage module, the grounding end of the analog-to-digital converter and the grounding end of the signal processing module; the second pin is connected with the third lead welding point through a lead; and the fourth lead welding point is connected with the second pin through a lead wire and is connected with the reverse input end of the analog-to-digital converter. The invention also provides a preparation method of the high-performance low-noise chip.
Description
Technical Field
The invention relates to a high-performance low-noise chip and a manufacturing method thereof, in particular to a packaging method of the high-performance low-noise chip.
Background
Now, as integrated circuits develop, many modules are integrated together, but the cores of the modules are basically analog-to-digital converters, and therefore, the performance requirements of the analog-to-digital converters are higher and higher. At present, in a chip system, as the performance requirement of the analog-digital converter becomes higher, it is also important that the reference voltage of the analog-digital converter includes a ground signal required by the analog-digital converter as a feedback to meet the performance requirement. At present, the design of the two points is not considered much, the reference voltage is provided with an internal reference voltage module to generate and directly supply the reference voltage to the analog-digital converter module, and the ground of the feedback signal is directly connected by using the internal ground. Fig. 1 shows a connection method of a digital-to-analog converter in a conventional chip, in which a memory voltage output terminal VREF of a reference voltage module 1 in the chip is directly connected to a forward reference voltage input terminal VREFP of the analog-to-digital converter, and a ground terminal of the analog-to-digital converter, a reverse reference voltage input terminal VREFN, a ground terminal of the reference voltage module, and other ground terminals are connected to a pin grounded. The connection method is that the system feedback signal of the analog-digital converter and the ground inside the system are mixed into a whole, so that the overall performance of the analog-digital converter is low, and the noise is high.
Disclosure of Invention
In order to solve the above problems, the present invention provides a high performance low noise chip, which has a reference voltage module, an analog-to-digital converter, and a signal processing module connected to the analog-to-digital converter, and further includes:
the first lead welding point is connected with a reference voltage output end of the reference voltage module;
the first pin is connected with the first lead welding point through a lead;
the second lead welding point is connected with the first pin through a lead wire, and the second welding point is connected with a positive phase input end of the analog-to-digital converter;
the third welding spot is connected with the grounding end of the reference voltage module, the grounding end of the analog-to-digital converter and the grounding end of the signal processing module;
the second pin is connected with the third lead welding point through a lead;
and the fourth lead welding point is connected with the second pin through a lead wire, and is connected with the reverse input end of the analog-to-digital converter.
In addition, the invention also provides a manufacturing method of the high-performance low-noise chip, which is used for manufacturing the high-performance low-noise chip and comprises the following steps:
connecting a reference voltage output end of the analog-to-digital converter with the first welding point; connecting the first lead welding point with the second lead welding point through the lead; connecting the first pin with the second lead welding point through the lead; connecting the second lead welding point with a positive phase input end of the analog-to-digital converter; connecting the grounding ends of the analog-to-digital converter, the reference voltage module and the signal processing module with the third lead welding point; connecting the second pin with the third lead welding point; connecting the fourth lead welding point with the second pin through a lead wire; connecting the fourth lead welding point with the reverse input end of the analog-to-digital converter; and packaging the chip.
According to the high-performance low-noise chip and the manufacturing method thereof, the reference voltage generated by the chip per se is filtered by the packaging lead and the external capacitor, so that the burr signal of the reference voltage is reduced to one tenth of the original burr signal, and the performance is improved; the analog-digital converter needs another reference voltage with zero voltage to directly utilize the external ground, and compared with the ground in the chip, the burr is also reduced to one tenth of the ground in the chip, thereby improving the chip performance.
Drawings
FIG. 1 is a schematic diagram of a conventional chip;
fig. 2 is a schematic structural diagram of a high performance low noise chip according to the present invention.
Detailed Description
The structure, operation, and the like of the present invention will be further described with reference to the accompanying drawings.
As shown in fig. 2, the high performance low noise chip of the present invention. The chip is internally composed of a reference voltage module and a signal processing module connected with an analog-to-digital converter, and the analog-to-digital converter transmits signals to the signal processing module for corresponding signal processing. The first lead welding point 1 is connected with a reference voltage output end of the reference voltage module, and the first pin 3 is connected with the first lead welding point 1 through a lead wire, so that the reference voltage output by the reference voltage module is led to the first pin 3.
The second lead pad 2 is connected with the first pin 3 through a lead wire and is connected with a positive phase input end of the analog-to-digital converter, so that the reference voltage is led back to the analog-to-digital converter from the first pin 3. The third welding point 6 is connected with the grounding end of the reference voltage module, the grounding end of the analog-to-digital converter and the grounding end of the signal processing module, the second pin 5 is connected with the third welding point 6 through a lead, the fourth welding point 4 is connected with the second pin 5, and the reverse phase input end of the analog-to-digital converter is connected with the fourth welding point 4. Therefore, another reference voltage ground (an inverted input end) with zero voltage required by the analog-to-digital converter is directly utilized by an external ground, and compared with the ground in the chip, burrs are reduced to one tenth of the ground in the chip, so that the chip performance is improved.
In addition, the invention also provides a manufacturing method of the high-performance low-noise chip, which comprises the following steps:
connecting a reference voltage output end of the analog-to-digital converter with a first lead welding point 1; connecting a first lead welding point 1 with a first pin 3 through a lead; connecting the first pin 3 with the second lead welding point 2 through a lead; connecting the second lead welding point 2 with a positive phase input end of the analog-to-digital converter; connecting the grounding ends of the analog-to-digital converter, the reference voltage module and the signal processing module with a third lead welding point 6; connecting a second pin 5 with a third lead welding point 6; connecting the fourth lead welding point 4 with a second pin 5 through a lead wire; connecting the fourth lead welding point 4 with the reverse input end of the analog-to-digital converter; the chip is then packaged.
The high-performance low-noise chip and the manufacturing method thereof reduce the burr signal of the reference voltage to one tenth of the original value by filtering the reference voltage generated by the chip through the packaging lead and the external capacitor, thereby improving the performance.
The foregoing is merely illustrative of the present invention, and it will be appreciated by those skilled in the art that various modifications may be made without departing from the principles of the invention, and the scope of the invention is to be determined accordingly.
Claims (2)
1. A high-performance low-noise chip having a reference voltage module, an analog-to-digital converter, and a signal processing module connected to the analog-to-digital converter, comprising:
the first lead welding point is connected with a reference voltage output end of the reference voltage module;
the first pin is connected with the first lead welding point through a lead;
the second lead welding point is connected with the first pin through a lead wire and is connected with a positive phase input end of the analog-to-digital converter;
the third lead welding point is connected with the grounding end of the reference voltage module, the grounding end of the analog-to-digital converter and the grounding end of the signal processing module;
the second pin is connected with the third lead welding point through a lead;
and the fourth lead welding point is connected with the second pin through a lead wire, and is connected with the reverse input end of the analog-to-digital converter.
2. A method for manufacturing a high-performance low-noise chip according to claim 1, comprising the steps of:
connecting a reference voltage output end of the analog-to-digital converter with the first lead welding point; connecting the first lead welding point with the second lead welding point through the lead; connecting the first pin with the second lead welding point through the lead; connecting the second lead welding point with a positive phase input end of the analog-to-digital converter; connecting the grounding end of the analog-to-digital converter, the grounding end of the reference voltage module and the grounding end of the signal processing module with the third lead welding point; connecting the second pin with the third lead welding point; connecting the fourth lead welding point with the second pin through a lead wire; connecting the fourth lead welding point with the reverse input end of the analog-to-digital converter; and packaging the chip.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201511024646.4A CN106936431B (en) | 2015-12-30 | 2015-12-30 | High-performance low-noise chip and manufacturing method thereof |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201511024646.4A CN106936431B (en) | 2015-12-30 | 2015-12-30 | High-performance low-noise chip and manufacturing method thereof |
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| CN106936431A CN106936431A (en) | 2017-07-07 |
| CN106936431B true CN106936431B (en) | 2021-07-20 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1187208A2 (en) * | 2000-08-30 | 2002-03-13 | Hitachi, Ltd. | Semiconductor device |
| CN201681123U (en) * | 2010-05-20 | 2010-12-22 | 威胜集团有限公司 | High-accuracy electric energy metering module |
| CN202195813U (en) * | 2011-09-08 | 2012-04-18 | 杭州电子科技大学 | Underwater multichannel data acquisition circuit |
| CN103985688A (en) * | 2013-02-07 | 2014-08-13 | 扬智科技股份有限公司 | Chip packaging structure |
-
2015
- 2015-12-30 CN CN201511024646.4A patent/CN106936431B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1187208A2 (en) * | 2000-08-30 | 2002-03-13 | Hitachi, Ltd. | Semiconductor device |
| CN201681123U (en) * | 2010-05-20 | 2010-12-22 | 威胜集团有限公司 | High-accuracy electric energy metering module |
| CN202195813U (en) * | 2011-09-08 | 2012-04-18 | 杭州电子科技大学 | Underwater multichannel data acquisition circuit |
| CN103985688A (en) * | 2013-02-07 | 2014-08-13 | 扬智科技股份有限公司 | Chip packaging structure |
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| CN106936431A (en) | 2017-07-07 |
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