CN211151944U - Single-chip isolated interface circuit - Google Patents
Single-chip isolated interface circuit Download PDFInfo
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- CN211151944U CN211151944U CN201922493485.3U CN201922493485U CN211151944U CN 211151944 U CN211151944 U CN 211151944U CN 201922493485 U CN201922493485 U CN 201922493485U CN 211151944 U CN211151944 U CN 211151944U
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- interface circuit
- digital isolator
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Abstract
The utility model relates to a single-chip isolated interface circuit, this single-chip isolated interface circuit include signal input processing interface circuit die and digital isolator circuit die, wherein, the input of signal input processing interface circuit die is connected with signal input end, the output of signal input processing interface circuit die with the input of digital isolator circuit die is connected, the output of digital isolator circuit die is connected with signal output end; the signal input processing interface circuit die and the digital isolator circuit die are packaged in the same package. The utility model discloses with signal input processing interface circuit and digital isolator circuit encapsulation in same tube, solved peripheral isolated circuit and brought the problem of system application scheme area, cost increase to the integrated level and the application convenience of system have effectively been promoted.
Description
Technical Field
The utility model belongs to the technical field of aviation, navigation and industrial control's electronic circuit design, concretely relates to single-chip isolated form interface circuit.
Background
The interface circuit is widely applied to the fields of aviation, navigation, industrial control and the like, the high-reliability system application needs to be isolated between the signal processing interface circuit and a host, the reliability of various signal transmission is guaranteed, the mutual interference between systems or subsystems is eliminated, the traditional signal processing interface circuit cannot realize system isolation, and an isolation circuit needs to be added on the periphery to realize the isolation between the signal processing interface circuit and the host.
However, this method of adding an isolation circuit to the periphery of the chip results in an increase in the area and cost of the system application scheme.
SUMMERY OF THE UTILITY MODEL
In order to solve the deficiency among the prior art, the utility model provides a single-chip isolated form interface circuit, this circuit includes:
the signal is input to a processing interface circuit die and a digital isolator circuit die, wherein,
the input end of the signal input processing interface circuit tube core is connected with the signal input end, the output end of the signal input processing interface circuit tube core is connected with the input end of the digital isolator circuit tube core, and the output end of the digital isolator circuit tube core is connected with the signal output end;
the signal input processing interface circuit die and the digital isolator circuit die are packaged in the same package.
In an embodiment of the present invention, the signal input processing interface circuit die and the digital isolator circuit die are packaged in the same package by using an SIP packaging technique.
In one embodiment of the present invention, the digital isolator circuit die comprises a first digital isolator circuit die and a second digital isolator circuit die, wherein,
the input end of the first digital isolator circuit tube core is connected with the output end of the signal input processing interface circuit tube core, the output end of the first digital isolator circuit tube core is connected with the input end of the second digital isolator circuit tube core, and the output end of the second digital isolator circuit tube core is connected with the signal output end.
In an embodiment of the present invention, the first substrate is mounted inside the tube, and the signal input processing interface circuit die and the first digital isolator circuit die are mounted on the first substrate.
In one embodiment of the present invention, the package further comprises a second substrate, the second substrate is mounted in the package, and the second digital isolator circuit die is mounted on the second substrate.
In one embodiment of the present invention, the distance between the signal input processing interface circuit die and the first digital isolator circuit die is 300 to 800 μm.
In an embodiment of the present invention, the distance between the first substrate and the second substrate is greater than 0.5 mm.
Compared with the prior art, the beneficial effects of the utility model are that:
the utility model discloses with signal input processing interface circuit and digital isolator circuit encapsulation in same tube, solved peripheral isolated circuit and brought the problem of system application scheme area, cost increase to the integrated level and the application convenience of system have effectively been promoted.
Drawings
Fig. 1 is a schematic structural diagram of a single-chip isolated interface circuit according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of another single-chip isolated interface circuit according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to specific examples, but the present invention is not limited thereto.
In order to make the above objects, features and advantages of the present invention more comprehensible, embodiments of the present invention are described in detail below with reference to the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. The present invention can be embodied in many different forms other than those specifically described herein, and it will be apparent to those skilled in the art that similar modifications can be made without departing from the spirit and scope of the invention, and it is therefore not to be limited to the specific embodiments disclosed below.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
Example one
Referring to fig. 1 and fig. 2, fig. 1 is a schematic structural diagram of a single-chip isolated interface circuit according to an embodiment of the present invention, and fig. 2 is a schematic structural diagram of another single-chip isolated interface circuit according to an embodiment of the present invention. The present embodiment provides a single-chip isolated interface circuit, including:
the signal is input to a processing interface circuit die and a digital isolator circuit die, wherein,
the input end of the signal input processing interface circuit tube core is connected with the signal input end, the output end of the signal input processing interface circuit tube core is connected with the input end of the digital isolator circuit tube core, and the output end of the digital isolator circuit tube core is connected with the signal output end;
the signal input processing interface circuit die and the digital isolator circuit die are packaged in the same package.
Specifically, the conventional signal processing interface circuit cannot achieve system isolation, and an isolation circuit needs to be added to the periphery of the conventional signal processing interface circuit to achieve isolation between the signal processing interface circuit and the host, but the method of adding the isolation circuit to the periphery increases the application area and cost of the device system. Based on the above existing problems, the present embodiment provides a single-chip isolated interface circuit, which is implemented in a mixed package manner of a die, specifically:
the signal processing interface circuit die is used for converting an input signal of an external signal input end IN [ n:0] into a system requirement digital signal. The input end of the signal input processing interface circuit die of the embodiment is connected with the signal input end IN [ n:0], and the output end of the signal input processing interface circuit die is connected with the digital isolator circuit die.
It should be noted that, in an actual circuit design, the signal processing interface circuit die may select an appropriate die according to actual needs, so that the obtained signal processing interface circuit die may meet the requirements of the system on the signal processing type and the type of outputting digital signals.
The digital isolator circuit die is used for system isolation between the signal processing interface circuit die and the host connection port. The input end of the digital isolator circuit tube core of the embodiment is connected with the output end of the signal input processing interface circuit tube core, the output end of the digital isolator circuit tube core is connected with the signal output end OUT [ n:0], and the signal output end OUT [ n:0] is connected with the host connection port.
It should be noted that in an actual circuit design, a suitable die may be selected for the digital isolator circuit die according to actual needs, so that the obtained digital isolator circuit die can meet requirements of a system on isolation capability and signal transmission rate.
Meanwhile, in the present embodiment, the signal input processing interface circuit die and the digital isolator circuit die are packaged in the same package, specifically, the signal input processing interface circuit die and the digital isolator circuit die are packaged in the same package by using the SIP packaging technology, and the special signal input processing interface circuit die and the digital isolator circuit die are tiled side by side and integrated in the same package by using the SIP packaging technology.
In the embodiment, the system isolation between the signal processing interface circuit die and the host connection port is realized by using the function of the digital isolator circuit die, and meanwhile, an external input signal is converted into a system-required digital signal through the signal processing interface circuit die in a highly reliable manner.
In the embodiment, the SIP packaging technology is adopted for carrying out tube core hybrid packaging, and the signal input processing interface circuit tube core and the digital isolator circuit tube core are packaged in the same tube shell, so that the design of external devices is reduced, the packaging volume is greatly reduced, and the packaging area is saved; in the circuit obtained by packaging by adopting the SIP packaging technology, because the two independent packaging tube core devices of the signal input processing interface circuit tube core and the digital isolator circuit tube core are combined together, the total welding spots can be greatly reduced, and the connecting route of elements can be shortened, thereby improving the circuit performance.
Further, the digital isolator circuit die of the present embodiment includes a first digital isolator circuit die and a second digital isolator circuit die, wherein,
the input end of the first digital isolator circuit tube core is connected with the output end of the signal input processing interface circuit tube core, the output end of the first digital isolator circuit tube core is connected with the input end of the second digital isolator circuit tube core, and the output end of the second digital isolator circuit tube core is connected with the output end of the signal.
Specifically, in this embodiment, the first digital isolator circuit die is a digital isolator transmitting circuit die, the second digital isolator circuit die is a digital isolator receiving circuit die, and the digital isolator transmitting circuit die and the digital isolator receiving circuit die are independent dies, so as to improve physical electrical isolation. The input end of the first digital isolator circuit tube core is connected with the output end of the signal input processing interface circuit tube core, the output end of the first digital isolator circuit tube core is connected with the input end of the second digital isolator circuit tube, and the output end of the second digital isolator circuit tube is connected with the signal output end OUT.
Further, the single-chip isolated interface circuit of this embodiment further includes a first substrate, where the first substrate is installed in the package, the signal input processing interface circuit die and the first digital isolator circuit die are installed on the first substrate, and specifically, the signal input processing interface circuit die and the first digital isolator circuit die are attached to the first substrate by a conductive adhesive.
Preferably, the distance between the signal input processing interface circuit die and the first digital isolator circuit die is 300-800 μm, and the distance between the special signal input processing interface circuit die and the first digital isolator circuit die is 500 μm.
Specifically, since the layout on the circuit substrate among the integrated circuits is in millimeter level and is independently installed, which may cause the problem of too large area and increased cost among substrate levels, in this embodiment, the signal input processing interface circuit die and the first digital isolator circuit die are selectively installed on the same first substrate, so that the problem of too large integrated packaging area and increased cost among substrate levels caused by respectively installing the signal input processing interface circuit die and the first digital isolator circuit die on different substrates is avoided, and meanwhile, the isolation between the signal input processing interface circuit die and the host connection port is not affected.
Further, the single-chip isolated interface circuit of this embodiment further includes a second substrate, the second substrate is mounted in the package, and the second digital isolator circuit die is mounted on the second substrate.
Specifically, the second substrate of the present embodiment is mounted in the package, and the second digital isolator circuit die is mounted on the second substrate, specifically, the second digital isolator circuit die is attached to the second substrate by a conductive adhesive. The second digital isolator circuit die and the first digital isolator circuit die are mounted on different substrates, which can achieve better physical electrical isolation.
Further, the distance between the first substrate and the second substrate of the present embodiment is greater than 0.5 mm.
Specifically, in the integrated circuit, the layout of the substrate may affect the integration level of the entire integrated circuit, and this embodiment needs the distance between the first substrate and the second substrate to be greater than 0.5mm based on the isolation withstand voltage requirement of 1500V, and the specific size of the distance between the first substrate and the second substrate may be adjusted according to the isolation withstand voltage requirement.
Further, in this embodiment, after the connection is completed by using the bonding wire, the first substrate and the second substrate are packaged in the same package by using the SIP packaging technology, so as to implement the design of the single-chip isolated interface circuit in this embodiment.
To sum up, in the present embodiment, the signal input processing interface circuit die and the digital isolator circuit die are packaged in the same package, so that the design of external devices is reduced, the packaging volume is greatly reduced, the packaging area is saved, specifically, the cost is reduced by more than 30%, the area is reduced by more than 50%, and therefore, the integration level and the reliability of the system are effectively improved.
The foregoing is a more detailed description of the present invention, taken in conjunction with the specific preferred embodiments thereof, and it is not intended that the invention be limited to the specific embodiments shown and described. To the utility model belongs to the technical field of ordinary technical personnel, do not deviate from the utility model discloses under the prerequisite of design, can also make a plurality of simple deductions or replacement, all should regard as belonging to the utility model discloses a protection scope.
Claims (7)
1. A single chip isolated interface circuit, which is characterized in that the circuit comprises a signal input processing interface circuit die and a digital isolator circuit die, wherein,
the input end of the signal input processing interface circuit tube core is connected with the signal input end, the output end of the signal input processing interface circuit tube core is connected with the input end of the digital isolator circuit tube core, and the output end of the digital isolator circuit tube core is connected with the signal output end;
the signal input processing interface circuit die and the digital isolator circuit die are packaged in the same package.
2. The single-chip isolated interface circuit of claim 1, wherein the signal input processing interface circuit die and the digital isolator circuit die are packaged in the same package using SIP packaging technology.
3. The single chip isolated interface circuit of claim 1, wherein the digital isolator circuit die comprises a first digital isolator circuit die and a second digital isolator circuit die, wherein,
the input end of the first digital isolator circuit tube core is connected with the output end of the signal input processing interface circuit tube core, the output end of the first digital isolator circuit tube core is connected with the input end of the second digital isolator circuit tube core, and the output end of the second digital isolator circuit tube core is connected with the output end of the signal.
4. The single chip isolated interface circuit of claim 3, further comprising a first substrate, the first substrate mounted within the package, the signal input processing interface circuit die and the first digital isolator circuit die mounted on the first substrate.
5. The single chip isolated interface circuit of claim 4, further comprising a second substrate, the second substrate mounted within the package, the second digital isolator circuit die mounted on the second substrate.
6. The single-chip isolated interface circuit of claim 4, wherein a distance between the signal input processing interface circuit die and the first digital isolator circuit die is 300-800 μm.
7. The single chip isolated interface circuit of claim 5, wherein the distance between the first substrate and the second substrate is greater than 0.5 mm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922493485.3U CN211151944U (en) | 2019-12-31 | 2019-12-31 | Single-chip isolated interface circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922493485.3U CN211151944U (en) | 2019-12-31 | 2019-12-31 | Single-chip isolated interface circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN211151944U true CN211151944U (en) | 2020-07-31 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201922493485.3U Active CN211151944U (en) | 2019-12-31 | 2019-12-31 | Single-chip isolated interface circuit |
Country Status (1)
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|---|---|
| CN (1) | CN211151944U (en) |
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2019
- 2019-12-31 CN CN201922493485.3U patent/CN211151944U/en active Active
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