CN106935639B - 光触发可控硅器件 - Google Patents

光触发可控硅器件 Download PDF

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CN106935639B
CN106935639B CN201511023831.1A CN201511023831A CN106935639B CN 106935639 B CN106935639 B CN 106935639B CN 201511023831 A CN201511023831 A CN 201511023831A CN 106935639 B CN106935639 B CN 106935639B
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CN106935639A (zh
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陈继辉
程学农
荆丹
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CRM ICBG Wuxi Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/74Thyristor-type devices, e.g. having four-zone regenerative action
    • H01L29/747Bidirectional devices, e.g. triacs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions

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  • Microelectronics & Electronic Packaging (AREA)
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Abstract

本发明涉及一种光触发可控硅器件,其中包括N型衬底,N型衬底上设置有第一P型基区、第二P型基区、第三P型基区以及P‑型注入区;第二P型基区以及第三P型基区设置于P‑型注入区的两侧,且P‑型注入区分别与第二P型基区以及第三P型基区相连接;第一P型基区设置于第二P型基区的与P‑型注入区相对的一侧;第三P型基区上设置有第一N+注入区,且第一N+注入区位于第三P型基区内且靠近P‑型注入区的一侧;第一N+注入区与第二P型基区相连接;N型衬底的四周设置有第二N+型注入区。采用该种结构的光触发可控硅器件,触发电流小,结构简单,占用版图面积小,隔离电压高,应用范围广泛。

Description

光触发可控硅器件
技术领域
本发明涉及半导体领域,尤其涉及集成电路,具体是指一种光触发可控硅器件。
背景技术
在日常应用中,通常需要用低压的逻辑电平来控制高压的功率输出,它们之间需要良好地隔离。
由于光耦合器输入输出间互相隔离,电信号传输具有单向性等特点,因而具有良好的电绝缘能力和抗干扰能力。
光耦合器一般由三部分组成:光的发射、光的接收及信号放大。输入的电信号驱动发光二极管(LED),使之发出一定波长的光,被光探测器接收而产生光电流,再经过进一步放大后输出。这就完成了电—光—电的转换,从而起到输入、输出、隔离的作用。
图1中所示电路为光耦合器构成的可控硅开关电路。可控硅SCR的触发电压取自电阻R,其大小由通过光电三极管的电流决定,直接由输入电压控制。该电路简单,控制端与输出端有可靠的电隔离,它可以实现较大电流的功率输出。
现有技术采用纵向的方式实现,这种方式往往工艺比较复杂,成本较高。同时,由于没有电阻R,使得触发电流较大,抗干扰能力差。
发明内容
本发明的目的是克服了上述现有技术的缺点,提供了一种利用NPN管基区感光触发、触发电流小、导通电阻小、结构简单、占用版图面积小、隔离电压高的光触发可控硅器件。
为了实现上述目的,本发明的光触发可控硅器件具有如下构成:
该光触发可控硅器件,其主要特点是,所述的器件包括N型衬底,所述的N型衬底上设置有第一P型基区a、第二P型基区b、第三P型基区c以及P-型注入区;所述的第二P型基区b以及所述的第三P型基区c设置于所述的P-型注入区的两侧,且所述的P-型注入区分别与所述的第二P型基区b以及所述的第三P型基区c相连接;所述的第一P型基区a设置于所述的第二P型基区b的与所述的P-型注入区相对的一侧;
所述的第三P型基区c上设置有第一N+注入区N+a,且所述的第一N+注入区N+a位于所述的第三P型基区c内且靠近所述的P-型注入区的一侧;所述的第一N+注入区N+a与所述的第二P型基区b相连接;
所述的N型衬底的四周设置有第二N+型注入区N+b。
进一步地,所述的第一P型基区a与电学阳极相连接,所述的第二P型基区b与电学阴极相连接,所述的第三P型基区c为用以接受光照后产生光电流的感光区。
进一步地,所述的第一N+注入区N+a与所述的第二P型基区b通过铝层相连接。
采用了该发明中的光触发可控硅器件,与现有技术相比,具有以下有益的技术效果:
(1)本发明中的光触发可控硅器件触发电流小,结构简单,占用版图面积小,隔离电压高的优点。
(2)本发明为了实现高的隔离电压及降低封装难度,感光芯片与发光LED封装在一个平面上,且感光区位于芯片边缘,光敏度高。
附图说明
图1为现有技术中的光敏可控硅剖面图。
图2为本发明的光触发可控硅器件的剖面图。
图3为图2所示的光敏可控硅器件的俯视图。
图4为图2所示的光敏可控硅器件的等效电路图。
具体实施方式
为了能够更清楚地描述本发明的技术内容,下面结合具体实施例来进行进一步的描述。
本发明的光触发可控硅器件将P型扩散层设置在N型衬底上,将一块N型扩散层设计置在其中一块P型扩散层中。当红外光照射到P型扩散层时,将可控硅触发导通。本发明可控硅利用NPN管基区感光触发,触发电流小,导通电阻小,结构简单,占用版图面积小,隔离电压高。
如图2和图3所示,该可控硅结构包含4层结构,其中底层为N-型衬底。第二层为设于N-衬底上的基区a、基区b及基区c。第三层为设于N-衬底上的P-区(电阻R),如图4所示,P-区设于基区b与基区c之间,并且与基区b与基区c相连接。第四层为N+层,其中N+a层设于基区c中并且布置于靠近电阻R的一侧,N+b层设于衬底N-层上。N+b层设于整个芯片的外围。
N+a与基区b通过铝线相连。
在该中结构中,基区a通过接触孔与铝层相连,并且被大面积的铝层所覆盖。N+a与基区b通过铝线相连,并且被大面积的铝层所覆盖,同时,这层铝也将基区c的四周覆盖。基区c中心没有被铝覆盖,它将作为感光区。
该结构中,基区a相当于整个结构的阳极。N+a与基区b通过铝线相连,相当于整个结构的阴极。
该结构中,如图3和图4所示,基区a相当于PNP1管及PNP2管的发射极;基区b相当于PNP2管的集电极;衬底相当于PNP1管及PNP2管的基极,同时也是NPN管的集电极;基区c相当于NPN管的基极,同时也是PNP2管的集电极;N+a相当于NPN管的发射极;P-区相当于电阻R,它的两端与NPN管的基极及PNP1管的集电极相连。
当感光区被红外光照射,将生成光生载流子。光生载流子流经电阻,使得NPN管的基极电位升高,引发NPN管导通,从而使可控硅导通。
应用时,阳极加高电平,阴极加低电平,感光区没有接受红外光照射时,该结构关闭,阳极和阴极之间没有电流通过。当感光区接受红外光的照射时,电流从阳极流向阴极。
采用了该发明中的光触发可控硅器件,与现有技术相比,具有以下有益的技术效果:
(1)本发明中的光触发可控硅器件触发电流小,结构简单,占用版图面积小,隔离电压高的优点。
(2)本发明为了实现高的隔离电压及降低封装难度,感光芯片与发光LED封装在一个平面上,且感光区位于芯片边缘,光敏度高。
在此说明书中,本发明已参照其特定的实施例作了描述。但是,很显然仍可以作出各种修改和变换而不背离本发明的精神和范围。因此,说明书和附图应被认为是说明性的而非限制性的。

Claims (3)

1.一种光触发可控硅器件,其特征在于,所述的器件包括N型衬底,所述的N型衬底上设置有第一P型基区、第二P型基区、第三P型基区以及P-型注入区;所述的第二P型基区以及所述的第三P型基区设置于所述的P-型注入区的两侧,且所述的P-型注入区分别与所述的第二P型基区以及所述的第三P型基区相连接;所述的第一P型基区设置于所述的第二P型基区的与所述的P-型注入区相对的一侧;
所述的第三P型基区上设置有第一N+注入区,且所述的第一N+注入区位于所述的第三P型基区内且靠近所述的P-型注入区的一侧;所述的第一N+注入区与所述的第二P型基区相连接;
所述的N型衬底的四周设置有第二N+型注入区。
2.根据权利要求1所述的光触发可控硅器件,其特征在于,所述的第一P型基区与电学阳极相连接,所述的第二P型基区与电学阴极相连接,所述的第三P型基区为用以接受光照后产生光电流的感光区。
3.根据权利要求1所述的光触发可控硅器件,其特征在于,所述的第一N+注入区与所述的第二P型基区通过铝层相连接。
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5345094A (en) * 1992-07-06 1994-09-06 Kabushiki Kaisha Toshiba Light triggered triac device and method of driving the same
CN1508881A (zh) * 2002-12-10 2004-06-30 夏普株式会社 双向光控晶闸管芯片、光触发耦合器及固态继电器

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JPH09223791A (ja) * 1996-02-15 1997-08-26 Toshiba Corp 半導体装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5345094A (en) * 1992-07-06 1994-09-06 Kabushiki Kaisha Toshiba Light triggered triac device and method of driving the same
CN1508881A (zh) * 2002-12-10 2004-06-30 夏普株式会社 双向光控晶闸管芯片、光触发耦合器及固态继电器

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