CN106876457B - Groove gate enhanced MIS structure AlGaN/GaN heterojunction field effect transistor - Google Patents

Groove gate enhanced MIS structure AlGaN/GaN heterojunction field effect transistor Download PDF

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CN106876457B
CN106876457B CN201710020055.2A CN201710020055A CN106876457B CN 106876457 B CN106876457 B CN 106876457B CN 201710020055 A CN201710020055 A CN 201710020055A CN 106876457 B CN106876457 B CN 106876457B
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algan
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effect transistor
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CN106876457A (en
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段宝兴
谢慎隆
郭海君
袁嵩
杨银堂
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Xidian University
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • H01L29/7787Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration

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  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
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  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
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Abstract

The invention discloses a novel groove gate enhanced MIS structure AlGaN/GaN heterojunction field effect transistor with a partial intrinsic GaN cap layer. The novel transistor structure is characterized in that an intrinsic GaN cap layer is introduced at the edge of a transistor grid electrode, the intrinsic GaN cap layer can reduce the two-dimensional electron gas concentration of a conducting channel in the region, and the electric field modulation effect is achieved. The novel electric field peak is generated, the high electric field at the edge of the gate is reduced, the electric field distribution on the surface of the transistor is more uniform, and compared with the traditional groove gate enhanced MIS structure, the breakdown voltage and the reliability of the novel structure are also obviously improved.

Description

Groove gate enhanced MIS structure AlGaN/GaN heterojunction field effect transistor
Technical Field
The invention relates to the technical field of semiconductor devices, in particular to a groove gate enhanced MIS structure AlGaN/GaN heterojunction field effect transistor.
Background
Due to the limitations of the first and second generation semiconductor materials represented by Si and GaAs, the third generation wide bandgap semiconductor materials have been rapidly developed because of their excellent properties. GaN material is one of the cores of the third generation semiconductor materials, and GaAs and SiC are distinguished by their polarization effects compared to Si. By utilizing the particularity, AlGaN/GaN high electron mobility transistors have been developed, and AlGaN/GaN HEMTs are GaN-based microelectronic devices fabricated on the basis of AlGaN/GaN heterojunction materials. The AlGaN/GaN heterojunction forms a high-density two-dimensional electron gas (2 DEG) at a heterojunction interface through spontaneous polarization and piezoelectric polarization effects, and the two-dimensional electron gas has high mobility, so that the AlGaN/GaN HEMTs have low on-resistance. AlGaN/GaN HEMTs have superior characteristics of high transconductance, high saturation current, and high cutoff frequency, compared to conventional Field Effect Transistor (FET) devices. Moreover, experiments prove that the GaN-based HEMTs still maintain good direct current characteristics at the high temperature of 1000K, thereby providing reliable guarantee for the application in high-temperature environments.
Due to the advantage of the unique thickness of the AlGaN/GaN heterojunction, the growth of AlGaN/GaN heterojunction materials and the development of AlGaN/GaN HEMTs always occupy the main position of the research of GaN electronic devices. However, most of the research on GaN-based electronic devices for over a decade has focused on depletion-mode AlGaN/GaN HEMTs, which is very important for the research on high-performance enhancement-mode AlGaN/GaN HEMTs because the fabrication of GaN-based enhancement-mode devices becomes very difficult due to the presence of strong polarization charges in the AlGaN/GaN heterojunction.
For the GaN-based enhancement type device, the trench gate MIS structure is easier to realize in the process. Tohru Oka et al have produced enhancement devices with threshold voltages up to 5.2V using trench gate technology. The device structure comprises from bottom to top: si substrate, 800nm thick Al0.05Ga0.95N buffer layer, 40nm thick GaN channel layer, 1nm AlN insertion layer, 34nm thick Al0.25Ga0.75An N barrier layer and a GaN cap layer with the thickness of 1 nm. According to the technology, the barrier layer under the gate is etched to a certain depth, so that the barrier layer under the gate becomes thin and even disappears, the 2DEG concentration under the gate is reduced to be even zero, the carrier concentration of a source region and a drain region is kept unchanged, and meanwhile, an SiN insulating layer with the thickness of 20nm is deposited between the gate electrode and the AlGaN barrier layer to form an MIS structure. Thus, the enhancement characteristic of the device can be realized, and a certain current density can be ensured. See in particular the literature:
Tohru Oka,Tomohiro Nozawa,“AlGaN/GaN Recessed MIS-Gate HFET WithHigh-Threshold-Voltage Normally-Off Operation for Power ElectronicsApplications”,Electron Device Letters,Vol.29,No.7,July 2008.
however, there is a tendency for high peak electric fields at the gate edges of trench-gate enhanced MIS structures AlGaN/GaN HEMTs, which adversely affect the devices: 1. it causes ionization of electron-hole pairs and the device breaks down at the edge of the gate electrode when the avalanche condition, the critical breakdown field of GaN material, is reached. 2. Even if the critical breakdown field of the GaN material is not reached, the high electric field effect still enables the gate electrode electrons to be subjected to field emission tunneling into the surface passivation layer, the tunneling electrons can neutralize the surface polarization positive charges of the AlGaN layer, the surface polarization positive charges are directly related to the concentration of the 2DEG at the heterojunction interface, partial surface positive charges are neutralized, the high-density 2DEG concentration is reduced, and therefore the output current of the AlGaN/GaN HEMTs is obviously reduced, namely the current collapse effect. 3. The ionization probability of the electron-hole pair is increased, the ionized holes enter the channel under the action of a longitudinal electric field to neutralize the 2DEG, the concentration of the 2DEG is also reduced, and the output current is further reduced; moreover, the ionized electrons entering the AlGaN polarization layer adversely affect the threshold voltage of the device, and the reliability of the device is reduced.
Therefore, designing a novel groove gate enhancement type MIS structure AlGaN/GaN HEMTs device, and reducing the gate edge peak electric field of the device by introducing a new electric field peak is an important means for optimizing the performance and improving the breakdown voltage and reliability of the device.
Disclosure of Invention
The invention provides a novel groove gate enhanced type MIS structure AlGaN/GaN heterojunction field effect transistor, aiming at solving a series of problems of avalanche breakdown and current collapse effect of a device, reduction of threshold voltage and output current, reduction of reliability and the like caused by the fact that a high peak electric field exists at the gate edge of the groove gate enhanced type MIS structure AlGaN/GaN heterojunction field effect transistor in the prior art.
The solution is as follows:
a trench-gate enhanced MIS structure AlGaN/GaN heterojunction field effect transistor comprising:
a semi-insulating substrate;
an AlN nucleating layer which is positioned on the semi-insulating substrate and is subjected to heteroepitaxial growth;
a GaN buffer layer epitaxially grown on the AlN nucleating layer;
an AlGaN barrier layer epitaxially grown on the GaN buffer layer;
a source electrode, a gate groove and a drain electrode which are respectively arranged on the AlGaN layer;
the grid groove is positioned between the source electrode and the drain electrode;
the insulating medium layer is positioned on the grid groove;
a grid electrode positioned on the insulating medium layer (namely the grid electrode is connected with the AlGaN barrier layer through the insulating medium layer);
it is characterized in that:
an intrinsic GaN cap layer is also epitaxially grown on the AlGaN barrier layer, adjacent to the edge of the gate, and partially or completely covers the region between the gate and the drain.
Based on the solution, the invention further optimizes, defines and improves as follows:
the intrinsic GaN cap layer is formed by epitaxially growing an intrinsic GaN layer on the surface of the AlGaN barrier layer and then etching the intrinsic GaN layer.
The intrinsic GaN cap layer is positioned between the grid electrode and the drain electrode and can be partially covered or completely covered. This is because the effect of the intrinsic GaN cap layer on the channel 2DEG concentration modulation effect is related to its length, allowing for flexible selection of the etch region.
The intrinsic GaN cap layer preferably has a length not exceeding twenty percent of the gate-drain spacing.
The gate groove is formed by partially etching the intrinsic GaN cap layer and the AlGaN barrier layer.
The insulating dielectric layer is formed by Plasma Enhanced Chemical Vapor Deposition (PECVD) dielectric layer, and is made of silicon nitride or aluminum oxide.
The gate is formed by depositing a metal on the dielectric layer.
The source electrode and the drain electrode are both connected with the AlGaN barrier layer through ohmic contact.
The epitaxially grown GaN buffer layer has an n-type resistance characteristic or a semi-insulating characteristic.
The semi-insulating substrate is a semi-insulating material which can be heteroepitaxially arranged with the AlN nucleating layer, and preferably silicon or silicon carbide; alternatively, the semi-insulating substrate is replaced with sapphire.
The technical scheme of the invention has the following beneficial effects:
an intrinsic GaN cap layer is introduced at the edge of the transistor gate, and the intrinsic GaN cap layer can reduce the concentration of the conduction channel 2DEG in the region, so that the electric field modulation effect is realized. By generating a new electric field peak, the high electric field at the edge of the gate is reduced, and the electric field distribution on the surface of the transistor is more uniform. With the increase of the length of the intrinsic GaN cap layer, the electric field modulation effect is enhanced, so that the peak value of a new electric field is improved, and the electric field drop of the peak of the edge of the gate is increased; and because the surface electric field is distributed more evenly, the drain terminal voltage which needs to be applied when the device reaches the critical breakdown electric field of the GaN material is larger, the breakdown voltage is improved, and the reliability of the device is obviously improved compared with the traditional groove gate enhanced structure.
Meanwhile, the structure is simple to manufacture in the process, additional adverse effects on the AlGaN barrier layer are avoided, and the stability and reliability of the device in the process of manufacturing are ensured.
Drawings
FIG. 1 is a schematic diagram of a novel trench gate enhanced MIS structure AlGaN/GaN heterojunction field effect transistor with a partial intrinsic GaN cap layer according to the present invention.
FIG. 2 is a comparison graph of channel electric field distribution and voltage value when the structure of the conventional trench gate enhanced MIS structure AlGaN/GaN heterojunction field effect transistor and the structure of the trench gate enhanced MIS structure AlGaN/GaN heterojunction field effect transistor with a partial intrinsic GaN cap layer break down.
Detailed Description
In order to make the technical problems, technical solutions and advantages to be solved by the present invention clearer, the following detailed description is made with reference to the accompanying drawings and specific embodiments.
The embodiment is a novel groove gate enhancement type MIS structure AlGaN/GaN heterojunction field effect transistor with a partial intrinsic GaN cap layer. The structure is shown in figure 1 and mainly comprises: a semi-insulating substrate 0; an AlN nucleating layer 1 which is positioned on the semi-insulating substrate and is subjected to heteroepitaxial growth; a GaN buffer layer 2 epitaxially grown on the AlN nucleation layer; an AlGaN barrier layer 3 epitaxially grown on the GaN buffer layer; a gate groove 4, a drain 5 and a source 6 on the AlGaN barrier layer; an insulating dielectric layer 7 positioned on the gate groove; a gate electrode 8 on the insulating dielectric layer; and an intrinsic GaN cap layer 9 located on the AlGaN barrier layer and adjacent to the edge of the gate.
Trench-gate MIS structures are a common method of achieving enhancement. The barrier layer under the gate is etched to a certain depth, so that the barrier layer under the gate becomes thin and even disappears, the concentration of 2DEG under the gate is reduced to be zero, and the enhancement characteristic is realized. The threshold voltage of the device depends on the etch depth.
The intrinsic GaN cap layer is introduced, so that negative polarization charges are induced at the GaN/AlGaN interface, the negative charges reduce the concentration of a channel 2DEG, a new electric field peak is generated, the high electric field at the edge of the grid is reduced, and the surface electric field distribution tends to be uniform. With the increase of the length of the intrinsic GaN cap layer, the electric field modulation effect is enhanced, so that the peak value of a new electric field is improved, and the electric field drop of the peak of the edge of the gate is increased; and because the surface electric field is distributed more evenly, the drain terminal voltage which needs to be applied when the device reaches the critical breakdown electric field of the GaN material is larger, the breakdown voltage is improved, and the reliability of the device is obviously improved compared with the traditional groove gate enhanced MIS structure.
As shown in fig. 2, since the conventional structure has a peak electric field at the edge of the gate, the breakdown voltage is only 46V, while the novel structure can effectively reduce the peak electric field at the edge of the gate, and generate a new electric field peak at the side of the intrinsic GaN cap layer close to the drain, the breakdown voltage is increased to 78V, where X is 3.0 μm at the edge of the gate close to the drain, the intrinsic GaN cap layer has a length of 2.0 μm and a thickness of 100 nm.
The specific implementation method takes inductively coupled plasma etching (ICP) as an example: after the etching and metal electrode deposition processes of the AlGaN/GaN heterojunction field effect transistor with the intrinsic GaN cap layer are finished, the intrinsic GaN cap layer is etched close to the edge of the grid electrode by utilizing ICP. The etching area can be flexibly selected.
Here, the thickness of the intrinsic GaN cap layer is only related to the specific requirements of the channel corresponding to the cap layer, where the channel carrier concentration needs to be reduced, the intrinsic GaN cap layer should be present, and the larger the thickness of the cap layer is, the larger the reduction amplitude of the carrier concentration is, and the size of the specific channel carrier concentration is mainly determined according to the adverse effect that needs to be heavily suppressed, such as:
if an LDD concentration distribution is needed to improve the breakdown voltage to suppress the hot carrier injection effect, different depths can be etched in sequence from the gate to the drain to generate a step-type intrinsic GaN cap layer.
If the breakdown characteristics of the device need to be sufficiently improved, the intrinsic GaN cap layer can be completely covered between the gate and the drain.
If the peak electric field generated by the drain of the device near the edge of the grid needs to be reduced, an intrinsic GaN cap layer can be generated at the edge of the drain by etching according to specific requirements, and the like.
To obtain the "intrinsic GaN cap layer with modulated channel carrier concentration", the ICP etching technique of the intrinsic GaN cap layer is not limited to the intrinsic GaN cap layer ICP etching technique adopted in the above embodiment, and may be realized in other manners, and finally the same technical effect should be achieved.
There are many etching techniques and methods for obtaining the intrinsic GaN cap layer, and techniques capable of etching the intrinsic GaN cap layer, such as Reactive Ion Etching (RIE), electron cyclotron resonance plasma Etching (ECR), and the like, can be applied to this scheme.
While the preferred embodiments of the present invention have been described, it will be apparent to those skilled in the art that various modifications and improvements can be made based on the principles of the present invention, and the products of such modifications and improvements should also be considered within the scope of the present invention.

Claims (6)

1. A trench-gate enhanced MIS structure AlGaN/GaN heterojunction field effect transistor comprising:
a semi-insulating substrate;
an AlN nucleating layer which is positioned on the semi-insulating substrate and is subjected to heteroepitaxial growth;
a GaN buffer layer epitaxially grown on the AlN nucleating layer;
an AlGaN barrier layer epitaxially grown on the GaN buffer layer;
a source electrode, a gate groove and a drain electrode respectively arranged on the AlGaN barrier layer; the gate groove is positioned between the source electrode and the drain electrode;
the insulating medium layer is positioned on the grid groove;
a gate electrode on the insulating dielectric layer; the grid is formed by depositing metal on the insulating medium layer;
the method is characterized in that:
a rectangular intrinsic GaN cap layer with uniform thickness adjacent to the edge of the grid electrode is epitaxially grown on the AlGaN barrier layer, and the intrinsic GaN cap layer is formed by epitaxially growing an intrinsic GaN layer on the surface of the AlGaN barrier layer and then etching; the intrinsic GaN cap layer partially covers the region between the grid electrode and the drain electrode; the intrinsic GaN cap layer had a length of 2.0 μm and a thickness of 100 nm.
2. The trench-gate enhanced MIS structure AlGaN/GaN heterojunction field effect transistor of claim 1, wherein: the gate groove is formed by partially etching the intrinsic GaN cap layer and the AlGaN barrier layer.
3. The trench-gate enhanced MIS structure AlGaN/GaN heterojunction field effect transistor of claim 1, wherein: the insulating dielectric layer is formed by a plasma enhanced chemical vapor deposition dielectric layer, and the material is silicon nitride or aluminum oxide.
4. The trench-gate enhanced MIS structure AlGaN/GaN heterojunction field effect transistor of claim 1, wherein: and the source electrode and the drain electrode are connected with the AlGaN barrier layer through ohmic contact.
5. The trench-gate enhanced MIS structure AlGaN/GaN heterojunction field effect transistor of claim 1, wherein: the epitaxially grown GaN buffer layer has n-type resistance characteristics.
6. The trench-gate enhanced MIS structure AlGaN/GaN heterojunction field effect transistor of claim 1, wherein: the semi-insulating substrate is made of silicon or silicon carbide, or the semi-insulating substrate is replaced by a sapphire substrate.
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Citations (1)

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CN104377241A (en) * 2014-09-30 2015-02-25 苏州捷芯威半导体有限公司 Power semiconductor device and manufacturing method thereof

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US6548333B2 (en) * 2000-12-01 2003-04-15 Cree, Inc. Aluminum gallium nitride/gallium nitride high electron mobility transistors having a gate contact on a gallium nitride based cap segment
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