CN106783961A - A kind of AlGaN/GaN HFETs with part p-type GaN cap - Google Patents
A kind of AlGaN/GaN HFETs with part p-type GaN cap Download PDFInfo
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- CN106783961A CN106783961A CN201710021097.8A CN201710021097A CN106783961A CN 106783961 A CN106783961 A CN 106783961A CN 201710021097 A CN201710021097 A CN 201710021097A CN 106783961 A CN106783961 A CN 106783961A
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- 229910002704 AlGaN Inorganic materials 0.000 title claims abstract description 44
- 238000005036 potential barrier Methods 0.000 claims description 14
- 230000012010 growth Effects 0.000 claims description 12
- 239000000758 substrate Substances 0.000 claims description 10
- 238000005530 etching Methods 0.000 claims description 5
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- 238000000137 annealing Methods 0.000 claims description 2
- 238000002156 mixing Methods 0.000 claims description 2
- 229910052594 sapphire Inorganic materials 0.000 claims description 2
- 239000010980 sapphire Substances 0.000 claims description 2
- 229910010271 silicon carbide Inorganic materials 0.000 claims 1
- 230000005684 electric field Effects 0.000 abstract description 30
- 230000015556 catabolic process Effects 0.000 abstract description 12
- 230000006872 improvement Effects 0.000 abstract description 4
- 230000005533 two-dimensional electron gas Effects 0.000 abstract description 4
- 230000000694 effects Effects 0.000 description 10
- 239000000463 material Substances 0.000 description 7
- 238000000034 method Methods 0.000 description 6
- 230000005669 field effect Effects 0.000 description 4
- 230000010287 polarization Effects 0.000 description 4
- 238000001020 plasma etching Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- 230000002411 adverse Effects 0.000 description 2
- 230000005685 electric field effect Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 238000003763 carbonization Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 125000005842 heteroatom Chemical group 0.000 description 1
- 238000001534 heteroepitaxy Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 230000002269 spontaneous effect Effects 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
- H01L29/7787—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
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- Power Engineering (AREA)
- Physics & Mathematics (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
The invention discloses a kind of AlGaN/GaN HFETs with part p-type GaN cap.The transistor arrangement is to introduce p-type GaN cap in transistor gate edges, and the p-type GaN cap can reduce the two-dimensional electron gas of the zone conducts current raceway groove, realize Electric Field Modulation.By producing new electric field peak, the high electric field at grid edge is reduced, make the Electric Field Distribution of transistor surface more uniform.Compared with traditional structure, the present invention is significantly improved and improvement in terms of breakdown voltage and reliability.
Description
Technical field
The present invention relates to technical field of semiconductor device, more particularly to a kind of AlGaN/GaN hetero junction field effects crystal
Pipe.
Background technology
Due to the first generation with Si and GaAs representative and the limitation of second generation semi-conducting material, third generation broad stopband half
Conductor material is because its excellent performance is developed rapidly.GaN material as third generation semi-conducting material one of core,
Its polarity effect is characterized in that compared to Si, GaAs and SiC.Using this particularity, it is developed
AlGaN/GaN HEMTs, AlGaN/GaN HEMTs are made based on AlGaN/GaN heterojunction materials
The GaN base microelectronic component made.AlGaN/GaN hetero-junctions passes through piezoelectricity and spontaneous polarization effect shape at heterojunction boundary
Into high density two-dimensional electron gas (two dimensional electron gas, 2DEG), this two-dimensional electron gas have very high
Concentration and mobility so that AlGaN/GaN HEMTs have very low conducting resistance.With traditional field-effect transistor
(FET) device is compared, and AlGaN/GaN HEMTs have the good characteristics such as high transconductance, saturation current high and higher cutoff frequency.And
And, it is demonstrated experimentally that GaN base HEMTs remains in that good DC characteristic at a high temperature of 1000K, so as to be hot environment
Using there is provided reliable guarantee.
However, often there is peak electric field at the grid edge of AlGaN/GaN HEMTs, following unfavorable shadow is brought to device
Ring：1st, electronics-hole can be caused to ionization, when this avalanche condition of the critical breakdown electric field of GaN material is reached, device is in grid
Electrode edge punctures.Even if the 2, being not reaching to the critical breakdown electric field of GaN material, high electric field effect still can make gate electrode electronics
Field emission tunnel enters surface passivation layer, with the Surface Polarization positive charge of AlGaN layer in the electrons of these tunnellings, and these
Surface Polarization positive charge, is directly connected to the concentration of 2DEG at heterojunction boundary, and part surface positive charge is neutralized can drop
Low highdensity 2DEG concentration, so that AlGaN/GaN HEMTs output currents are obviously reduced, here it is current collapse effect.
3rd, making the ionization probability in electronics-hole pair increases, the hole after ionization longitudinal electric field effect under enter raceway groove in and 2DEG,
Can reduce 2DEG concentration, further reduce output current；And the electronics after ionization can give device threshold into AlGaN polarization layers
Threshold voltage brings adverse effect so that device reliability reduction.
The content of the invention
In order to solve in the prior art due in the grid marginal existence peak of AlGaN/GaN HFETs electricity
And the device avalanche breakdown, the current collapse effect that cause, threshold voltage and output current reduce, reliability reduction etc. is a series of
Problem, the present invention provides a kind of new AlGaN/GaN HFETs.
Solution is as follows：
A kind of AlGaN/GaN HFETs, including：
SI-substrate；
The AlN nucleating layers of heteroepitaxial growth on the SI-substrate；
Positioned at the GaN cushions of the AlN nucleating layers Epitaxial growth；
Positioned at the AlGaN potential barrier of the GaN cushions Epitaxial growth；
It is respectively in source electrode in the AlGaN potential barrier, grid and drain electrode；
It is characterized in that：
Also epitaxial growth has the p-type GaN cap abutted with gate edge, the p-type GaN cap in AlGaN potential barrier
Part covers or grid is completely covered and the region between drain electrode, and its length is relevant with raceway groove 2DEG Concentration Modulation needs.
Based on above-mentioned solution, the present invention also further makees following optimization and limits and improve：
Aforementioned p-type GaN cap is by AlGaN potential barrier surface epitaxial growth p-type GaN layer, then etching what is formed.
P-type GaN layer is that, by mixing Mg, then annealing is formed.
P-type GaN cap is located between grid and drain electrode, can partly be covered, it is also possible to be completely covered.Because p-type
GaN cap is relevant with its length to the effect that raceway groove 2DEG Concentration Modulations are acted on, can flexible selective etching region.P-type GaN caps
Layer length is preferred with 80 percent no more than grid leak spacing.
Above-mentioned grid is connected by Schottky contacts with the AlGaN potential barrier.
Above-mentioned source electrode and the drain electrode are connected by Ohmic contact with the AlGaN potential barrier.
The GaN cushions of above-mentioned epitaxial growth have N-shaped resistance characteristic or semi-insulating characteristic.
Above-mentioned SI-substrate is can be with the semi insulating material of the AlN nucleating layers hetero-epitaxy, preferably silicon or carbonization
Silicon, or use Sapphire Substrate.
Above-mentioned technical proposal of the invention has the beneficial effect that：
P-type GaN cap is introduced in transistor gate edges, the p-type GaN cap can reduce zone conducts current raceway groove 2DEG
Concentration, realizes Electric Field Modulation.By producing new electric field peak, the high electric field at grid edge is reduced, make transistor surface
Electric Field Distribution is more uniform.
With the increase of p-type GaN cap length, Electric Field Modulation enhancing so that new peak electric field is improved, and grid edge is high
Peak electric field slippage increases；And because surface electric field distribution is more uniform so that device is reaching the critical breakdown potential of GaN material
The drain terminal voltage of required applying is bigger during field, and breakdown voltage is improved, and device reliability also just has bright compared to traditional structure
Aobvious improvement.
Brief description of the drawings
Fig. 1 is the signal of new A lGaN/GaN HFET of the present invention with part p-type GaN cap
Figure.
Fig. 2 be traditional AlGaN/GaN heterojunction field effect transistor structures with it is new with part p-type GaN cap
The comparison diagram of AlGaN/GaN heterojunction field effect transistor structures electric field distribution in channel and breakdown voltage value.
Specific embodiment
To make the technical problem to be solved in the present invention, technical scheme and advantage clearer, below in conjunction with the accompanying drawings and specifically
Embodiment is described in detail.
The present invention for existing AlGaN/GaN HFETs grid marginal existence peak electric field this ask
A kind of topic, there is provided new A lGaN/GaN HFETs with part p-type GaN cap.
Its structure is as shown in figure 1, mainly include：SI-substrate 0；The heteroepitaxial growth on SI-substrate
AlN nucleating layers 1；Positioned at the GaN cushions 2 of AlN nucleating layer Epitaxial growths；Positioned at the AlGaN of GaN cushion Epitaxial growths
Barrier layer 3；Grid 4, drain electrode 5 and source electrode 6 in the AlGaN potential barrier；In the AlGaN potential barrier, with
The p-type GaN cap 7 of gate edge adjoining.
P-type GaN cap is introduced, due to the depletion action of PN junction, raceway groove 2DEG concentration is reduced, new electric field peak is produced,
So that gate edge high electric field is reduced, surface electric field distribution tends to uniform.With the increase of p-type GaN cap length, Electric Field Modulated
Effect strengthens so that new peak electric field is improved, and grid edge peak electric field slippage increases；And due to surface electric field distribution more
Uniformly so that device drain terminal voltage of required applying when GaN material critical breakdown electric field is reached is bigger, and breakdown voltage is carried
Height, device reliability also just has obvious improvement compared to traditional structure.
As shown in Fig. 2 traditional structure has high electric field peak in gate edge, Electric Field Distribution is typical triangle, is punctured
Voltage only has 307.3V, and new structure can produce new electric field peak in p-type GaN cap near drain electrode side, effectively reduce
Gate edge peak electric field, therefore breakdown voltage improves to 552.5V.Wherein grid is X=3.5 μ near drain edge position
M, p-type GaN cap length is 4 μm.
Its specific embodiment is by taking sense coupling (ICP) as an example：Complete p-type GaN cap AlGaN/
After the etching and metal electrode depositing technics of GaN HEMTs, P is being etched near gate edge using ICP
Type GaN cap.Etch areas can be selected flexibly.
Here, the thickness of p-type GaN cap, it is only relevant with the raceway groove specific requirement corresponding to the cap layers, needing to reduce ditch
, should just there is p-type GaN cap in the place of road carrier concentration, the thickness of cap layers is bigger, and the amplitude that carrier concentration reduces is got over
Greatly, the size of specific channel carrier concentration, mainly focuses on the adverse effect of containment to determine, such as needed：
If desired a concentration distribution of LDD with improve breakdown voltage containment hot carrier injection effect, then can by
Grid are sequentially etched different depth to leakage, produce stepped p-type GaN cap.
If desired the breakdown characteristics of device are fully improved, it is also possible to p-type GaN cap is completely covered between grid leak.
If desired reduce the peak electric field that device drain is produced near gate edge, then can be in drain edge according to specific
It is required that etching produces p-type GaN cap, etc..
To obtain " the p-type GaN cap with modulation channel carrier concentration ", however it is not limited to the P that above-described embodiment is used
Type GaN cap ICP lithographic techniques, it would however also be possible to employ other modes realization, should be able to finally reach identical technique effect.
The lithographic technique and method for obtaining p-type GaN cap have a lot, reactive ion etching (RIE), electron cyclotron resonace etc.
The technology that plasma etching (ECR) etc. can etch p-type GaN cap can be applied to this scheme.
The method for obtaining p-type GaN layer has a lot, mixes Mg, Fe, Zn, C etc. and is obtained in that the method for p-type GaN layer can be answered
For this scheme.
Above-described is the preferred embodiment of the present invention, for the ordinary person of the art, based on this
The principle of invention, can also carry out it is some improvement and it is perfect, these improve and perfect product also should be regarded as protection of the invention
Scope.
Claims (8)
1. a kind of AlGaN/GaN HFETs with part p-type GaN cap, including：
SI-substrate；
The AlN nucleating layers of heteroepitaxial growth on the SI-substrate；
The GaN cushions grown on the AlN nucleating layers；
The AlGaN potential barrier grown on the GaN cushions；
It is respectively in source electrode in the AlGaN potential barrier, grid and drain electrode；
It is characterized in that：
Also epitaxial growth has the p-type GaN cap abutted with gate edge, the p-type GaN cap part in AlGaN potential barrier
Cover or be completely covered grid and drain electrode between region, its length with to raceway groove 2DEG Concentration Modulations the need for it is relevant.
2. AlGaN/GaN HFETs as claimed in claim 1, it is characterised in that the p-type GaN cap
It is by AlGaN potential barrier surface epitaxial growth p-type GaN layer, then etching what is formed.
3. AlGaN/GaN HFETs as claimed in claim 2, it is characterised in that the p-type GaN layer is
By mixing Mg, then annealing is formed.
4. AlGaN/GaN HFETs as claimed in claim 1, it is characterised in that p-type GaN cap length
No more than 80 the percent of grid leak spacing.
5. AlGaN/GaN HFETs as claimed in claim 1, it is characterised in that the grid passes through Xiao
Te Ji contacts are connected with the AlGaN potential barrier.
6. AlGaN/GaN HFETs as claimed in claim 1, it is characterised in that the source electrode and described
Drain electrode is connected by Ohmic contact with the AlGaN potential barrier.
7. AlGaN/GaN HFETs as claimed in claim 1, it is characterised in that the GaN cushions tool
There are N-shaped resistance characteristic or semi-insulating characteristic.
8. AlGaN/GaN HFETs as claimed in claim 1, it is characterised in that the SI-substrate
It is silicon or carborundum, or replaces with Sapphire Substrate.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710021097.8A CN106783961A (en) | 2017-01-11 | 2017-01-11 | A kind of AlGaN/GaN HFETs with part p-type GaN cap |
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| CN201710021097.8A CN106783961A (en) | 2017-01-11 | 2017-01-11 | A kind of AlGaN/GaN HFETs with part p-type GaN cap |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107644915A (en) * | 2017-09-28 | 2018-01-30 | 英诺赛科（珠海）科技有限公司 | Transistor device with local p-type cap layers |
| CN108682625A (en) * | 2018-05-22 | 2018-10-19 | 西安电子科技大学 | RESURF GaN base Schottky-barrier diodes based on field plate and p-type GaN cap |
| CN108711578A (en) * | 2018-05-22 | 2018-10-26 | 西安电子科技大学 | A kind of part p-type GaN cap RESURF GaN base Schottky-barrier diodes |
| CN108711553A (en) * | 2018-05-22 | 2018-10-26 | 西安电子科技大学 | The preparation method of the intrinsic GaN cap RESURF GaN base Schottky-barrier diodes in part |
| CN110137253A (en) * | 2019-04-25 | 2019-08-16 | 芜湖启迪半导体有限公司 | A kind of high voltage bearing HEMT device and preparation method |
| CN110600536A (en) * | 2019-09-20 | 2019-12-20 | 中国电子科技集团公司第十三研究所 | Enhancement mode heterojunction field effect transistor |
| CN112466943A (en) * | 2020-12-01 | 2021-03-09 | 西安电子科技大学 | GaN HEMT based on p-type diamond-doped heat dissipation layer and preparation method |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107644915A (en) * | 2017-09-28 | 2018-01-30 | 英诺赛科（珠海）科技有限公司 | Transistor device with local p-type cap layers |
| WO2019061216A1 (en) * | 2017-09-28 | 2019-04-04 | 英诺赛科（珠海）科技有限公司 | Transistor device with local p-type cap layer |
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| CN108682625A (en) * | 2018-05-22 | 2018-10-19 | 西安电子科技大学 | RESURF GaN base Schottky-barrier diodes based on field plate and p-type GaN cap |
| CN108711578A (en) * | 2018-05-22 | 2018-10-26 | 西安电子科技大学 | A kind of part p-type GaN cap RESURF GaN base Schottky-barrier diodes |
| CN108711553A (en) * | 2018-05-22 | 2018-10-26 | 西安电子科技大学 | The preparation method of the intrinsic GaN cap RESURF GaN base Schottky-barrier diodes in part |
| CN110137253A (en) * | 2019-04-25 | 2019-08-16 | 芜湖启迪半导体有限公司 | A kind of high voltage bearing HEMT device and preparation method |
| CN110600536A (en) * | 2019-09-20 | 2019-12-20 | 中国电子科技集团公司第十三研究所 | Enhancement mode heterojunction field effect transistor |
| CN112466943A (en) * | 2020-12-01 | 2021-03-09 | 西安电子科技大学 | GaN HEMT based on p-type diamond-doped heat dissipation layer and preparation method |
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